JPH04309176A - Method for preparing electric circuit diagram - Google Patents

Method for preparing electric circuit diagram

Info

Publication number
JPH04309176A
JPH04309176A JP3073470A JP7347091A JPH04309176A JP H04309176 A JPH04309176 A JP H04309176A JP 3073470 A JP3073470 A JP 3073470A JP 7347091 A JP7347091 A JP 7347091A JP H04309176 A JPH04309176 A JP H04309176A
Authority
JP
Japan
Prior art keywords
circuit
equivalent information
diagram
circuit elements
information source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3073470A
Other languages
Japanese (ja)
Other versions
JP2993165B2 (en
Inventor
Aritoyo Kishimoto
岸本 有豊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3073470A priority Critical patent/JP2993165B2/en
Publication of JPH04309176A publication Critical patent/JPH04309176A/en
Application granted granted Critical
Publication of JP2993165B2 publication Critical patent/JP2993165B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To simplify a circuit diagram 4 by providing an equivalent information source separately from the circuit diagram so as to show that plural circuit elements described at various positions on the circuit diagram are the same type. CONSTITUTION:On plural circuit diagrams 1 and 4, the same type of circuit elements 2 and 5 are described at the plural positions for reference. By describing them in this way, the function of the circuit elements 2 and 5 can be clearly recognized for each position which is referred to. In order to permit such a description, an equivalent information source 3 is separately added for showing that the circuit elements 2 and 5 have the same purpose of mounting design. By the equivalent information (G2=G12) of this equivalent information source 3, the description can be handled samely as the conventional one. Concerning a simulator or an interface to a mounting design tool, it is not necessary to describe any wiring to connect the circuit diagrams 1 and 4 excepting for this. Thus, the complexity of the diagram is canceled, the function of the circuit element can be easily referred to at the required position, and the diagram itself can be simplified.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は電気回路図面の作成方法
に関し、特に電気回路の設計支援における大規模集積回
路等の電気回路図面の作成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for creating electrical circuit diagrams, and more particularly to a method for creating electrical circuit diagrams for large-scale integrated circuits and the like in support of electrical circuit design.

【0002】0002

【従来の技術】従来、かかる大規模集積回路等の電気回
路図面を作成する場合、例えば図面入力,修正,編集等
を行なう場合には、ぼう大な工数を必要としている。
2. Description of the Related Art Conventionally, when drawing electrical circuits such as large-scale integrated circuits, for example inputting, modifying, editing, etc., a large number of man-hours are required.

【0003】図2はかかる従来の一例を説明するための
回路図面の概略図である。図2に示すように、回路図面
6,10上の複数箇所で同一の回路素子7を使用する場
合、実装設計と一致させるために1箇所にその回路素子
7および図面間端子8,9を記述しておき、他の箇所か
らは図面間端子11,12を介して忠実に配線で結線し
ている。この図面間端子8,9および11,12は同一
回路素子7を複数箇所で参照するために付加的に加えら
れた配線や端子を表わしている。このようにすると、図
面が繁雑になり、しかも記述の手間も多くかかる。また
、参照する回路素子7が1箇所(回路図面6)にしか書
かれておらず、他の箇所で参照するときは回路図面を何
枚も繰って、その素子の機能を知る方法が採用されてい
る。
FIG. 2 is a schematic diagram of a circuit diagram for explaining an example of such a conventional method. As shown in FIG. 2, when the same circuit element 7 is used at multiple locations on the circuit drawings 6 and 10, the circuit element 7 and the inter-drawing terminals 8 and 9 are described in one location to match the mounting design. In addition, wiring is faithfully connected from other locations via inter-drawing terminals 11 and 12. These inter-drawing terminals 8, 9 and 11, 12 represent additional wiring and terminals added to refer to the same circuit element 7 at multiple locations. If this is done, the drawings become complicated and moreover, it takes a lot of time and effort to write them. In addition, the circuit element 7 to be referenced is written in only one place (circuit drawing 6), and when referring to other places, a method is adopted in which the function of that element is known by turning over several circuit drawings. ing.

【0004】0004

【発明が解決しようとする課題】上述した従来の電気回
路図面の作成方法は、同一の回路素子を複数箇所あるい
は複数図面で参照する必要があるとき、実装設計との1
対1対応を維持するために、その回路素子は1箇所にし
か記述することを許されていない。しかも、他の参照箇
所からは配線で結線する必要がある。従って、従来の作
成方法は図面が繁雑になり、回路素子の機能の参照が必
要な箇所では、この機能がわからないという欠点がある
[Problems to be Solved by the Invention] The above-mentioned conventional method for creating electrical circuit drawings has a problem in that when the same circuit element needs to be referenced in multiple places or in multiple drawings,
To maintain a one-to-one correspondence, the circuit element is only allowed to be written in one place. Moreover, it is necessary to connect the other reference points with wiring. Therefore, the conventional production method has the drawback that the drawings are complicated, and where the function of the circuit element needs to be referenced, the function cannot be understood.

【0005】本発明の目的は、かかる図面の繁雑さを解
消し、回路素子の機能の参照が必要な箇所で容易に参照
でき、図面そのものを見易くすることのできる電気回路
図面の作成方法を提供することにある。
An object of the present invention is to provide a method for creating electrical circuit drawings that eliminates the complexity of such drawings, allows easy reference to the functions of circuit elements where necessary, and makes the drawing itself easy to read. It's about doing.

【0006】[0006]

【課題を解決するための手段】本発明の電気回路図面の
作成方法は、回路図面上で複数箇所に記述されている回
路素子が同一であることを示す等価情報源を前記回路図
面とは別に設けることにより、前記回路図面上の結線を
単純化し、シュミレータおよび実装設計ツールへ円滑に
インターフェースを行なうことを特徴としている。
[Means for Solving the Problems] The method for creating an electric circuit drawing of the present invention provides an equivalent information source indicating that circuit elements described in multiple places on a circuit drawing are the same, separately from the circuit drawing. By providing this, the wiring on the circuit drawing can be simplified and the interface to a simulator and packaging design tool can be smoothly performed.

【0007】[0007]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

【0008】図1は本発明の一実施例を説明するための
回路図面の概略図である。図1に示すように、本実施例
は複数の回路図面1,4の上に同一の回路素子2,5が
参照の必要に応じ複数箇所で記述されている。このよう
に記述することにより、回路素子2,5の機能が参照箇
所毎に明確にわかる。これを許すために、本実施例では
複数箇所に記述された回路素子2,5が実装設計上は等
価であることを示す等価情報源3を別途付加する。この
等価情報源5の等価情報(G2=G12)に基づき、記
述された図1は従来の方法と同じ図2の回路図面に自動
的に変換される。このとき、シュミレータや実装設計ツ
ールへのインターフェースのみを考慮するのであれば、
具体的に配線や端子8,9,11,12を発生させる必
要はなく、それに見合う抽象的なデータが作成されれば
よい。
FIG. 1 is a schematic diagram of a circuit diagram for explaining one embodiment of the present invention. As shown in FIG. 1, in this embodiment, the same circuit elements 2 and 5 are described at multiple locations on multiple circuit drawings 1 and 4 as needed for reference. By describing in this way, the functions of the circuit elements 2 and 5 can be clearly understood for each reference location. In order to allow this, in this embodiment, an equivalent information source 3 indicating that the circuit elements 2 and 5 described in a plurality of places are equivalent in terms of implementation design is added separately. Based on the equivalent information (G2=G12) of this equivalent information source 5, the described FIG. 1 is automatically converted into the circuit diagram of FIG. 2, which is the same as the conventional method. At this time, if you are only considering the interface to the simulator or implementation design tool,
There is no need to specifically generate the wiring or terminals 8, 9, 11, 12; it is sufficient to create abstract data that corresponds to them.

【0009】上述した内容をステップ順に説明すると、
まず同一回路素子2,5を参照が必要な箇所全てに記述
することを許し、次に複数箇所で記述されている回路素
子2,5が等価であることを示す情報G2=G12を付
加する。更に、シュミレーションや実装設計ツールと1
対1対応させるため、複数箇所に記述されている回路素
子2,5を1箇所だけ残し、残した以外の参照箇所から
は回路素子を削除し、配線で結線する。このような手順
で回路図面1,4を作成すれば、ツールへのインターフ
ェースが必要なだけであるので、回路図面1,4上で具
体的に素子の削除や配線の描画をする必要はなくなる。
[0009] The above contents will be explained step by step.
First, the same circuit elements 2 and 5 are allowed to be described in all locations that require reference, and then information G2=G12 is added indicating that the circuit elements 2 and 5 described in multiple locations are equivalent. In addition, simulation and implementation design tools and 1
In order to achieve a one-to-one correspondence, circuit elements 2 and 5 described in multiple locations are left in only one location, and circuit elements are deleted from reference locations other than the remaining locations and connected by wiring. If the circuit drawings 1 and 4 are created using such a procedure, only an interface to the tool is required, so there is no need to specifically delete elements or draw wiring on the circuit drawings 1 and 4.

【0010】要するに、本実施例では同一の回路素子2
,5を複数箇所あるいは複数図面1,4で参照が必要な
ときは、必要な箇所それぞれにその回路素子2,5を記
述することを許すために、別途複数箇所に記述された回
路素子2,5が等価であることを示す等価情報源3を設
け、これにより図面を簡単且つ見易くしている。
In short, in this embodiment, the same circuit element 2
, 5 in multiple places or in multiple drawings 1 and 4, the circuit elements 2, 5 are separately described in multiple places in order to allow the circuit elements 2, 5 to be described in each of the necessary places. An equivalent information source 3 indicating that 5 is equivalent is provided, thereby making the drawing simple and easy to read.

【0011】[0011]

【発明の効果】以上説明したように、本発明は同一の回
路素子が必要な参照箇所毎に記述されるので、回路素子
の機能が必要な場所で容易に回路設計者に了解させるこ
とができ、実装設計との整合を取るための無理な配線お
よび繁雑な配線を付加する必要がなく、回路図面を見易
く作成することができるという効果がある。
[Effects of the Invention] As explained above, in the present invention, the same circuit element is described at each necessary reference location, so that the circuit designer can easily understand the function of the circuit element at the required location. This has the advantage that there is no need to add unreasonable wiring or complicated wiring to match the packaging design, and the circuit drawing can be created in an easy-to-read manner.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の一実施例を説明するための回路図面の
概略図である。
FIG. 1 is a schematic diagram of a circuit diagram for explaining an embodiment of the present invention.

【図2】従来の一例を説明するための回路図面の概略図
である。
FIG. 2 is a schematic diagram of a circuit diagram for explaining a conventional example.

【符号の説明】[Explanation of symbols]

1,4    回路図面 2,5    回路素子 3    等価情報源 1,4    Circuit drawing 2,5   Circuit element 3 Equivalent information source

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  回路図面上で複数箇所に記述されてい
る回路素子が同一であることを示す等価情報源を前記回
路図面とは別に設けることにより、前記回路図面上の結
線を単純化し、シュミレータおよび実装設計ツールへ円
滑にインターフェースを行なうことを特徴とする電気回
路図面の作成方法。
1. By providing an equivalent information source separate from the circuit drawing that indicates that circuit elements described in multiple places on the circuit drawing are the same, connections on the circuit drawing can be simplified and the simulator A method for creating electrical circuit drawings characterized by a smooth interface to an implementation design tool.
JP3073470A 1991-04-08 1991-04-08 How to create electrical circuit drawings Expired - Lifetime JP2993165B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3073470A JP2993165B2 (en) 1991-04-08 1991-04-08 How to create electrical circuit drawings

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3073470A JP2993165B2 (en) 1991-04-08 1991-04-08 How to create electrical circuit drawings

Publications (2)

Publication Number Publication Date
JPH04309176A true JPH04309176A (en) 1992-10-30
JP2993165B2 JP2993165B2 (en) 1999-12-20

Family

ID=13519194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3073470A Expired - Lifetime JP2993165B2 (en) 1991-04-08 1991-04-08 How to create electrical circuit drawings

Country Status (1)

Country Link
JP (1) JP2993165B2 (en)

Also Published As

Publication number Publication date
JP2993165B2 (en) 1999-12-20

Similar Documents

Publication Publication Date Title
US6588004B1 (en) Graphic editor for block diagram level design of circuits
US6353806B1 (en) System level hardware simulator and its automation
JPH01131963A (en) Automatic generating system for configuration connecting constitution
JPH0728859A (en) Editor system for logic circuit diagram
CN107590592A (en) Job dependence relation method for expressing, operation displaying and dispatch control method and device
CN108011317A (en) A kind of railcar electrical cabinet harness production method
JPH04309176A (en) Method for preparing electric circuit diagram
JP2000322463A (en) Automatic circuit symbol generation system
JPH05266113A (en) Drawing editor
JP2830563B2 (en) Circuit diagram creation device
JPH05235167A (en) Automatic wiring system
JP3147080B2 (en) Automatic placement and routing apparatus for semiconductor integrated circuit, method therefor, and recording medium recording the method
JP2539049B2 (en) Satomi simulation device
CN117010303A (en) Schematic diagram rapid generation method and system based on electrical connection standard data model
JPH05342292A (en) Circuit diagram data conversion device
JP2940124B2 (en) Substrate CAD system
JPH0146901B2 (en)
Morris et al. Structured abstract schematics
JPH07168870A (en) Circuit diagram input device
JPH0743741B2 (en) Deployment connection diagram automatic creation method
JPH02207377A (en) Arrangement design supporting device
JPH02112072A (en) Layout system for integrated circuit
JPH05243376A (en) Automatic wiring apparatus
JPH10326834A (en) Data path automatic layout device and data path layout
JPH11184908A (en) Printed circuit board design method using data base

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19990921