JPH0429582A - Interlock circuit - Google Patents

Abstract

PURPOSE:To prevent a short-circuit between a solid state contact and a dynamic brake circuit by locking a contactor drive at a first timer operating time, and operating the brake at a first timer operating time after a second timer operating time is elapsed. CONSTITUTION:A dynamic brake drive circuit is composed of a transistor TR2, a phototriac OI2, resistors R2, R3, a capacitor C1 and a DC power source VCC. If an L level signal of a NAND gate A2 of the output of a second time circuit is input to the base of the transistor TR2, its collector output becomes an H level, and the phototriac OI2 is inoperative. A NOR gate gate B2 and a photocoupler OI1 constitute a drive locking circuit. Now, an L level of the output of the gate B2 of the first timer is input to a NOR gate B1, and its output is an H level. Accordingly, the photocoupler OI1 is inoperative, and the drive locking circuit is released.

Description

[Detailed Description of the Invention] [Industrial Application Fields] The present invention relates to an interlock circuit when a motor is driven by a motor drive contactor and stopped by a dynamic brake, particularly when the motor is driven by a solid state contactor. This relates to interlock circuits.

[Prior Art] Fig. 11 is a conventional interlock circuit diagram of a contactor and a dynamic brake. In the figure, IA is a conventional interlock circuit, 2 is a dynamic brake, and MC is a conventional interlock circuit.
M is a motor drive contactor, MCB is a contactor with a built-in dynamic brake, T is a timer that sets the dynamic brake operation time, S is a start switch, S
is the stop switch ON/OFF, and M is the motor. The dynamic brake 2 includes a diode stack DS and a contactor inside.

The function of the dynamic brake 2 is to apply the DC voltage obtained by converting AC/DC using the diode stack DS between the two phases of the motor M for a certain period of time after the motor drive contactor MCM is turned off. The purpose is to electrically perform the breech operation on M.

FIG. 12 is a waveform diagram for explaining the operation of FIG. 11.

The operation in FIG. 11 will be explained with reference to the waveforms in FIG. 12.

First, by opening the starting switch S for a certain period of time, the coil of the contactor MCM for driving the motor is excited from the AC power supply, the contactor MCM is operated, and the auxiliary a contact of the contactor MCM automatically adjusts the excitation current of the contactor MCM. The motor M is held and a 3φ power supply is supplied to the motor M. At the same time, timer T is activated by the a contact of contactor MCM.
is set, its contact T is open, and its contact T is closed.

Next, by opening the stop switch S for a certain period of time, the excitation current of the contactor M Cs is cut off.
Self-hold is released. At the same time, the timer T starts operating, its contact T is immediately closed, and the contact Tb remains closed for a set time t5, after which time it becomes closed. Since the contacts T and Tb of the timer T are both closed for the set time t of the timer T after this contactor MCM is turned off, the contactor MCB with a built-in dynamic brake operates, and after the timer set time t has passed, the contactor MCB with a built-in dynamic brake operates. , the contactor built into the dynamic brake turns off and returns to its initial state.

In this way, the motor drive contactor MCM and the dynamic brake built-in contactor MCB interlock each other using their auxiliary contacts, and use the timer T to set the dynamic brake operating time.

[Problems to be Solved by the Invention] The interlock circuit between a motor drive contactor and a dynamic brake as described above is constructed of a sequence circuit using an auxiliary contact of the contactor, so it is difficult to use a contactor that does not have a mechanical auxiliary contact. For example, there was a problem in that auxiliary contacts could not be used in interlock circuits for solid state contactors and dynamic brakes.

There are also other problems, such as the need for an interlock to prevent short circuits when switching from stopping the motor drive to operating the dynamic brake.

The present invention was made to solve this problem, and in the case of a solid state contactor that does not have mechanical auxiliary contacts, the present invention sets an interlock time when switching from motor drive stop to dynamic brake activation. An object of the present invention is to provide an interlock circuit that can set an interlock time to prevent a motor from being driven again during dynamic brake operation and can set a dynamic brake operation time.

[Means for Solving the Problems] An interlock circuit according to claim 1 of the present invention is an interlock circuit for a motor drive circuit that drives a motor using a solid state contactor and stops the motor using a dynamic brake. a contactor drive circuit that turns on the solid-state contactor by turning on an input signal from an operating power source when a lock signal supplied by the operating power supply is not input, and turns the solid-state contactor off by turning off the input signal; a first timer circuit that puts the timer circuit into a startable state by turning on the drive circuit and generates an output signal from when the input signal is turned off until expiration of a preset first timer time; and the first timer circuit. a second timer circuit that generates an output signal from the time when the output signal of the circuit is generated until expiration of a second timer time that is preset to a time shorter than the first timer time; and an output signal from the first timer circuit. a drive lock circuit that supplies a lock signal to the contactor drive circuit that disables the contactor drive circuit from being turned on even if the input signal is turned on again, and the second timer circuit; and a dynamic brake drive circuit that turns on the dynamic brake only during the time when the output signal is generated from the first timer circuit, excluding the time when the output signal is generated.

An interlock circuit according to a second aspect of the present invention is an interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, which includes the contactor drive circuit according to the first aspect, a timer circuit, a second timer circuit, a dynamic brake circuit, and a timer circuit during the time when the output signal is generated from the first timer circuit, excluding the time when the output signal is generated from the second timer circuit. A preset third timer circuit is activated from the end of the output signal generated from the first timer circuit.
a third timer circuit that generates an output signal until the timer time expires; and a drive lock circuit that supplies the contactor drive circuit with a lock signal that disables the contactor drive circuit from turning on even if the signal is turned on again.

The interlock circuit according to claim 3 of the present invention is an interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, and in which a lock signal supplied by the drive lock circuit is input. a contactor drive circuit that turns on the solid-state contactor when an input signal from an operating power source is turned on and turns off the solid-state contactor when the input signal turns off; and a rectifier load connected in parallel to the motor to be driven. a load voltage detection circuit that detects the load voltage generated in the load voltage, determines that the detected load voltage is lower than a predetermined set voltage, and outputs a load low voltage detection signal; and a timer circuit by turning on the contactor drive circuit. is enabled to start, and after the input signal is turned off, the load voltage detection circuit generates an output signal from the time when the load low voltage detection circuit outputs the load low voltage detection signal until expiration of a preset first timer time. Supplying a lock signal to the contactor drive circuit that disables the contactor drive circuit from turning on even if the input signal is turned on again, only during the time when the output signal is generated from the timer circuit and the first timer circuit. A drive lock circuit to
and a dynamic brake drive circuit that turns on the dynamic brake only during the time when the output signal is generated from the first timer circuit.

An interlock circuit according to a fourth aspect of the present invention is an interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, and includes a contactor drive circuit according to the third aspect, a load voltage The detection circuit, the first timer circuit, the dynamic brake drive circuit, and the input signal are turned off, and then the timer circuit is enabled to start from the time when the load voltage detection circuit outputs the load low voltage detection signal. a second timer circuit that generates an output signal from the end of the output signal generated from the first timer circuit until expiration of a preset second timer time; and a second timer circuit that generates the output signal from the first timer circuit. A drive that supplies a lock signal to the contactor drive circuit that disables the contactor drive circuit from turning on even if the input signal is turned on again only during the time period and the time when the output signal is generated from the second timer circuit. It is equipped with a lock circuit.

An interlock circuit according to a fifth aspect of the present invention is an interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, and includes a contactor drive circuit according to the fourth aspect, a load voltage The timer circuit is made ready to start by turning on the detection circuit, the second timer circuit, the drive lock circuit, the dynamic brake circuit, and the contactor drive circuit, and after the human power signal is turned off, the load voltage detection circuit turns on the load voltage detection circuit. The timer operation starts from the time when the low voltage detection signal is output, and if the input signal is not turned on thereafter, the output signal is generated until the expiration of a preset first timer time, and after the timer operation starts, and a first timer circuit that resets the timer operation and stops generating the output signal when the input signal is turned on before the first timer time expires.

[Operation] In the invention according to claim 1, in the interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, the contactor drive circuit receives a lock signal supplied from the drive lock circuit. When no input signal is input, the solid state contactor is turned on by turning on the input signal from the operating power supply, and the solid state contactor is turned off by turning off the input signal. The first timer circuit enables the timer circuit to be activated by turning on the contactor drive circuit, generates an output signal from the time when the input signal is turned off until expiration of a preset first timer time, and generates an output signal from the time when the input signal is turned off until expiration of a preset first timer time. The timer circuit generates an output signal from the time when the output signal of the first timer circuit is generated until expiration of a second timer time, which is preset to a time shorter than the first timer time. The drive lock circuit supplies the contactor drive circuit with a lock signal that disables the contactor drive circuit from turning on even if the input signal is turned on again, only during the time when the output signal is generated from the first timer circuit. and the dynamic brake drive circuit is configured to operate the first timer circuit excluding the time during which the output signal is generated from the second timer circuit.
The dynamic brake is turned on only during the time when the output signal is generated from the timer circuit. In this way, short circuits between the solid state contactor and the dynamic brake circuit are prevented and the dynamic brake operating time is set.

In the invention according to claim 2, in the interlock circuit for a motor drive circuit which drives a motor by a solid state contactor and stops the motor by a dynamic brake, a contactor drive circuit, a first timer circuit, and a second timer circuit are provided. The dynamic brake circuit and the dynamic brake circuit each operate as described in claim 1 above. The third timer circuit enables the timer circuit to be activated during the time when the output signal is generated from the first timer circuit, excluding the time when the output signal is generated from the second timer circuit. The drive lock circuit generates an output signal from the end of the output signal generated from the first timer circuit until the expiration of a preset third timer time, and the drive lock circuit generates an output signal from the time when the output signal is generated from the first timer circuit and from the time when the output signal is generated from the first timer circuit. Only during the time when the output signal is generated from the third timer circuit, a lock signal is supplied to the contactor drive circuit that disables the contactor drive circuit from turning on even if the input signal is turned on again. In this way, mutual short circuit between the solid state contactor and the dynamic brake circuit is prevented and the dynamic brake operating time is set.

In the invention according to claim 3, in the interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, the contactor drive lock circuit receives a lock signal supplied from the drive lock circuit. When the input signal from the operating power source is turned on, the solid state contactor is turned on, and when the input signal is turned off, the solid state contactor is turned off, and the load voltage detection circuit is connected in parallel to the motor to be driven. It detects the load voltage generated in the rectified load, determines that the detected load voltage is lower than a predetermined set voltage, and outputs a load constant voltage detection signal. The first timer circuit puts the timer circuit into a state where it can be started by turning on the contactor drive circuit, and
After the input signal is turned off, the load voltage detection circuit generates an output signal from the time when it outputs the load low voltage detection signal until expiration of a preset first timer time;
The drive lock circuit supplies the contactor drive circuit with a lock signal that disables the contactor drive circuit from turning on even if the input signal is turned on again, only during the time when the output signal is generated from the first timer circuit. do. The dynamic brake circuit turns on the dynamic brake only during the time when the output signal is generated from the first timer circuit. In this way, the load voltage from the drive motor and the back electromotive force when the motor is stopped are actually detected to prevent short circuit between the solid state contactor and the dynamic brake circuit and to set the dynamic brake operating time.

In the invention according to claim 4, in the interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, the interlock circuit includes a contactor drive circuit, a load voltage detection circuit, a first timer circuit, and a load voltage detection circuit. Each of the dynamic brake drive circuits performs the operation described in claim 3 above. After the input signal is turned off, the second timer circuit puts the timer circuit into a startable state from the time when the load voltage detection circuit outputs the load low voltage detection signal, and outputs the output generated from the first timer circuit. generating an output signal from the end of the signal until expiration of a preset second timer time;
The drive lock circuit locks the contactor drive circuit only when the first timer circuit generates an output signal and when the second timer circuit generates an output signal, even if the input signal is turned on again. A lock signal that disables on-drive is supplied to the contactor drive circuit.

In this way, the load voltage from the drive motor and the back electromotive force when the motor is stopped are actually detected to prevent mutual short circuit between the solid state contactor and the dynamic brake circuit and to set the dynamic brake operating time.

In the invention according to claim 5, in the interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, a contactor drive circuit, a load voltage detection circuit, a second timer circuit, The drive lock circuit and the dynamic brake circuit each operate as described in claim 4. The first timer circuit enables the timer circuit to be started by turning on the contactor drive circuit, and starts the timer operation from the time when the input signal is turned off and the load voltage detection circuit outputs the load low voltage detection signal. After that, if the input signal is not turned on, the output signal is generated until the expiration of the first timer time set in advance, and after the timer operation is started, the input signal is not turned on before the expiration of the first timer time. When turned on, the timer operation is reset and generation of the output signal is stopped. In this way, the load voltage from the drive motor and the back electromotive force when the motor is stopped are actually detected to prevent mutual short circuit between the solid state contactor and the dynamic brake circuit and to set the dynamic brake operating time. It is possible to stop the brake in the middle and quickly re-drive the solid state contactor.

[Embodiment] FIG. 1 is a circuit diagram showing a first embodiment according to the present invention, and 1-1 is a #1 interlock circuit.

In the #1 interlock circuit 1-1, Ro to R and Rlo are fixed resistors, R9 is a variable resistor for time adjustment, C1 to C3 are capacitors, A1 to A4 are NAND gates, and B1 and B2 are NOR Gate, TR and TR2 are transistors, Dl and B2 are diodes, 01. is a photocoupler, O12 is a phototriac, and vDD is a DC power supply. Further, M is a motor, 2 is a dynamic brake, and 3 is a solid state contactor.

FIG. 2 is a waveform diagram for explaining the operation of FIG. 1.

The operation shown in FIG. 1 will be explained with reference to FIG. A positive voltage from the DC operating power supply is supplied directly to one end of the gate circuit within the solid state contactor 3, the other end of which is connected to the collector of transistor TR1 and the NAND gate A.
Connected to the input terminal of 3. When the transistor TR1 is turned on (conductive), the gate circuit is driven and the solid state contactor 3 is turned on. That is, resistor R
SR and transistor TR1 constitute a driving circuit for the solid state contactor. Also, NAND gate A
SA, NOR gate B 1 diode D2. A first timer circuit is configured by resistors R, R, variable resistor R1, and capacitor C3, and a second timer circuit is configured by NAND gates A, A, diodes D1, resistors R5 to R7, and capacitor C2. .

When the input contact (manual switch or relay contact) is now open and no positive voltage input signal is being supplied from the operating power source to the base of transistor TR1 via resistor R, transistor TR is off. transistor TR
1 is off, its collector voltage is at H level, and solid state contactor 3 is off. Also, the input of the NAl11D gate A3 of the first timer circuit is also high.
level, so its output is L level. This L
The level signal is N via variable resistor R and resistor R1o.
is supplied to the input of AND gate A.
The output of NOR gate B2 is at H level, and the output of NOR gate B2 is at L level. The output of this first timer circuit is N
The L level signal output from OR gate B2 is input to the second timer circuit. That is, NAND through resistors R6 and R
The L level signal is input to gate A1, its output becomes H level, and the output of the next stage NAND gate A2 becomes L level.
level. In this embodiment, the transistor TR2, the phototransistor 1', the resistors R and R3, the capacitor C1, and the DC power supply vDD constitute a dynamic brake drive circuit. Now, the L level signal of the output of the NAND gate A2, which is the output of the second timer circuit, is input to the base of the transistor TR, and the collector output of the transistor TR2 is at the H level. Therefore, the phototriac 01 of the dynamic brake drive circuit is in an inoperative state. Here, NOR gate B1 and photocoupler 0
1 constitutes a drive lock circuit. Now, the L level output from NOR gate B2 of the first timer circuit is input to NOR gate B1, and its output is at H level. Therefore, the photocoupler 01 is in an inoperative state, and the drive lock circuit is released.

When the input contact is then closed, a positive voltage input signal from the operating power supply supplies the base current of the transistor TR of the solid-state contactor drive circuit through the resistor R1;
Transistor TR1 is turned on. Therefore, the collector of transistor TR1 becomes L level, and solid state contactor 3 also turns on. Also, N of the first timer circuit
Since the input of AND gate A3 is at L level, its output becomes H level, and this H level signal quickly charges the time capacitor C3 through the charging path of diode D2 and resistor R, and the charging side of capacitor 3 to H level.

This H level signal is input to NAND gate A4 via resistor R1o, and its output is set to L level. NOR
Gate B receives the L level of the output of the IIIAND gate A4 and the H level of the output of the NAND gate A3, so its output remains at the L level, and the second timer circuit and dynamic brake drive circuit and the drive lock circuit remain inactive.

Next, when the input contact is opened again and the positive voltage input signal from the operating power supply is turned off, the base current of the transistor TR1 of the solid state contactor drive circuit, which had been supplied through the resistor R1, is cut off. , transistor TR1 is turned off, its collector voltage becomes H level, and solid state contactor 3 is also turned off. Furthermore, since the input of the NAND gate A3 of the first timer circuit is at H level, its output is at L level. This NA
Since the output of ND gate A3 becomes L level, the electric charge charged in time limit capacitor C3 until then is transferred to variable resistor i.
Discharging is performed according to a time constant determined by R and the value of capacitor C3, and after a preset time t has elapsed, the output of capacitor C3 becomes L level. This time t1 is the timer operation time of the first timer circuit.

On the other hand, during the timer operation time t of the first timer circuit, the L level of the output of the NAND gate A3 and the NAND
Since the L level output of gate A4 is input to NOR gate B2, its output becomes H level. This NOR
The H level of the output of the gate B2 is input to the NOR gate B1, which is a drive lock circuit, and its output becomes the L level, so the photocoupler 011 operates and the base of the transistor TR of the solid state contactor drive circuit is turned to the L level. hold at level. Therefore, during this period, a drive lock operation is performed so that the transistor TR1 does not operate even if the input contact is turned on again.

Furthermore, when the first timer circuit starts operating, the H level of the output of the NOR gate B2 charges the capacitor C2 with a time constant determined by the values of the resistor R6 and the time capacitor C of the second timer circuit. , becomes H level after a preset time t2 has elapsed. This time t2
is the timer operation time of the second timer circuit, and
The timer is set to a much shorter time than the timer operating time t1.

After the first timer circuit starts operating and the second timer operation time t2 has elapsed, the NAND gate AI
Since the input is at H level, its output is at L level,
Further, the output of NAND gate A2 becomes H level. Since the H level signal output from the NAND gate A2 of this second timer circuit supplies the base current of the transistor TR2, the transistor TR of the dynamic brake drive circuit
2 is turned on, and phototriac OI2 is also turned on. This ON operation of the phototriac 012 excites the contactor coil MCB of the dynamic brake.

As a result, the dynamic brake 2 applies the DC voltage obtained by AC/DC conversion using the diode stack DS between the two phases of the motor M, thereby causing the motor M to perform an electrical braking operation.

When the first timer operation time t1 ends, the input of the NAND gate A4 of the first timer circuit is at L level, its output is at H level, and the output of NOR gate B2 is at L level.
level. The L level signal from this NOR gate B2 is input to the NOR gate B1 of the drive lock circuit, and its output becomes H level. For this reason, Photocabra 011
is turned off and the grounding of the base of transistor TR1 is released, so that the drive lock of the solid state contactor drive circuit is released. Furthermore, at the same time that the output of NOR gate B2 becomes L level, the electric charge that had been charged in the timer capacitor C2 of the second timer circuit is transferred to the diode D.
and is rapidly discharged through resistor R5 to a level. Therefore, the output of NAND gate A1 goes to H level,
The output of the NAND gate A2 becomes L level, turning off the transistor TR2 of the dynamic brake drive circuit and stopping the dynamic brake operation.

The reason why the dynamic brake starts operating after the second timer operating time t2 has elapsed after the motor drive is stopped is to prevent a short circuit at the time of switching. For this reason, the second timer operation time t2 is set to a time obtained by adding a certain margin time to the time until the motor back electromotive force becomes equal to or less than a predetermined voltage value when the motor is stopped.

In the operation described above, the input signal, photocoupler 01
, phototriac 01, solid state contactor, and dynamic brake are shown in FIG.

FIG. 3 is a circuit diagram showing a second embodiment of the present invention, and 2-2 is a #2 interlock circuit.

2 and 3 are the same as in FIG.

In #2 interlock circuit l-2, # in FIG.
In addition to the 1 interlock circuit 1-1, a third timer circuit is added, which is composed of a NAND gate B, 1 diode D, 1 resistor RSR381112, and R1 time capacitor C4. This third timer circuit inputs the output signal of the NAND gate A1 of the second timer circuit, and converts the output signal of the timer circuit into the NAND gate A1 of the drive lock circuit.
The circuit is configured to provide an additional drive lock time t3 after the dynamic brake drive circuit is turned off by supplying the signal to one input of the gate B1.

FIG. 4 is a waveform diagram for explaining the operation of FIG. 3.

The operation shown in FIG. 3 will be explained with reference to FIG. The first timer circuit, the second timer circuit, and the dynamic brake drive circuit when the input contact is currently open and a positive voltage input signal is not being supplied to the base of the transistor TR1 from the operating power supply via the resistor R. The operation is the same as that in FIG. In this case, the NOR gate B of the third timer circuit
3, the H level signal of the output of the NAND gate AI of the second timer circuit is input, and its output becomes the L level, and the output of the third timer circuit taken out via the resistor R13 is also at the L level. . The L level signal of the output of this third timer circuit and the NOR gate B of the first timer circuit
The L level signal of output 2 is Not? of the drive lock circuit.
Since it is input to gate B1, its output becomes H level, and photocoupler 01. is inactive and the drive lock circuit is released. The dynamic brake drive circuit is also off.

Even if the input contact is then closed, the operations of the solid state contactor drive circuit, the first timer circuit, the second timer circuit, and the dynamic brake drive circuit are the same as in the case of FIG. In this case, the output of the third timer circuit is also low.
level, the photocoupler OIl of the drive lock circuit is inactive, and the dynamic brake drive circuit is also off.

When the input contact is then opened again, the solid state contactor drive circuit is turned off and the solid state contactor 2 is turned off, as described in the operation of FIG.

Immediately, the first timer circuit starts operating for timer time t1, and the output of NOR gate B2 becomes H level, so the output of NOR gate B1 of the drive lock circuit becomes L level. Therefore, Photocabra 01. The light emitting diode inside emits light and the built-in transistor turns on.
Transistor TR is locked in an inoperative state. Furthermore, as explained in the operation of FIG. 1, the dynamic brake drive circuit is driven after the timer operation time t2 of the second timer circuit expires. The NOR gate B3 of the third timer circuit changes its output to the H level due to the input of the L level of the output of the NAND gate A1 of the second timer circuit, and passes through the diode D3 and the resistor R1□ to the time capacitor. C4 is rapidly charged, and the output of the third timer circuit is brought to an H level state. When the timer operation time t1 of the first timer circuit ends, the second timer circuit is reset and the dynamic brake drive circuit is turned off.

At the end of the first timer operation time t1, the output of the third timer circuit is at H level, and the output of NOR gate B1 of the drive lock circuit continues to be at L level. Therefore, the photocoupler 01 continues to operate and locks the transistor TR1 of the solid state contactor drive circuit in an inoperative state. However, the charge stored in the timer capacitor C4 is discharged through the resistor R1°, and after a preset time t3 has elapsed, the output of the capacitor C4 (i.e., the output of the third timer circuit) becomes low.
level. This time t3 is the timer operation time of the third timer circuit. When the timer operation time t3 of the third timer circuit expires, the two inputs of the NOR gate B1 are both at L level, so its output becomes H level.
The photocoupler 011 is turned off, the drive lock circuit is reset, and the interlock of the solid state contactor drive circuit is released. In this way, after the end of the dynamic braking operation, the drive of the solid state contactor is locked until time t3 has elapsed to prevent short circuits.

Each timing waveform in the operation described above is shown in FIG. In other words, when the input signal changes from on to off, the drive lock circuit operates to close the coupler O at this off point.
r1 becomes L level, solid state contactor 3
The drive is locked so that the solid state contactor 3 does not operate even if the input signal is turned on again. Time t after photocoupler Of becomes L level
After 2 elapses l (that is, after the expiration of the second timer operating time), the dynamic brake drive circuit is turned on, and after the first timer operating time t1 has elapsed, the dynamic brake drive circuit is turned off. Photocabra 01 until after t. maintains the L level and continues the drive lock state. In this way, the solid state contactor drive circuit is locked during a period of time extending before and after the dynamic brake operation time, thereby preventing mutual short circuit due to overlap between the solid state contactor and the dynamic brake operation.

FIG. 5 is a circuit diagram showing a third embodiment of the present invention, and 1-3 is a #3 interlock circuit.

2- and 3 are the same as in FIG.

#3 In interlock circuit 1-3, resistor Ro,
The solid state contactor drive circuit constituted by R and transistor TR is the same as that shown in FIG. D1□ to D16 are connected by diodes to form a three-phase full-wave rectifier circuit. R14, RI5, R1
6 is a resistor, and O12 is a photocoupler. The above three-phase full-wave circuit, resistors R14 to R1B, and photocoupler 013
constitutes a load voltage detection circuit. The first timer circuit, which is composed of NAND gates A, NOR gate B, diode D, resistor R, R variable resistor 281OゝR9, and time capacitor C3, has an input signal that is connected to the transistor of the solid-state contactor drive circuit. This circuit has the same configuration as that in FIG. 1, except that the output signal of TR1 and the output signal of photocoupler oI3 of the load voltage detection circuit are both supplied. Further, the dynamic brake drive circuit composed of the transistor TR2, the phototriac 01, the resistor R1R3, the capacitor C1, and the DC power supply vDD is the same as that shown in FIG. 1, and is driven by the output signal of the first timer circuit. 01. is a photocoupler, which constitutes a drive lock circuit, and is connected in series with the phototriac o12,
It is driven by transistor TR2 of the dynamic brake drive circuit. Therefore, the photocoupler 011 and the phototriac OI2 operate at the same timing.

FIG. 6 is a waveform diagram for explaining the operation of FIGS.

The operation shown in FIG. 5 will be explained with reference to FIG. If the input contact is now open and the positive voltage input signal from the operating power supply is off, the transistor TR1 of the solid-state contactor drive circuit is off, its collector output is at H level, and the solid-state contactor 3 is also off. It becomes. Therefore, the output of the load voltage detection circuit is at L level,
Photocoupler 013 is also inactive, so its output is H.
level. The input of the NAND gate A3 of the first timer circuit is supplied with the H level output of the transistor TR of the solid state contactor drive circuit and the H level output of the photocoupler 013 of the load voltage detection circuit, so that the output is The signal becomes L level, and the first timer circuit is in an inactive state. Therefore, NOR gate B2 is N
L level output of AND gate A3 and NAND gate A4
Since the H level output of is inputted, the output becomes L level and the transistor TR2 is not driven. Therefore, the phototriac OI of the dynamic brake drive circuit
2 and the photocoupler 01 of the drive lock circuit are both inoperative, and the interlock of the solid state contactor drive circuit is released.

Next, when the input contact closes and the positive voltage input signal from the operating power supply turns on, transistor TR1 of the solid-state contactor drive circuit turns on, its collector output goes to L level, and the solid-state contactor also turns on. becomes. When the solid state contactor operates, a motor load voltage is generated. Therefore, the photocoupler 013 is driven by the output voltage of the three-phase full-wave rectifier circuit composed of D1□ to D16 of the load voltage detection circuit, and its output becomes L level. NAND gate A of the first timer circuit
Since the L level output of the transistor TR1 of the solid state contactor drive circuit and the L level output of the photocoupler OI3 of the load voltage detection circuit are supplied to the input of No. 3, the output becomes H level. The H level output of this NAND gate A3 is connected to diode D and resistor R.
8, the time limit capacitor C3 is rapidly charged, the capacitor C3 becomes H level, and the output of NAND gate A4 becomes L level. Since NOR gate B2 receives the H level output of NAND gate A3 and the L level output of NAND gate A, it maintains its output at L level. Therefore, the transistor TR2 of the dynamic brake drive circuit is not driven, the photo triac 012 of the dynamic brake drive circuit and the photocoupler 01 of the drive lock circuit are both inoperative, and the interlock of the solid state cotter drive circuit is disabled. It is still lifted.

Next, when the input contact is opened again and the positive voltage input signal is turned off, the transistor TR of the solid-state contactor drive circuit is turned off, its collector output becomes H level, and the solid-state contactor 3 is turned off. . However, even if the solid state contactor 3 is turned off, during the time t when a large back electromotive force is generated in the motor M, the photocoupler OI of the load voltage detection circuit
3 continues the L level state. Then, after the time t has elapsed, the back electromotive force of the motor M decreases, and the output voltage of the three-phase full-wave rectifier circuit falls below a preset voltage value, making it impossible to drive the photocoupler OI3, and the output becomes H. level. When the output of the photocoupler 013 becomes H level, the output of the NAND gate A3 of the first timer circuit becomes L level, and the first timer circuit performs the timer operation at time t1 as in the case of FIG. Let's do it. That is, during the first timer operation time t, the L of the NAND gate A3 is
Level output and NAND gate) Since the L level output of A4 is input to NOR gate B2, its output becomes H level. The H-level output signal of this NOR gate B2 drives the transistor TR of the dynamic brake drive circuit, and the photo triac 012 and the first photocoupler O.
11 are both turned on. The contactor coil MCB of the dynamic brake is excited by the ON operation of the phototriac 012, and the dynamic brake 2 applies a DC voltage, which is the output of the diode stack DS, to the motor M to perform an electrical braking operation. Also photocabra 0
Due to the ON operation of 1□, the base potential of the transistor TR of the solid state contactor drive circuit is grounded, and the drive is locked so that it cannot operate.

When the operating time t1 of the first timer circuit has elapsed, the NAN
The output of D gate A4 becomes H level, and the output of NOR gate B2 becomes L level. As a result, the transistor TR2 of the dynamic brake drive circuit is turned off, the photo triac 012 and the photo coupler 011 are both turned off, the dynamic brake operation is completed, and the drive lock of the solid state contactor drive circuit is released.

Timing waveforms in the above operation are shown in FIG.

In the embodiment shown in FIG. 5, the operating state of the motor M is determined based on both the output signal of the solid state contactor drive circuit and the output signal of the load voltage detection circuit. In other words, even if the input signal is turned on and then turned off and the output of the solid state contactor drive circuit goes to H level, if the solid state contactor 3 is short-circuited, the output of the load voltage detection circuit will go to H level. Therefore, the first timer circuit does not perform a timer operation (discharging operation). Therefore, if the solid state contactor 3 is short-circuited, the dynamic brake drive circuit will not operate. This operation is also similar in FIGS. 7 and 9, which will be described later.

FIG. 7 is a circuit diagram showing a fourth embodiment according to the present invention, and 1-4 is a #4 interlock circuit.

2 and 3 are the same as in FIG.

In #4 interlock circuit 1-4, the solid state contactor drive circuit, load voltage detection circuit, first timer circuit, and dynamic brake circuit are completely the same circuits as in FIG. 5. In addition to the above circuit, there is also a NAND gate B1 which operates with the output signal of the first timer circuit, and resistors R and RR.

1 11 12ゝ 13 A second timer circuit composed of a diode D3 and a time-limiting capacitor C4, a resistor R1 operated by the output signal of the second timer circuit, a photocoupler 01, and a drive composed of a DC power supply vDD It is equipped with an I lock circuit.

FIG. 8 is a waveform diagram for explaining the operation of FIG. 7.

The operation shown in FIG. 7 will be explained with reference to FIG. The operation of the solid-state contactor drive circuit, load voltage detection circuit, first timer circuit, and dynamic brake circuit when the input contact is first open, then closed, turning on the solid-state contactor, and then opening again is as follows: This is the same as in Figure 5.

Therefore, the operation of the second timer circuit and drive lock circuit will be explained.

When the input contact is currently open and the input signal is off, jail
Since the output of the NOR gate B2 of the timer circuit is at the L level, there is no charge in the timer capacitor C4 of the second timer circuit and the output is at the L level, and the output of the NOR gate B1 is at the H level.

Therefore, photocabra 101. is off and the drive lock circuit is not activated. That is, the transistor TR1 of the solid state contactor drive circuit is turned off.

Next, even when the input contact is closed and the input signal is turned on, the output of the NAND gate B2 of the first timer circuit remains at the L level, and the time limit capacitor C of the second timer circuit
4 continues to be in the L level state, the photocoupler O11 of the drive lock circuit is inactive, and the interlock of the solid state contactor drive circuit also remains released.

The input contact is opened again, the input signal is turned off, and when the output (2) of the photocoupler 013 becomes H level after a further time t has elapsed, the output of the N'OR gate B2 of the first timer circuit becomes H level. This NOI? Gate B
The H level output signal of 2 is applied to the timer capacitor C via the diode D and resistor R1 of the second timer circuit.
4 is rapidly charged, and the capacitor C becomes an H level state. Therefore, the output of the NOR gate B1 becomes L level, the photocoupler 011 of the drive lock circuit is activated, and the transistor TI? of the solid state contactor drive circuit is activated. , performs a drive lock operation to prevent it from operating. and the first
After the timer operation time t1 of the timer circuit has elapsed, NOR
The output of gate B2 becomes L level. When the output of this NOR gate B2 becomes L level, the charge charged in the time capacitor C4 of the second timer circuit starts discharging via the resistor R1°. When a preset time t2 has elapsed after the start of discharge, the output voltage of the capacitor C4 becomes L level, the output of NOR gate B1 becomes H level, and the photocoupler OIl of the drive lock circuit is turned off. Therefore, the locked state of transistor TR of the solid state contactor drive circuit is released.

In the embodiment shown in FIG. 7 as well, as explained in FIG. 5, the dynamic brake becomes inoperable in the event of a short-circuit accident in the solid state contactor. Furthermore, when the human power signal is turned off and time t has elapsed, and the detected load layer voltage becomes smaller than a predetermined set value, the first timer circuit is activated, the dynamic brake 2 is activated, and the second timer circuit is charged and set. Then, the drive lock circuit is activated to perform a drive lock that prohibits driving of the solid state contactor. Then, when the operating time t1 of the first timer circuit has elapsed, the second timer circuit starts operating, and when the operating time t2 ends, the locked state that prohibits driving of the solid state contactor is released. Each timing waveform in the above operation is shown in FIG.

FIG. 9 is a circuit diagram showing a fifth embodiment of the present invention, and l-5 is a #5 interlock circuit.

2 and 3 are the same as in FIG.

In #5 interlock circuit 1-5, in addition to #4 interlock circuit 1-4 shown in FIG.
A first timer reset circuit consisting of gate A1 resistor RR and diode D4 is added. This timer reset circuit operates to reset the first timer circuit using the input signal from the operating power supply and the output signal of the transistor TR1 of the solid state contactor drive circuit, and is an interlock circuit that can stop the dynamic brake operation midway. It has become.

FIG. 10 is a waveform diagram for explaining the operation of FIG. 9.

The operation of FIG. 9 will be explained with reference to FIG. 1O. In FIG. 9, the operations of the solid state contactor drive circuit, load voltage detection circuit, first timer circuit excluding the timer reset circuit, dynamic brake drive circuit, second timer circuit, and drive lock circuit are as in FIG. 7. Since the circuit is the same as the first timer reset circuit, the explanation will be omitted and only the first timer reset circuit will be explained.

If you now turn the input signal from off to on and then off again,
As explained in FIG. 7, after time t has elapsed, the dynamic brake circuit is activated, and photo coupler 011 of the drive lock circuit is turned on, transistor TR of the solid state contactor drive circuit is locked, and the solid state contactor is activated. However, in Fig. 9, when the input signal is turned on again in this state, the H level signal due to the input signal and the transistor T of the solid state contactor drive circuit are activated.
The H level signal in the off state of R, is input to the NAND gate A5, and its output becomes the L level. This N
When the output of the AND gate A5 becomes L level, the charge in the timer capacitor C3 of the first timer circuit is rapidly discharged through the resistor R8 and the diode D4, resetting the first timer circuit. That is, the first timer circuit is returned to its initial state. The time tIA until this first timer operation is reset midway is the phototriac 01 in Figure 1O.
2. After the reset time tlA has elapsed, the phototriac 012 is turned off, the operation of the dynamic brake drive circuit is stopped, and the second timer circuit is activated, and after the timer operation time t2 has elapsed, the photocoupler 01 of the drive lock circuit. Turn off and unlock the solid state contactor drive circuit.
It allows solid state contactors to be re-driven. Timing waveforms for the above operation are shown in FIG. 1O.

Although each timer circuit in the above embodiments is an example of an analog circuit with a time constant for charging and discharging a charge in a capacitor, the present invention is not limited to this. Exactly the same operation can be performed by using a digital circuit that counts the time elapsed using a clock signal of a constant period.

[Effects of the Invention] As described above, in the present invention, in the interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, according to the invention according to claim 1, the operation A first timer circuit with a timer time t1 that starts timer operation simultaneously from the time when the input signal from the power source turns from on to off, and a second timer circuit with a timer time t2 shorter than the timer time t1. The contactor drive is locked during the first timer operation time, and the dynamic brake is operated during the first timer operation time after the second timer operation time has elapsed, so the setting of the dynamic brake operation time is By doing so, it is possible to prevent a short circuit between the solid state contactor and the dynamic brake circuit even if there is an erroneous operation.

According to the invention according to claim 2, in addition to the invention according to claim 11, a third timer circuit having a timer time t3 that starts timer operation from the end of the first timer operation time is provided, Since the contactor drive is locked during the first timer operation time and the third timer operation time, there is a waiting time between the end of the dynamic brake operation and the contactor drive, which prevents short circuits during mutual switching. effective.

According to the invention according to claim 3, when the input signal from the operating power source changes from on to off, the load voltage detection circuit actually detects the load voltage of the drive motor and the back electromotive force when the motor is stopped, and this detected value After determining that the voltage is below a predetermined voltage value, the timer circuit of timer time t1 is operated, and the contactor drive locking operation and dynamic braking operation are performed during the timer operation time of this first timer circuit. Therefore, in the event of a short-circuit accident in the solid-state contactor, the dynamic brake will not be driven when the back electromotive force of the motor is large, which has the effect of preventing a short-circuit between the solid-state contactor and the dynamic brake circuit.

According to the invention according to claim 4, in addition to the invention according to claim 3, a second timer circuit having a timer time t2 that starts timer operation from the end of the first timer operation time is provided, Since the contactor drive is locked during the first timer operation time and the second timer operation time, in addition to the effect of the invention according to claim 3, there is no need to wait between the end of the dynamic brake operation and the contactor drive. This is effective in preventing short circuits during mutual switching.

According to the invention according to claim 5, in addition to the invention according to claim 4, when the input signal is turned on by the first timer reset circuit during the operating time of the first timer circuit, the first According to claim 4, the dynamic brake operation is stopped midway by resetting the timer circuit.
In addition to the effects of the invention according to the above, there is an effect that the locked state of the solid-state contactor drive circuit can be shortened and released, and the solid-state contactor can be re-driven at an early stage.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a first embodiment according to the present invention;
1 is a waveform diagram for explaining the operation of FIG. 1, FIG. 3 is a circuit diagram showing a second embodiment of the present invention, and FIG. 4 is a waveform diagram for explaining the operation of FIG. 3. FIG. 5 is a circuit diagram showing a third embodiment of the present invention, FIG. 6 is a waveform diagram for explaining the operation of FIG. 5, and FIG. 7 is a fourth embodiment of the present invention. Circuit diagram, FIG. 8 is a waveform diagram for explaining the operation of FIG. 7, FIG. 9 is a circuit diagram showing the fifth embodiment according to the present invention, and FIG. 10 is for explaining the operation of FIG. 9. Waveform diagram, 1st
FIG. 1 is a conventional interlock circuit diagram of a contactor and a dynamic brake, and FIG. 12 is a waveform diagram for explaining the operation of FIG. 11. In the figure, 1-1 to 1-5 are #1 to #5 interlock circuits, IA is a conventional interlock circuit, 2 is a dynamic brake, 3 is a solid state contactor, and R
-R1R1o-R18 is a resistor, R9 is a variable resistor, C
1 to C4 are capacitors, D to D S D11 to D16 are diodes, A1 to A5 are NAND gates, B1 to B3
is a NOR gate, oll, O12 is a photocoupler, O
12 is a phototriac, TR and TR2 are transistors, vDD is a DC power supply, and M is a motor. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (5)

[Claims] (1) In an interlock circuit for a motor drive circuit that drives a motor using a solid state contactor and stops the motor using a dynamic brake, when the lock signal supplied by the drive lock circuit is not input, the input signal from the operating power supply is A contactor drive circuit that turns on the solid-state contactor when the input signal is turned on, and turns off the solid-state contactor when the input signal turns off; and a timer circuit that can be activated when the contactor drive circuit turns on; a first timer circuit that generates an output signal from a time point until the expiration of a first timer time set in advance; and a timer circuit that is preset to a time shorter than the first timer time from the time point at which the output signal of the first timer circuit is generated. a second timer circuit that generates an output signal until the second timer time expires; a drive lock circuit that supplies the contactor drive circuit with a lock signal that disables on-driving of the circuit; and generation of an output signal from the first timer circuit excluding the time when the output signal is generated from the second timer circuit. An interlock circuit characterized by comprising: a dynamic brake drive circuit that turns on the dynamic brake only during the time when the dynamic brake is turned on. (2) An interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, comprising: the contactor drive circuit according to claim 1, a first timer circuit, a second timer circuit, and The timer circuit is enabled to be activated during the time when the output signal is generated from the dynamic brake circuit and the first timer circuit, excluding the time when the output signal is generated from the second timer circuit. a third timer circuit that generates an output signal from the end of the output signal generated from the timer circuit until expiration of a preset third timer time; and a time period during which the output signal is generated from the first timer circuit; A drive lock circuit that supplies the contactor drive circuit with a lock signal that disables the contactor drive circuit from turning on even if the input signal is turned on again, only during the time when the output signal is generated from the third timer circuit. An interlock circuit characterized by comprising: (3) In an interlock circuit for a motor drive circuit that drives the motor using a solid state contactor and stops the motor using a dynamic brake, when the lock signal supplied by the drive lock circuit is not input, the input signal from the operating power supply is A contactor drive circuit that turns on the solid state contactor when the input signal is turned on and turns off the solid state contactor when the input signal turns off, and detects a load voltage generated in a rectifier load connected in parallel to the driven motor; A load voltage detection circuit that determines that the detected load voltage is lower than a predetermined set voltage and outputs a load low voltage detection signal, and a timer circuit that can be started by turning on the contactor drive circuit, and the input signal a first timer circuit that generates an output signal from the time when the load voltage detection circuit outputs the load low voltage detection signal until expiration of a preset first timer time when the load voltage detection circuit is turned off; and the first timer circuit. a drive lock circuit that supplies the contactor drive circuit with a lock signal that disables the contactor drive circuit from turning on even if the input signal is turned on again, only during the time when the output signal is generated from the first contactor drive circuit; An interlock circuit comprising: a dynamic brake drive circuit that turns on a dynamic brake only during the time when an output signal is generated from a timer circuit. (4) An interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, comprising the contactor drive circuit, the load voltage detection circuit, the first timer circuit, and the dynamic brake according to claim 3. a brake drive circuit; after the input signal is turned off, the timer circuit is enabled to start from the time when the load voltage detection circuit outputs a load low voltage detection signal; and an output signal generated from the first timer circuit; from the end of the preset second
a second timer circuit that generates an output signal until the timer time expires; An interlock circuit comprising: a drive lock circuit that supplies the contactor drive circuit with a lock signal that disables the contactor drive circuit from turning on even if the signal is turned on again. (5) In an interlock circuit for a motor drive circuit that drives a motor by a solid state contactor and stops the motor by a dynamic brake, the contactor drive circuit, the load voltage detection circuit, the second timer circuit, and the drive circuit according to claim 4, The lock circuit, the dynamic brake circuit, and the contactor drive circuit are turned on to put the timer circuit into a startable state, and the input signal is turned off, and then,
The timer operation starts from the time when the load voltage detection circuit outputs the load low voltage detection signal, and if the input signal is not turned on thereafter, the output signal is generated until a preset first timer time expires. and a first timer circuit that resets the timer operation and stops generating the output signal if the input signal is turned on after the timer operation starts and before the first timer time expires. An interlock circuit featuring: