JPH04290452A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To provide a semiconductor device having little variation of characteristics and uniform quality and its manufacture. CONSTITUTION:A semiconductor device has a plurality of wiring layers. A monitor circuit with which the characteristics of the basic elements and circuits of the semiconductor device can be measured before the final wiring process 5 is provided and spare elements for characteristic adjustment are provided in the monitor circuit. The variation of the characteristics which are predicted by the measurement of the monitor circuit before the final process 5 is adjusted by the connections of the spare elements selected by the selection of the connections of the final wiring. With this constitution, the optimum circuit characteristics can be obtained without cutting of the wiring layers.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device with little variation in characteristics and uniform quality, and a method for manufacturing the same.

In the manufacturing process of semiconductor devices, variations in characteristics due to the manufacturing process have become a problem. Under the circumstances described above, there is a demand for a semiconductor device and a method for manufacturing the same with less variation in characteristics and uniform quality.

0003

2. Description of the Related Art A conventional method for manufacturing a semiconductor device will be explained in detail with reference to FIG. FIG. 9 is a process diagram of a conventional semiconductor device manufacturing method, which includes a bulk manufacturing process 21 for forming various elements on a semiconductor substrate, an initial wiring process 22 for forming an initial wiring layer, and a final wiring layer. The process consists of a final wiring process 25 and a subsequent final process 26, and variations in the characteristics of semiconductor devices occur due to variations in the conditions of the manufacturing process.

In order to reduce this variation, it is necessary to manufacture semiconductor devices with high precision using high-precision manufacturing equipment, or to measure the characteristics after the completion of manufacturing the semiconductor device, and to use a laser or to detect overcurrent. Optimal characteristics are obtained by cutting the wiring layer and changing the circuit configuration by flowing the semiconductor device, but in this case, there is a problem with the reliability of the quality of the semiconductor device.

[0005] If semiconductor devices are manufactured using such highly precise manufacturing equipment, the manufacturing cost increases, and the circuit configuration must be changed by using a laser or by passing an overcurrent to cut the wiring layer to obtain the optimum characteristics. However, the quality of semiconductor devices is affected.

[0006]

[Problems to be Solved by the Invention] In the conventional semiconductor device manufacturing method described above, for example, when it is desired to form only some circuit characteristics such as an oscillation circuit or an analog circuit with high precision, it is difficult to perform high-precision manufacturing. There are problems in that manufacturing a semiconductor device using the device increases the manufacturing cost, and changing the circuit configuration by cutting the wiring layer affects the quality of the semiconductor device.

SUMMARY OF THE INVENTION In view of the above-mentioned circumstances, it is an object of the present invention to provide a semiconductor device with little variation in characteristics and uniform quality, and a method for manufacturing the same.

[0008]

[Means for Solving the Problems] A semiconductor device of the present invention includes:
A semiconductor device having multiple wiring layers, which includes a monitor circuit that can measure the basic element and circuit characteristics of the semiconductor device before the final wiring process, and a spare element for adjusting the characteristics in the circuit. The characteristics variation expected from the measurement results of this monitor circuit before the final wiring process can be suppressed by selecting the connection of the spare element by selecting the connection of the final wiring layer, and achieving the optimum without cutting the wiring layer. Configure to obtain circuit characteristics.

The method for manufacturing a semiconductor device of the present invention includes a step of measuring the monitor circuit after the initial wiring step is completed, and selecting one of a plurality of masks or reticles with different wiring patterns, and checking the measurement results. The method is configured to include a step of patterning using an optimal wiring pattern based on the method.

0010

[Operation] That is, in the present invention, a plurality of elements are formed in the bulk manufacturing process, a monitor circuit is measured after the initial wiring process is completed, and it is determined which of the plurality of elements is selected based on the measurement results of the monitor circuit. Determine whether to connect,
Based on this determination result, one of a plurality of masks or reticles with different wiring patterns to be used for forming the final wiring layer is selected, and the final wiring is formed using this mask or reticle, thus completing the initial wiring process. It is possible to correct variations in the quality of semiconductor devices at different times through connections in the final wiring process, and to manufacture semiconductor devices with uniform quality and less variation in characteristics.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to FIGS. 1 to 8. FIG. 1 is a process diagram of a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a diagram showing an embodiment of dimension adjustment of an output transistor according to the present invention.
FIG. 3 is a diagram showing an example of adjusting a resistance element according to the present invention,
FIG. 4 is a diagram showing an example of adjustment of a capacitive element according to the present invention,
FIG. 5 is an example of adjusting a delay circuit according to the present invention, FIG. 6 is a diagram (1) showing a monitor circuit according to an embodiment of the present invention, and FIG. 7 is a diagram (2) showing a monitor circuit according to an embodiment according to the present invention. )
, FIG. 8 is a process diagram for adjusting a resistance circuit according to the present invention.

FIG. 1 is a process diagram of a method for manufacturing a semiconductor device according to an embodiment of the present invention, including a bulk manufacturing process 1 in which various elements are formed on a semiconductor substrate, and an initial wiring process 2 in which an initial wiring layer is formed. , a measurement step 3 in which a monitor circuit formed in the semiconductor chip is measured, a selection step 4 in which it is determined which reticle or mask to use based on the measurement results, a final wiring step 5, and a subsequent final step. It consists of 6.

FIG. 2 shows three pairs of Pch transistors 7 and Nc
Figure 2(a) shows the case where only one pair of transistors is used, Figure 2(b) shows the case where two pairs of transistors are used, and Figure 2(c) shows the case of a transistor circuit consisting of h transistor 8. A case is shown in which three pairs of transistors are used.

FIG. 3 shows that the respective resistance values are R1, R2, R
3 shows the case of three resistors 9a, 9b, 9c,
The resistance value when ■ is connected is R1, the resistance value when ■ is connected is R1 + R2, the resistance value when ■ is connected is R1
+R2+R3.

FIG. 4 shows that the respective capacitance values are C1, C2, and C.
3 shows the case of three capacitive elements 10a, 10b, 10c, and the capacitance value when ■ is connected is C1+C2,
When (2) is connected, the capacitance value is C1+C2+C3.

FIG. 5 shows that the respective delay times are T1, T2,
The case of three delay circuits 11a, 11b, 11c of T3 is shown, and the delay time when ■ is connected is T1, ■
The delay time when 2 is connected is T1+T2, and the delay time when 2 is connected is T1+T2+T3.

FIG. 6 is a diagram showing a monitor circuit according to an embodiment of the present invention, and FIG. 6(a) shows an Nch transistor,
Figure 6(b) is an example of a Pch transistor, Figure 6(c) is a resistor, Figure 7(a) is an example of a capacitor, and Figure 7(b) is an example of a delay circuit monitor.These monitors may be provided for each chip. Alternatively, it is provided on a wafer basis and measurements are made under conditions close to actual usage conditions.

FIG. 8 shows an example of the process of adjusting the resistance circuit according to the present invention, and in the resistance circuit shown in FIG.
The flow of the process for determining the mask to be used from the results of measuring the monitor resistance is shown. One of the three masks is selected by comparing the resistance measurement results with a reference value.

That is, the judgment reference value of the higher resistance value is RH
, when the judgment reference value of the lower resistance value is RL,
If the resistance value R is higher than RH, select a mask to connect the wiring ■ in Figure 3 to reduce the resistance value, and if the resistance value R is higher than RL and lower than RH, connect the wiring ■ in Figure 3. When the resistance value R is lower than RL, a mask is selected and used to connect the wiring (2) in FIG. 3 so as to increase the resistance.

As shown in these examples, the final wiring process 5
By selecting the reticle or mask used for
A plurality of elements formed in advance in the bulk manufacturing process 1 are connected by final wiring, and a semiconductor device having desired characteristics can be manufactured with high precision.

[0021]

As is clear from the above description, according to the manufacturing method of the present invention, semiconductor devices with large variations in characteristics up to the initial wiring process can be fabricated without using high-precision semiconductor device manufacturing equipment. It has the advantage that it is possible to create a semiconductor device with less variation in characteristics by selecting the wiring.
It is possible to provide a semiconductor device and a method for manufacturing the same that can be expected to have significant economic and reliability effects.

[Brief explanation of the drawing]

FIG. 1 is a process diagram of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

FIG. 2 is a diagram showing an embodiment of dimension adjustment of an output transistor according to the present invention;

FIG. 3 is a diagram showing an example of adjustment of a resistance element according to the present invention,

FIG. 4 is a diagram showing an example of adjustment of a capacitive element according to the present invention,

FIG. 5 is a diagram showing an example of adjustment of a delay circuit according to the present invention,

FIG. 6 is a diagram (1) showing a monitor circuit according to an embodiment of the present invention;

FIG. 7 is a diagram (2) showing a monitor circuit according to an embodiment of the present invention;

[Fig. 8] Process diagram for adjusting the resistance circuit according to the present invention,

[
Figure 9: Process diagram of a conventional semiconductor device manufacturing method,

[Explanation of symbols]

1 is the bulk manufacturing process, 2 is the initial wiring process, 3 is the measurement process, 4 is the selection process, 5 is the final wiring process, 6 is the final process, 7 is a Pch transistor, 8 is an Nch transistor, 9a is resistance, 9b is resistance, 9c is resistance, 10a is a capacitive element, 10b is a capacitive element, 10c is a capacitive element, 11a is a delay circuit; 11b is a delay circuit; 11c is a delay circuit;

Claims (2)

[Claims] Claim 1: A semiconductor device having multiple wiring layers, comprising a monitor circuit capable of measuring the characteristics of basic elements and circuits of the semiconductor device before the final wiring process, and a monitor circuit for adjusting the characteristics in the circuit. The method is equipped with a spare element of A semiconductor device characterized in that optimum circuit characteristics can be obtained without any additional processing. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising the steps of: (3) measuring the monitor circuit after completing the initial wiring step (2); and a plurality of masks having different wiring patterns. Alternatively, a method for manufacturing a semiconductor device, comprising the step of (4) selecting one of the reticles and patterning it using an optimal wiring pattern based on the measurement results.