JPH04286130A - Algaas/gaas heterojunction transistor - Google Patents

Abstract

PURPOSE:To provide an AlGaAs/GaAs heterojunction transistor having a stopper layer for automatically stopping etching without using fluorocarbon gas. CONSTITUTION:At least one or more semiconductor layers 5 containing In are provided in GaAs layers 4, 5 present in an AlGaAs layer or on the AlGaAs layer. High selectivity of dry etching is obtained without using fluorocarbon gas, and a transistor structure having excellent controllability for a threshold value voltage is obtained.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to AlGaAs/GaA
s-heterojunction transistor.

0002

[Prior Art] Until now, GaAs semiconductor crystal AlGa
Selective dry etching technology for As semiconductor crystals is
Japan Journal of Applied Physics Letters Vol. 20, 1981, No. 847 by Hikosaka et al.
Page (Japan. J. Appl. Phys.
20 L847 (1981)), it was used to control the threshold voltage of an AlGaAs/GaAs heterojunction transistor. This is AlGaAs
2 nm of AlGaA in the GaAs layer grown on top of the layer.
An S layer is inserted and the dry etching is automatically stopped by this inserted layer. By this method, the distance between the gate electrode and the active layer, which determines the threshold voltage of the transistor, can be formed with good uniformity and reproducibility.

Selective dry etching utilizes the fact that the ease of evaporation of reaction products formed on the surface of a semiconductor crystal by an etching gas differs depending on the material. That is, it utilizes the fact that aluminum (Al) fluoride (AlFX) is much less likely to evaporate than gallium (Ga) fluoride (AlFX). As an etching gas, Hikosaka et al., Japan Journal of Applied Physics Letters Vol. 20, 1981, No. 8
47 pages (Japan. J. Appl. Phys.
．． 20 L847 (1981)), Freon-12 (CCl2) containing chlorine and fluorine atoms
F2) gas has been widely used so far.

0004

[Problems to be Solved by the Invention] However, with Freon-12 (CCl2F2) gas, the conditions for selective etching are close to the conditions for forming a carbon chloride-based (CClx) plasma polymerized film, so it is difficult to perform etching with good reproducibility. necessitated strict management of the etching equipment.

Furthermore, when attempting to lower the self-bypass voltage in order to reduce machining damage, a plasma polymerized film is formed, which limits the ability to perform low-damage machining.

Furthermore, there is a problem that fluorocarbon gas destroys the ozone layer, and it has been decided not to use it in order to protect the global environment, and an alternative gas for selective dry etching is needed.

[0007] The object of the present invention is to provide an A material having a stopper layer that automatically stops etching without using fluorocarbon gas.
An object of the present invention is to provide a GaAs/GaAs heterojunction transistor.

[0008]

[Means for Solving the Problems] The present invention provides AlGaAs
/GaAs heterojunction transistor, AlGa
GaA present in the As layer or above the AlGaAs layer
The s-layer is characterized by the presence of at least one semiconductor layer containing In.

[0009]

[Operation] In the conventional AlGaAs/GaAs heterojunction transistor, selective dry etching of AlGaAs and GaAs was performed using Freon 12 (CCl2 F2) gas. Therefore, a plasma polymerized film is likely to be formed, making it difficult to control etching conditions. There was also a limit to reducing machining damage. Furthermore, the use of chlorofluorocarbon gas, which depletes the ozone layer, is regulated.

According to the present invention, in dry etching using chlorine (Cl2) gas, GaAs and AlGaAs are etched at the same rate, but semiconductor layers containing indium (In), such as InGaAs layers and AlInGaAs layers, are etched at the same rate.
The layer is not etched by chlorine (Cl2) gas and can be selectively etched. Utilizing this In-containing semiconductor layer, an AlGaAs/GaAs heterojunction transistor that can be selectively dry etched without using fluorocarbon gas can be obtained.

[0011]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

Example 1 FIG. 1 shows an AlGaAs/GaAs heterojunction transistor structure of the present invention. This transistor structure consists of a non-doped GaAs buffer layer 2 grown to a thickness of 0.5 μm on a high-resistance GaAs substrate 1, and a Si-doped AlGaAs layer 3 (Si
2×1018cm-3 3nm), Si-doped G
aAs layer 4 (Si 2×1018cm-3 10n
The semiconductor layer 5 containing In0.15Ga0.
85As layer (Si 2×1018cm-3 2nm
), Si-doped GaAs layer 6 (Si 2×1018c
m-3 60 nm) is the grown structure.

The dry etching experiment is shown in FIG.
This was carried out using an ECR dry etching device that generates plasma using electron cyclotron resonance (ECR). Chlorine (Cl2) gas was used as the etching gas, and was introduced from the reactive gas inlet 17. The total flow rate was 34 sccm. The gas pressure in the plasma chamber 18 at this time is 7×10
-4 Torr. The plasma was incident with 300 W of power from a microwave 19 having a frequency of 2.45 GHz. Sample 10 is placed in the ECR position, and sample 20 is placed in the ECR position.
The frequency is 13.56MHz by the RF bias power supply 21.
, 50 W was applied to control the energy of ions incident on the sample 20. Here, 12 is a gas exhaust port, 23
is a magnetic field coil used for ECR discharge.

FIG. 3 shows GaInAs and AlGaInAs.
The etching rate with respect to the In composition ratio is shown. With only chlorine gas, GaAs and AlGaAs are etched at the same rate, and the selection ratio is 1. As the In composition increases, the etching rate decreases to 1/100 or less.

The transistor is manufactured by a method similar to that of a conventional recess structure field effect transistor. The manufacturing process diagrams are shown in FIGS. 4(a) to 4(c). First, as shown in FIG. 4(a), an ohmic electrode 7 is formed. Next, as shown in FIG. 4B, dry etching is performed using chlorine gas using the resist 8 as a mask. At this time, the etching is performed on the semiconductor 5 containing In, here In0.15
Ga0.85As layer (Si 2×1018cm-3
2nm). Thereafter, Al metal was deposited as a gate electrode 9, and lifted off to form a gate electrode to fabricate a transistor.

The threshold voltage of the manufactured transistor is
-1.5V, variation σvt is 20mV, etc.
Even with selective dry etching, a product equivalent to the conventional one was obtained.

Example 2 FIG. 5 shows AlGaAs/Ga for digital integrated circuits of the present invention.
The structure of an As heterojunction transistor is shown. This transistor structure has non-doped G on a high resistance GaAs substrate 1.
The aAs buffer layer 2 is grown to a thickness of 0.6 μm, and the Si-doped A
lGaAs layer 3 (Si 2 x 1018 cm-3 3
0 nm), non-doped In0.15Al0.85As layer 52 nm), Si-doped GaAs layer 4 (Si 2×1
018cm-3 20nm), non-doped In0.1
5Ga0.85As layer 5 (2 nm), Si-doped GaA
This is a structure in which an s-layer 6 (Si2×10 18 cm −3 50 nm) is grown, and there are two semiconductor layers containing In.

The transistor is manufactured by a method similar to that of a conventional recess structure field effect transistor. FIGS. 6(a) to 6(d) show diagrams of the manufacturing process. First, as shown in FIG. 6(a), an ohmic electrode 7 is formed. Next, as shown in FIG. 6B, using the resist 8 as a mask 7, dry etching is performed using chlorine gas on the gate portion of the transistor to be an enhancement type transistor. At this time, the etching is performed on the semiconductor layer 5 containing In, here In0.1
5Ga0.85As layer (Si 2×1018cm-3
2nm). Thereafter, by wet etching, a semiconductor layer 5 containing In, here an In0.15Ga0.85As layer (Si2×101
8cm-3 2nm). Next, the resist at the gate portion of the depression type transistor is opened, and dry etching using chlorine gas is performed again. As a result, the enhancement type transistor gate opening is 2
Semiconductor layer 5 containing In, here non-doped In
Etching is completed to the 0.15Al0.85As layer (2 nm) and then automatically stopped. Further, the depletion type transistor gate opening is etched up to one layer of the semiconductor layer 5 containing In, and is automatically stopped. Thereafter, Al metal was deposited and lifted off to form a gate electrode 9 and a transistor was manufactured.

At this time, the threshold voltage of the enhancement type transistor is Vt=0.13V, σvt=20mV, and the threshold voltage of the depletion type transistor is Vt=-0.50V.
, σvt=74mV.

Although an ECR dry etching apparatus was used here, by using chlorine (Cl2) gas,
Even with a conventional magnetron enhancement reactive etching (MERIE) device, selective etching was possible without generating a plasma polymerized film at a low self-bias voltage (10V), and processing damage was also reduced.

[0021]

As described above, according to the present invention, a transistor structure with high selectivity and good controllability of threshold voltage can be obtained without using fluorocarbon gas.

[Brief explanation of the drawing]

FIG. 1 is a structural diagram of an AlGaAs/GaAs heterojunction transistor of a first embodiment.

FIG. 2 is a diagram showing an ECR dry etching apparatus.

FIG. 3 is a diagram showing the In composition ratio dependence of the etching rate of GaInAs and AlGaInAs.

FIG. 4 is a manufacturing process diagram of the AlGaAs/GaAs heterojunction transistor of the first example.

[Fig. 5] AlG for digital integrated circuits, which is a second embodiment
FIG. 2 is a structural diagram of an aAs/GaAs heterojunction transistor.

FIG. 6 is a structural process diagram of an AlGaAs/GaAs heterojunction transistor of a second embodiment.

[Explanation of symbols]

1 High resistance GaAs substrate 2 GaAs buffer layer 3 AlGaAs 4 GaAs layer 5 Semiconductor layer containing In 6 GaAs layer 7 Ohmic electrode 8 Resist 9 Gate electrode 17 Reactive gas inlet 18 Plasma chamber 19 Microwave 20 Sample 21 RF bias power supply 22 Exhaust port 23 Magnetic field coil

Claims (1)

[Claims] Claim 1: In an AlGaAs/GaAs heterojunction transistor, an AlGaAs layer or an AlGaAs
AlG characterized in that at least one semiconductor layer containing In is present in the GaAs layer present above the s-layer.
aAs/GaAs heterojunction transistor.