JPH04285437A - Service interruption detector - Google Patents

Abstract

PURPOSE:To obtain a service interruption detector conforming to the required specification of an information processor without employing a large capacity smoothing capacitor by a method wherein two sets of service interruption detecting circuits having different reference voltages are provided and a switching signal is generated when signals of both the circuits are outputted. CONSTITUTION:If power supply is interrupted, a comparator 12 makes a signal rise when an input voltage becomes lower than a first reference voltage V2 which is a little lower than a rated input voltage and a timer 13 generates a first service interruption detection signal (S1) after a predetermined time passes. A comparator 22 generates a second service interruption detection signal (S2) when the input voltage becomes lower than a second reference voltage V3 which is a little higher than the input limit of a power supply apparatus. An AND circuit 3 generates a signal (S) for switching a power supply to a backup power supply. With this constitution, as the service interruption signal (S) is not generated for a predetermined time and the second reference voltage is set at a low value, the capacity of a smoothing capacitor can be reduced.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power outage detection device, and more particularly to a power outage detection device that detects that power input to a power supply device of an information processing device has stopped and generates a switching signal for switching to a backup power source.

0002

2. Description of the Related Art Generally, a power supply device for an information processing device such as a computer, as shown in FIG.
This DC power is converted to a predetermined voltage by a DC-DC converter 33 and output to an information processing device 34.

This power supply device includes a power outage detection circuit 35 that generates a power outage signal in the event of a power outage, and upon receiving this power outage signal, turns on a switch 37 of a battery 36 to turn on the power outage signal.
A power supply control section 38 is provided that generates an on instruction signal for causing the C-DC converter 33 to supply power from the battery 36. In the event of a power outage, the power source is switched to a battery power source, and the information processing device 34 can save the data being processed to a DASD or the like or supply power to the memory device.

As shown in FIG. 6, this power failure detection device rectifies an AC input with a diode 39, divides it with a resistor 40, and inputs it to a comparator 41.
2, a signal is generated when the divided voltage becomes lower than this reference voltage v2, and this signal is input to a timer to ensure that the voltage remains below the reference voltage even after a predetermined period of time, for example 10 msec, has elapsed after the signal is generated. It is designed to generate a power outage signal at certain times.

[0005]

[Problem to be Solved by the Invention] By the way, the operating condition for the power failure detection circuit is that it must operate at 90% of the rated input voltage V1 as a requirement for the information processing device, so it is necessary that the input voltage is 90% or more of the rated voltage. In order to avoid determining that there is a power outage, the above-mentioned reference voltage needs to be 90% or less of the rated input voltage.

[0006] Another requirement for the information processing apparatus is that it should operate normally for a predetermined period of time, for example 10 milliseconds, even if the AC power supply is interrupted. For this reason, in order to issue a power outage signal after 10 milliseconds or more have elapsed since the power outage occurred, a timer is provided as described above to satisfy a predetermined condition.

Therefore, during this 10 msec period, the smoothing capacitor 32 is discharged so that the input voltage to the DC-DC converter 33 becomes equal to or higher than the minimum operating voltage V3 of the DC-DC converter.

By the way, there are various voltage drop states during a power outage, as shown in FIG. 7 (shown in A to D in the figure).
For example, when the voltage instantaneously becomes 0V as shown by A in the figure, the capacitance C required for the smoothing capacitor is as shown in Equation 1.

[0009]

[Math 1]

However, for example, in the case indicated by D in the figure, 1
The starting point of 0 msec is T in the figure, and at this point the voltage of the capacitor is v2, so the capacitance C required for the smoothing capacitor is as shown in equation 2.

[0011]

[Math 2]

[0012] In this way, if the above two conditions are satisfied, there is a problem that the capacitance of the smoothing capacitor must be increased or the reference voltage must be lowered.

[0013] Therefore, the present invention provides a condition that the reference voltage for determining a power outage is not more than a predetermined value of the rated voltage without increasing the size of the smoothing capacitor, and an information processing device that does not recognize a power outage for a predetermined period of time after a power outage. The purpose is to provide a power outage detection device that meets the required standards.

[0014]

[Means for Solving the Problems] In the present invention, the means for solving the above problems is as shown in FIG. In a power outage detection device that generates a switching signal for switching to a backup power source, two sets of power outage detection circuits 1
. A comparator 12 raises a signal when
and a timer 13 that generates a power failure detection signal,
The second power failure detection circuit 2 compares the input voltage with a second reference voltage V4, which is slightly higher than the input limit voltage V4 of the rectifier circuit 21 and the power supply device, and determines that the input voltage has become lower than the second reference voltage. The present invention includes a comparator 22 that raises a first power failure detection signal when the power failure detection signal is output, and an AND circuit 3 that generates a switching signal when both the first and second power failure detection signals are output. be.

[0015]

[Operation] According to the present invention, two reference voltages are provided, and the signal rises after a predetermined period of time has passed since the first reference voltage V2, which is slightly lower than the rated input voltage V1, becomes lower than the first reference voltage V2 which is slightly lower than the rated input voltage V1. When the voltage becomes lower than the second reference voltage V3, the first power failure detection signal rises. And the first above
A switching signal is generated when both the second power failure detection signal and the second power failure detection signal are output.

Therefore, the power outage signal is not generated for a predetermined time after the first reference voltage drops, and the second reference voltage is generated from the input limit voltage V4 of the rectifier circuit 21 and the power supply device. Since this is a slightly high value and is set as a low voltage, the capacitance of the smoothing capacitor can be made small.

[0017]

[Embodiment] Hereinafter, an embodiment of a power failure detection device according to the present embodiment will be explained based on the drawings. 1 and 2 show an example of a power failure detection device according to this embodiment.

In this embodiment, as shown in FIG. 1, the power failure detection device includes first and second power failure detection circuits, and a first power failure detection signal and a second power failure detection signal from these two power failure detection circuits. and an AND gate that generates a power outage signal when both signals are output.

As shown in FIG. 1, the first power failure detection circuit includes a diode 14 that rectifies the alternating current, a resistor 15 that divides the rectified direct current voltage, and a first standard that uses the divided voltage. A comparator 12 generates a signal when the divided voltage becomes lower than the reference voltage V2 compared to the voltage V2, and a power failure detection signal is generated when the signal from the comparator 12 is continuously input for 10 msec or more. Timer 13 that generates
It consists of.

As shown in FIG. 2, the first reference voltage V2 is set slightly lower than the rated input voltage V1, for example, about 190V when the rated input voltage is 200V.

Further, as shown in FIG. 1, the second power failure detection circuit includes a diode 23 that rectifies the alternating current, a smoothing capacitor 24 that smoothes the rectified current, and a resistor that divides the rectified DC voltage. and a comparator 22 that compares the divided voltage with a second reference voltage V3 and outputs a power failure detection signal when the divided voltage is lower than the second reference voltage V3. .

[0022]The second reference voltage V3 is DC-
The input voltage is set at approximately 170V, which is slightly higher than the input limit voltage of 160V, which is the limit voltage V4 at which the DC converter operates normally.

The states of these voltages are shown in FIG. According to this embodiment, if a power outage occurs in this state, the reference voltage V
A power outage signal is not generated until 10 microseconds have passed after the voltage drops to 2. Further, the second reference signal V3 DC-
Since the value is set to a low value close to the input limit voltage V4 of the DC converter, the capacity required for the smoothing capacitor is

00
24]

[Math 3]

##EQU1## Therefore, the capacitance required for the capacitor can be reduced. Furthermore, the power outage signal output from the AND gate is generated when 10 μs or more have passed since the voltage dropped below the first reference voltage V2, and at that point it has dropped below the second reference voltage V3. Two conditions are required for the information processing device described above, namely, that it must operate at 90% of the rated input voltage V1, and that it must operate normally for a predetermined period of time, for example, 10 milliseconds, even if the power supply fails. The required capacity of the smoothing capacitor can be minimized while satisfying the above requirements.

FIG. 3 shows a power outage detection device according to a second embodiment of the present invention. In this example, the input voltage is three-phase AC. For this reason, the configuration of the second power failure detection circuit of the power failure detection circuit is such that a smoothing capacitor is not provided after the rectifier of the first embodiment.

That is, the power failure detection device includes a diode 51 that full-wave rectifies the three-phase alternating current input from the upstream side of the power supply, a resistor that divides this full-wave rectified voltage, and a divided voltage. It consists of a comparator 53 for comparing with a reference voltage.

That is, when three-phase alternating current is full-wave rectified. This is because, as shown in FIG. 4, the voltages of each phase overlap and the voltage does not drop below the reference voltage even momentarily unless there is a power outage, so there is no need to smooth the current. Therefore,
According to this embodiment, the configuration of the power failure detection circuit can be made simple.

[0029]

[Effects of the Invention] As explained above, according to the present invention,
Two reference voltages are provided, and the first reference voltage V2, which is slightly lower than the rated input voltage V1, becomes lower, and after a predetermined time elapses, the signal rises, and the input voltage becomes lower than the second reference voltage V3. At this time, the first power failure detection signal rises. A switching signal is generated when both the first and second power failure detection signals are output, and the power failure signal is output for a predetermined period of time after the first reference voltage drops. In addition, since the second reference voltage is set to a value slightly higher than the input limit voltage V4 of the rectifier circuit and the power supply device, it is possible to reduce the capacitance of the smoothing capacitor.

[Brief explanation of the drawing]

FIG. 1 is a diagram illustrating the principle and embodiment of the present invention.

FIG. 2 is a diagram showing the reference voltage of the power outage detection device shown in FIG. 1 and the state of a power outage.

FIG. 3 is a diagram showing a power failure detection device according to another embodiment of the present invention.

4 is a diagram showing a waveform after rectification of the power failure detection device shown in FIG. 3; FIG.

FIG. 5 is a diagram showing a power supply device of an information device to which the present invention is applied.

FIG. 6 is a block diagram showing a conventional power outage detection device.

FIG. 7 is a diagram showing reference voltages of the power failure detection device shown in FIG. 6;

[Explanation of symbols]

1 Power outage detection circuit 2 Power outage detection circuit 3 AND circuit 11 Rectifier circuit 12 Comparator 13 Timer 21 Rectifier circuit 22 Comparator

Claims (2)

[Claims] Claim 1: A power outage detection device that detects that power input to a power supply of an information processing device has stopped and generates a switching signal for switching to a backup power source, comprising two sets of power outage detection circuits (1, 2). The first power failure detection circuit (1) compares the input voltage with the rectifier circuit (11) and a first reference voltage V2 that is slightly lower than the rated input voltage V1, and determines that the input voltage is lower than the first reference voltage. It consists of a comparator (12) that raises a signal when the signal becomes low, and a timer (13) that generates a first power failure detection signal after a predetermined time has elapsed since the comparator (12) raises the signal. The second power failure detection circuit (2) compares the input voltage with a second reference voltage V3 which is slightly higher than the input limit voltage V4 of the rectifier circuit (21) and the power supply device, and determines whether the input voltage is the second reference voltage V3.
It is composed of a comparator (22) that raises the first power failure detection signal when the signal becomes lower than that of the first power failure detection signal, and an AND that generates a switching signal when both the first and second power failure detection signals are output. A power outage detection device comprising a circuit (3). 2. The first and second power failure detection circuits include full-wave rectifier means for extracting three-phase power from upstream of the rectifier circuit of the power supply device and full-wave rectifying it, and a full-wave rectified output voltage is determined in advance. 2. The power outage detection device according to claim 1, further comprising comparison means for generating said switching signal when the voltage falls below a predetermined voltage.