JPH04281667A - Picture data coder/decoder - Google Patents

Abstract

PURPOSE:To improve the processing speed by implementing coding/decoding processing of a picture data and magnification processing simultaneously with respect to the picture data coder/decoder able to attain magnification processing of magnification/ reduction or the like of an object picture and to apply the system even to an equipment not having a picture memory with a large capacity. CONSTITUTION:The coder/decoder consists of a converter 1 implementing conversion processing between pictures and an external device 2 requesting conversion processing of a picture data to the converter 1. The coding/decoding system is featured by applying magnification processing when an original picture data representing each picture element of an object picture in binary information, a run length data representing a picture element number of consecutive white picture elements or a picture element number of consecutive black picture elements of the original picture data as a result of run length coding and a code data representing the run length data subject to compression coding are converted mutually. Moreover, the magnification processing is implemented by referring a magnification table comprising the run length data after magnification corresponding to a run length data before magnification and the correction data.

Description

[Detailed description of the invention]

0001

[Field of Industrial Application] The present invention relates to an image data encoding/decoding device capable of scaling processing such as enlarging/reducing a target image, and is particularly applicable to an image transmission device such as a facsimile, an image storage device such as an image file, etc. It is suitable for application.

0002

2. Description of the Related Art For example, in a facsimile machine, an image signal read by an image sensor is binarized at a certain threshold level, and then an MH (Modified Huff)
man), MR (Modified READ), M
It is compressed and encoded into various binary image codes such as MR (Modified MR) and transmitted to the receiving side via a communication channel. On the receiving side, the received binary image code is decompressed and decoded, decoded into original image data, and recorded in the recording section.

[0003] If the original size on the sending side is different from the paper size on the receiving side, the sending side should either thin out pixel bits at a rate according to the magnification ratio (when reducing) or add them (when enlarging).
Performs scaling processing by .

0004

[Problems to be Solved by the Invention] However, in conventional devices, the image data encoding/decoding section and the scaling processing section are configured independently, which requires complex control, and it is difficult to improve the processing speed. There is an inconvenience that this cannot be planned. Furthermore, since the scaling process is performed on a pixel-by-pixel basis, the amount of data to be processed is enormous, requiring a large-capacity storage device, and this also poses the disadvantage that the processing speed cannot be improved.

[0005] The present invention improves processing speed by simultaneously performing image data encoding/decoding processing and scaling processing, and also provides image data encoding that can be applied to devices that are not equipped with a large-capacity image memory. /Decoding device.

[0006]

[Means for Solving the Problems] An image data encoding/decoding device according to the present invention includes original image data that represents each pixel of a target image as binary information, and the number or number of consecutive white pixels in this original image data. The present invention is characterized in that a scaling process is applied when mutually converting run-length data representing the number of consecutive black pixels by run-length encoding and code data representing the run-length data by compression encoding.

Further, the image data encoding/decoding device according to the present invention refers to a scaling table consisting of run length data after conversion and correction data corresponding to run length data before scaling during scaling processing. It is characterized by

[0008]

[Operation] In the configuration of the present invention, when image data to be converted is sent, the image data is transferred to a converting section that performs the conversion depending on the type of conversion to be performed. When the conversion process in the conversion unit is completed, the converted image data is temporarily stored in a holding buffer, and when the conversion requested in one stage of conversion is completed, the converted image data is transferred to an external device for processing. finish. If two or more stages of conversion are required,
The stored image data is transferred to another converter again and the conversion process is repeated.

[0009] The conversion mode is based on the following five modes, and is carried out singly or in any combination. ■Original image/
Run-length conversion, ■Run-length/original image conversion, ■Run-length/Code conversion, ■Code/Run-length conversion, ■Run-length/Run-length scaling conversion.

[0010] The scaling process in the horizontal (main scanning) direction in scaling conversion is performed for each byte of run-length data, and the run-length data and correction data after scaling that correspond to the horizontal scaling value of the run-length data are , is generated in advance as a scaling table, and arbitrary scaling processing is performed by referring to this table at the time of scaling. The scaling table is generated by an addition/subtraction algorithm that eliminates division in order to simplify the configuration and speed up processing, paying attention to the fact that the run length value after scaling must be an integer value. In the vertical (sub-scanning) direction magnification processing, reduction processing is performed by thinning out horizontal lines at predetermined intervals, and enlargement processing is performed by inserting predetermined identical lines redundantly.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing an embodiment in which an image data encoding/decoding apparatus according to the present invention is applied to a facsimile machine. The image data handled by this device is original image data that represents each pixel of the target image as binary bit information, and run-length encoded representation of the number of consecutive white pixels or the number of consecutive black pixels in the original image data. These are run-length data and code data such as MH, MR, and MMR, which are compressed codes for facsimile.

Configuration of the Embodiment This device is a conversion device 1 that performs conversion processing between each image data.
and an external device 2 that requests the conversion device 1 to convert image data. As the external device 2, for example, there is a microcomputer system.

The conversion device 1 includes a conversion control section 10 that receives commands from an external device 2 and controls various parts within the conversion device 1, an original image/run length conversion section 11 that converts original image data into run length data, A run-length/original image converter 12 that converts run-length data into original image data, a run-length/code converter 13 that converts run-length data into code data, and a code/run-length converter that converts code data into run-length data. It includes various conversion units such as a scaling conversion unit 14 and a scaling conversion unit 15 that performs scaling processing such as enlargement/reduction of image data. Also, a holding buffer 16 temporarily holds the image data output from each converter 11 to 15, an input/output buffer 17 that sends and receives image data to and from the external device 2, and an input/output buffer 17 that sends and receives address data to the external device 2. It includes an address buffer 18 for sending and receiving data.

Between the conversion device 1 and the external device 2, there are control lines 20 to 24 for transmitting and receiving various control signals between the conversion control unit 10 and the external device 2, an input/output buffer 17, and various control lines between the external device 2. External data bus 25 and address buffer 18 for sending and receiving command data and image data
An external address bus 26 for transmitting and receiving address data between the external devices 2 and 2 is provided.

Among the control lines 20 to 24, the control line 20 is a line for transmitting a control signal for sending command data or image data from the external device 2 to the conversion device 1,
The control line 21 is a line for transmitting a control signal for sending command data or image data from the conversion device 1 to the external device 2, and the control line 22 is a line for transmitting a control signal for sending command data or image data from the conversion device 1 to the external device 2.
The control line 23 is a line for transmitting a control signal indicating whether the data to be transmitted is data representing the conversion status or data representing the conversion data, and the control line 23 specifies DMA or non-DMA mode from the conversion device 1 to the external device 2. The control line 24 is a line for transmitting control signals for the external device 2.
This is a line for transmitting a control signal indicating whether the data to be transmitted from to the conversion device 1 is command data or image data.

The converting device 1 also includes converting sections 11 to 1.
5 each input and holding buffer 16 and input/output buffer 1
7, and a conversion output bus 31 that connects each output of the conversion units 11 to 15 and the input of the holding buffer 16.
, an internal address bus 32 that connects each output of the conversion units 11 to 15 and the address buffer 18, an instruction bus 33 that connects the conversion control unit 10 and the input/output buffer 17, a holding buffer 16 and an external data bus 25. Various buses such as an internal output bus 34 are provided to connect between the two.

Operation of the Embodiment In this configuration, the conversion control section 10 decodes the contents of command data sent from the external device 2 via the external data bus 25, input/output buffer 17 and command bus 33, After making selections such as whether to convert the entire screen or a portion of the screen and which converter among the converters 11 to 15 should convert the image data, a request is made to the external device 2 for the image data to be converted. .

When image data to be converted is sent from the external device 2 via the data bus 25, the conversion control unit 1
0 transfers this image data to the selected conversion unit via the input/output buffer 17 and the conversion input bus 30. When the conversion process of the image data is completed in the conversion section, the converted image data is transferred to the holding buffer 16 via the conversion output bus 31.
Store in.

When the conversion requested in one stage of conversion is completed, the image data stored in the holding buffer 16 is sent to the external data bus 25 via the internal output bus 34 and transferred to the external device 2. If two or more stages of conversion are required, the image data stored in the holding buffer 16 is transferred again to another conversion section and the same process as described above is repeated. The conversion mode is based on the following five modes (1) to (4), and is carried out singly or in any combination. ■ Original image → run length conversion (original image/run length conversion unit 11) ■ Run length → original image conversion (run length/original image conversion unit 12) ■ Run length → code conversion (run length/code conversion unit 13) ■ Code → run length conversion (code/run length conversion unit 14) ■ Run length → run length conversion (scaling conversion unit 1
5)

[0020] For example, if you send an A4 size document to the recipient B
If the data is to be transmitted on five sizes of paper, first, the original image/run length converter 11 converts the original image data into run length data. Next, the scaling conversion section 15
Performs reduction processing to change the size of A4 size image data to B5 size image data. In this case, the run-length data is data in the horizontal direction (main scanning direction), so the horizontal processing is a reduction process for the run-length data.
The vertical direction (sub-scanning direction) processing is line-by-line thinning processing in which one line is regarded as one pixel. Next, the reduced run-length data is converted into an MH code, which is a compressed code for facsimile, by the run-length/code converter 13, and transmitted to the destination facsimile machine via the external device 2.

[0021] By separately storing the address position in memory for each line of run-length data or code data, which is variable length data, as an address table, conversion processing from an arbitrary line can be easily performed. be able to.

Operation of the scaling converter 15 Next, the operation of the scaling converter 15, which is an important element of this embodiment, will be explained with reference to the flowchart shown in FIG. First, from the conversion control unit 10, the horizontal magnification value “a/b
” and the vertical magnification value “c/d” and store them in internal registers as data a, b, c, and d, respectively (step S1). Next, the value obtained by subtracting 1 from the denominator data d of the vertical scaling value is stored in the vertical conversion fractional value register Vf (step S2), and the horizontal line counter HL is reset to zero (step S3).

Next, a run length variable magnification table generation process is performed (step S4). This table generation process is
During the horizontal scaling process described later, a table corresponding to the horizontal scaling value "a/b" is created in advance so that the value after scaling of the run length data can be immediately obtained by referring to this table. This is the process of generating it. Details of this scaling table generation process will be described later.

Next, it is determined whether the count value of the horizontal line counter HL is the final horizontal line value (step S5).
). If it is the final horizontal line value, this means that the scaling process has ended, so the control unit 10 is notified of the end of conversion (step S6), and the process ends. If the count value is not the final horizontal line value, the value obtained by subtracting 1 from the denominator data b of the horizontal scaling value is stored in the horizontal conversion fractional value register Hf (step S7), and the horizontal scaling value is The contents of the line counter HL are sent to the conversion control section 10 (step S8).

Next, the numerator data c of the vertical scaling value is added to the vertical conversion fractional value register Vf (step S9),
The contents of the register Vf are compared with the denominator data d of the vertical scaling value (step S10). As a result of the comparison, “Vf <
d”, set the count value of the horizontal line counter HL to “
+1” and return to step S5 (step S11).
If “Vf≧d”, horizontal scaling processing (step S12
).

In the horizontal scaling process (step S12), the run length data of the horizontal line specified by the horizontal line counter HL is read from the external device 2 or the holding buffer 16, and the scaling process is performed for each byte of the run length data. This is a process of enlarging/reducing the direction. Details of this horizontal scaling processing will be described later.

When the horizontal scaling process (step S12) is completed, the value obtained by subtracting the denominator data d from the contents of the register Vf is stored in the register Vf (step S13), and the contents of the register Vf and the denominator data d are compared again. (Step S14). As a result, if "Vf <d", the count value of the horizontal line counter HL is advanced by "+1" and the process returns to step S5 (step S15), and if "Vf ≧ d", the denominator data d is calculated from the contents of the register Vf. After storing the subtracted value in the register Vf, the process returns to step S5 (step S16). Note that the reason why 1 is subtracted from the denominator data in steps S2 and S7 is to leave the first line and first pixel unchanged regardless of enlargement/reduction.

Vertical Magnification Processing Next, attention will be paid to the vertical scaling processing among these series of processes, and its operation will be explained using an example in which the vertical scaling value is "3/4". First, numerator data c (=3) and denominator data d (=4) are stored in an internal register (step S
1), the value 3 obtained by subtracting 1 from the denominator data d is stored in the register Vf.
(Step S2). Then register Vf
The molecular data c (=3) is added to (=3), and the addition result 6 is stored in the register Vf (step S9). Then, the contents 6 of the register Vf and the denominator data d (=4
) (step S10). In this case, “Vf
≧d” holds, so the horizontal scaling process (step S12
).

When the horizontal scaling process (step S12) is completed, the denominator data d (=4
) and store the obtained value 2 in register Vf (
Step S13). Then, the contents of the register Vf and the denominator data d are compared again (step S14). Since Vf = 3 and d = 4 this time, "Vf <d" is established, the horizontal line counter HL is incremented (step S15), and the process returns to step S5.

In the second round of processing, in step S9 "Vf
= 5'', and in the horizontal scaling process (step S12) it becomes 2.
Performs scaling processing on the run length data of the line. In the subsequent step S13, "Vf = 1", so the counter HL is incremented (step S15) and the process returns to step S5. In the third round of processing, “V
f = 4'', and the run length data of the third line is scaled in the horizontal scaling process (step S12). In the following step S13, "Vf = 0", so the counter HL is incremented (step S15) and the process returns to step S5.

In the fourth round of processing, in step S9 "Vf
= 3'', and since ``Vf <d'' is established in step S10, the count value of the counter HL is incremented by ``+1'' (step S11) without performing the horizontal scaling process (step S12), and the process returns to step S5. Therefore, the fourth line will be thinned out. In the fifth round, the process returns to the same process as the first round. This time, horizontal scaling processing (step S12) is performed on the run length data of the fifth line. In this way, the first to third horizontal lines among the four consecutive horizontal lines are subjected to scaling processing, and the fourth line is thinned out to perform reduction processing to the scaling value "3/4".

In the case of enlarging processing, since "Vf ≧ d" is established in step S14 in a certain number of rounds, the process returns directly to step S5 without incrementing the horizontal line counter HL, and the scaling processing of the same line is performed. Insert horizontal lines by overlapping.

Run length variable magnification table generation process Next,
The run-length scaling table generation process in step S4 will be described with reference to the flowchart shown in FIG. This table generation process is a process for previously generating run length data after scaling corresponding to the horizontal scaling value "a/b" as a table.

First, the numerator data a and the denominator data b of the horizontal scaling value are compared to determine whether the scaling is reduction or expansion (
Step S20). If the scaling is reduced (a≦b), the basic run length value register Bi is set to 0, and the molecule data a is stored in the basic fraction value register Bf (step S2
1). If the scaling is enlarged (a>b), the basic run length value register Bi is set to 1, and data "a-b" is stored in the basic fraction value register Bf (step S22). for example,
If the horizontal scaling value is "3/4", the contents of registers Bi and Bf are Bi = 0, Bf, respectively.
= 3, and if the scaling value is "7/5", the contents of registers Bi and Bf are respectively Bi.
=1, Bf =2. This means that the run length value register Bi stores the quotient of "a/b" and the fraction value register B
This corresponds to f storing the remainder of "a/b".

Next, the horizontal conversion run length value register Hi, the horizontal conversion fractional value register Hf, and the table counter TC are each cleared to zero (step S23).
, the process proceeds to table value setting processing (step S24). This setting process converts the input run length data to a predetermined scaling value "a".
/b", the integer value (quotient) is the conversion run length value TL[TC], and the fractional value (remainder) is the conversion fractional value T.
This is a process for generating a table M[TC]. Details of this table value setting process will be described later.

Next, it is determined whether the count value of the table counter TC is "63" or less (step S25), and the table value setting process (
Step S24) is repeated. This is because the facsimile machine expresses the input run length data in 64-decimal notation, and the process in step S24 is a process to obtain a table when the input run length data is 0 to 63.

Next, the contents of register Hi are stored in register Bi, and the contents of register Hf are stored in register Bf.
(step S26). Then, the table value setting process (step S27) is performed again, and is repeated until the count value of the table counter TC exceeds 103 (
Step S28). This process is to calculate the table as a multiple of 64 when the input run length data is 64 to 2560, and the table counter is 64 to 103 (=
63+2560/64).

Table value setting process Next, with reference to the flowchart shown in FIG. 4, the operation of the table value setting process (steps S24 and S27) will be explained using a reduction scaling example where the scaling value is "3/4". do. First, the contents of the horizontal conversion run length value register Hi and the contents of the horizontal conversion fractional value register Hf are converted into the conversion run length value TL.
[TC] and the converted fractional value TM[TC] (step S30). When TC=0, Hi=0, Hf=0
Therefore, TL[TC]=0 and TM[TC]=0.

Subsequently, the contents of register Hi and the contents of register Bi are added and stored in register Hi, and the contents of register Hf and register Bf are added and stored in register Hf (step S31). In the present case, Hi = 0, Hf = 0, Bi = 0, Bf = 3, so Hi = 0, Hf = 3.

Next, the content of the register Hf is compared with the denominator data b of the horizontal scaling value (step S32), and "H
f≧b”, 1 is added to the contents of register Hi, and denominator data b is subtracted from the contents of register Hf (step S33). Next, the table counter TC is incremented (step S34) and the process returns. "H
f <b'', the process jumps to step S33 and proceeds to step S34. In this case, since Hf=3 and b=4, step S33 is jumped.

Next, when TC=1, Hi=0, H
Since f = 3, TL[TC] = 0, TM[TC]
=3. The process is repeated in the same manner until TC=63, and TC=
Conversion run leg values TL[TC] and conversion fractional values TM[TC] from 0 to 63 are obtained as a table shown in FIG. When TC=64, step S25 to step S2
Proceed to step 6 and transfer the contents of register Hi to register Bi.
The contents of register Hf are respectively stored in register Bf. In this case, when the table value setting process in step S24 is completed, the contents of register Hi are 48 and the contents of register Bf are 0, so register B
i is set to 48, and register Bf is set to 0.

In the table value setting process of step S27, the contents 48 of the register Hi are converted into the converted run length value TL[
TC], and convert the contents 0 of register Hf to the converted fractional value TM.
[TC] (step S30). Next, the contents 48 of register Hi and the contents 48 of register Bi are added and stored in register Hi, and the contents of register Hf are set to 0.
and the contents 0 of register Bf are added to register Hf.
(Step S31). Therefore, Hi =96, Hf =0. Next, “
Hf <b'' (step S32), the process jumps to step S33 and proceeds to step S34, where the table counter TC is incremented to TC=65.
Return. Similarly, as shown in FIG.
A table of input run length data for each multiple of 4 is obtained, and when the value of the counter TC exceeds 103 (step S2
8) End the table value setting process and return.

Horizontal scaling process Next, the operation of the horizontal scaling process (step S12) is shown in FIG.
This will be explained with reference to the flowchart shown in . This process performs horizontal reduction/enlargement processing by scaling the run length data of the line specified by the horizontal line counter HL in units of bytes.

First, one byte of run length data is stored in the input register IL (step S40), and it is determined whether the stored data is the end data of the line or not.
Determine whether it is EOL (End Of Line) (
Step S41). If it is EOL, it means that the processing of the line has ended, and the process returns. If it is not EOL, refer to the scaling table generated in step S4 and set the conversion run length value TL[IL] and the conversion fractional value TM[
IL] and convert run length value accumulation register R.
i and the converted fractional value accumulation register Rf as an accumulated value (step S42).

Next, the content of the register Rf is compared with the denominator data b of the horizontal scaling value (step S43), and "R
f≧b”, 1 is added to the register Ri and b is subtracted from the register Rf (step S44). “Rf<
b", the process of step S44 is jumped. Next, it is determined whether the contents of the register IL are 63 or less (step S45), and if the contents exceed 63, the process returns to step S40, and if the contents are 63 or less, the process proceeds to conversion run length data output processing (step S46), which will be described later. When the conversion run length data output processing (step S46) is completed, the contents of the register Ri are cleared to 0 (step S47).
, return to step S40.

Converted Run Length Data Output Process Next, the operation of the converted run length data output process (step S46) will be explained with reference to the flowchart shown in FIG. First, it is determined whether the contents of the conversion run length value accumulation register Ri are 63 or less (step S50). If the contents of the register Ri exceed 63, the value obtained by adding 63 to a multiple of 64 is stored in the output register OL (step S5).
1) The stored integer value data is output as converted run length data (step S52). Register Ri
If the content is 63 or less, the processing of steps S51 to S52 is jumped.

Next, the fractional value obtained by dividing the contents of the register Ri by 64 is stored in the output register OL (step S53), and the stored fractional value is output as converted fractional value data (step S54).

[0048]

[Effects of the Invention] According to the present invention, the image data code/
By performing the decoding process and the scaling process at the same time, it is possible to simplify and speed up the process, and it is also possible to reduce/enlarge the image even when applied to an apparatus that does not have an image memory.

Furthermore, since a run-length scaling table is generated in advance and scaling processing is performed, arbitrary scaling processing is possible, and high-speed scaling processing is possible because batch conversion is performed in run-length units rather than pixel units. becomes. Further, since the proportional allocation to pixels is performed only by addition processing, the arithmetic processing is simplified, and furthermore, since the proportional allocation is performed, the image after conversion becomes clearer.

Furthermore, since an address table representing the memory location of each line is provided, conversion from any vertical (sub-scanning) position is facilitated, and partial image processing can be performed at high speed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a flowchart illustrating an example of scaling conversion processing.

FIG. 3 is a flowchart illustrating an example of run-length scaling table generation processing.

FIG. 4 is a flowchart illustrating an example of table value setting processing.

FIG. 5 is a table showing an example of a scaling table.

FIG. 6 is a flowchart illustrating an example of horizontal scaling processing.

FIG. 7 is a flowchart illustrating an example of conversion run length data output processing.

[Explanation of symbols]

1 Conversion device 2 External device 10 Conversion control section 11 Original image/run length conversion section 12
Run length/original image converter 13 Run length/code converter 14 Code/run length converter 15 Scaling converter 16 Holding buffer 17 Input/output buffer 18 Address buffer

Claims (5)

[Claims] 1. Original image data that represents each pixel of a target image as binary information, and a run length that represents the number of consecutive white pixels or the number of consecutive black pixels in this original image data by running length encoding. An image data encoding/decoding device characterized in that a scaling process is applied when mutually converting data and code data representing the run-length data compressed and encoded. 2. In claim 1, the scaling process includes:
An image data code which is characterized in that the scaling is performed by referring to a scaling table consisting of run length data after conversion and correction data corresponding to run length data before scaling.
decoding device. 3. The image data encoding/decoding apparatus according to claim 2, wherein the scaling table is generated in advance based on a designated arbitrary scaling factor. 4. According to claim 1, when storing the run length data or the code data in a memory,
An image data encoding/decoding device characterized in that it performs conversion processing from any specified line at high speed by holding address data representing the storage location on the memory of the beginning position of each line as a table. . 5. An original image/run length conversion unit that converts original image data obtained by binarizing each pixel of the target image into run length data representing the number of consecutive white pixels or the number of consecutive black pixels. And the above run length data,
A run-length/original image conversion unit that converts the above-mentioned original image data; a run-length/code conversion unit that compresses and encodes the above-mentioned run-length data and converts it into code data; and a run-length/code conversion unit that converts the above-mentioned code data into the above-mentioned run-length data. an image data encoding/decoding unit comprising: a code/run length conversion unit that performs scaling processing of the target image by enlarging or reducing the run length data; Device.