JPH0427737B2 - - Google Patents
Info
- Publication number
- JPH0427737B2 JPH0427737B2 JP63227156A JP22715688A JPH0427737B2 JP H0427737 B2 JPH0427737 B2 JP H0427737B2 JP 63227156 A JP63227156 A JP 63227156A JP 22715688 A JP22715688 A JP 22715688A JP H0427737 B2 JPH0427737 B2 JP H0427737B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- receiver
- switch
- test
- generator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000012544 monitoring process Methods 0.000 claims description 15
- 230000010355 oscillation Effects 0.000 claims description 7
- 238000004092 self-diagnosis Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000005856 abnormality Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000002405 diagnostic procedure Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は受信機の自己診断装置に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a receiver self-diagnosis device.
(従来の技術)
従来スーパーヘテロダイン受信機の動作状態や
故障の有無を判別するために、雑音発生器等によ
り受信信号に相当する信号を受信機の入力に加
え、周波数変換および増幅されたIF信号を監視
するという方法が採られてきた。(Prior art) In order to determine the operating status of a conventional superheterodyne receiver and the presence or absence of a failure, a signal equivalent to the received signal is applied to the input of the receiver using a noise generator, etc., and a frequency-converted and amplified IF signal is used. A method of monitoring has been adopted.
第2図は従来の診断方式を適用した受信機のブ
ロツク図である。同図において雑音発生器1の出
力は、受信信号と試験信号の切換スイツチ2およ
び高周波増幅器3を経由して、局部発振機5の出
力信号と共に次段の周波数変換器4に加えられ
る。中間周波数に変換された信号は、波器6を
経由して中間周波増幅器7に与えられる。この中
間周波増幅器7は数段の増幅回路により構成さ
れ、最終段の出力は復調器9に供給される。また
監視回路8は前記中間周波増幅器7の出力より信
号の供給を受けそのIF信号のレベルを検出し、
状態の監視が行われる。 FIG. 2 is a block diagram of a receiver to which a conventional diagnostic method is applied. In the figure, the output of the noise generator 1 is applied to the next stage frequency converter 4 along with the output signal of the local oscillator 5 via the receive signal/test signal changeover switch 2 and the high frequency amplifier 3. The signal converted to an intermediate frequency is given to an intermediate frequency amplifier 7 via a wave converter 6. This intermediate frequency amplifier 7 is composed of several stages of amplifier circuits, and the output of the final stage is supplied to a demodulator 9. Further, the monitoring circuit 8 receives a signal from the output of the intermediate frequency amplifier 7 and detects the level of the IF signal,
Conditions are monitored.
以上のように、雑音発生器1の出力(試験信
号)を受信機の入力端に加え監視回路8で検出出
力を監視すれば受信機の故障の有無を判別するこ
とができる。 As described above, if the output (test signal) of the noise generator 1 is applied to the input terminal of the receiver and the detection output is monitored by the monitoring circuit 8, it is possible to determine whether there is a failure in the receiver.
(発明が解決しようとする課題)
しかし乍ら、このような従来の自己診断方式は
受信機の入力に試験信号を与えIFの最終段で出
力を監視しているため、受信機の何れの回路又は
ステージが故障しているか診断することができな
いという欠点があつた。(Problem to be solved by the invention) However, since such conventional self-diagnosis methods apply a test signal to the input of the receiver and monitor the output at the final stage of the IF, Another disadvantage is that it is not possible to diagnose whether the stage is malfunctioning or not.
本発明は、上記の欠点を除去し、受信機が故障
した場合に、何れの回路が故障したのかを自動的
に判断し、故障回路を表示器に表示する自己診断
機能を備えた受信機である。そのため受信機の各
ステージの入出力端に試験信号に対し切換を行う
スイツチを設け、これを試験時に制御監視回路の
切換信号により適宜切り変える。同時に、制御信
号により高調波発生器又はIF信号発生器を起動
して必要な試験信号を後段から前段へと逐次自動
的に加え、すべてIF帯で信号検出器に入力して
検波し検出情報として前記制御監視回路に加え表
示器に異状の有無や異常個所を表示し、また、局
部発振回路のPLLのアンロツク信号を制御監視
回路に加えて同様に表示を行うようにしたもの
で、以下実施例につき図面により詳細に説明す
る。
The present invention eliminates the above-mentioned drawbacks and provides a receiver equipped with a self-diagnosis function that automatically determines which circuit has failed when the receiver fails and displays the failed circuit on a display. be. For this reason, a switch is provided at the input/output end of each stage of the receiver to change over the test signal, and the switch is changed as appropriate during the test using the changeover signal from the control and monitoring circuit. At the same time, the control signal activates the harmonic generator or IF signal generator to automatically add the necessary test signals from the latter stage to the first stage, all of which are input to the signal detector in the IF band for detection and detection information. In addition to the control monitoring circuit described above, the presence or absence of an abnormality and the location of the abnormality are displayed on the display, and the unlock signal of the PLL of the local oscillation circuit is added to the control monitoring circuit and similarly displayed. This will be explained in detail with reference to the drawings.
(実施例)
第1図は本発明の一実施例のブロツク図で、1
1は高調波発生器、12,14,17,19は受
信信号と試験信号を切換える独立のスイツチ、1
3は高周波入力同調回路、15は高周波増幅器、
16は周波数変換器、18は波器、20は中間
周波増幅器、21は復調器、22は局部発振回
路、23はIF信号発生器、24は信号検出器、
25は制御監視回路、26は表示器である。(Embodiment) Figure 1 is a block diagram of an embodiment of the present invention.
1 is a harmonic generator, 12, 14, 17, 19 are independent switches for switching between the received signal and the test signal, 1
3 is a high frequency input tuning circuit, 15 is a high frequency amplifier,
16 is a frequency converter, 18 is a wave generator, 20 is an intermediate frequency amplifier, 21 is a demodulator, 22 is a local oscillation circuit, 23 is an IF signal generator, 24 is a signal detector,
25 is a control monitoring circuit, and 26 is a display.
このブロツク図において、受信機が電波受信状
態(12,14,17,19のスイツチがR側に
セツトされている状態)になつている場合、アン
テナからの入力信号は、スイツチ12、高周波同
調回路13、スイツチ14を経由して高周波増幅
器15に加えられる。高周波増幅された信号は、
局部発振回路22の出力と共に次段の周波数変換
器16に加えられる。中間周波数に変換された信
号はスイツチ17、波器18、スイツチ19を
経由して中間周波増幅器20に加えられる。この
中間周波増幅器20は数段の増幅回路により構成
され、最終段の出力は復調器21に供給される。 In this block diagram, when the receiver is in the radio wave reception state (switches 12, 14, 17, and 19 are set to the R side), the input signal from the antenna is transmitted to the radio frequency tuning circuit 13 and is applied to the high frequency amplifier 15 via the switch 14. The high frequency amplified signal is
It is applied to the next stage frequency converter 16 together with the output of the local oscillation circuit 22. The signal converted to the intermediate frequency is applied to the intermediate frequency amplifier 20 via the switch 17, wave generator 18, and switch 19. This intermediate frequency amplifier 20 is composed of several stages of amplifier circuits, and the output of the final stage is supplied to a demodulator 21.
今、受信機を自己診断状態に設定したとする
と、まず制御監視回路25の制御信号Aにより
IF信号発生器23がONとなり切換信号aでスイ
ツチ19がT側に切り換えられ、IF信号発生器
23の出力はスイツチ19を経由して中間周波増
幅器20に供給される。中間周波増幅器20の出
力は、信号検出器24に供給され試験信号が検出
される。信号が検出された場合その情報はCPU
を内蔵した制御監視回路15に加えられる。制御
監視回路25は信号検出器24からの検出情報が
あつた場合、中間周波増幅器20は正常と判断
し、検出情報がない場合は故障と判断する。次に
切換信号aが断となりスイツチ19はR側に戻さ
れ切換信号bでスイツチ17がT側に切り換えら
れ、IF信号発生器23の出力はスイツチ17を
経由して波器18に供給される。以下同様にし
て波器18が正常か否か試験される。さらに次
のステツプでは制御信号Aの断でIF信号発生器
23はOFFに、制御信号Bにより高調波発生器
1はONにされ、スイツチ17は切換信号b断で
R側にスイツチ14は切換信号cでT側に切り換
えられる。高調波発生器11の出力はスイツチ1
4を経由して高周波増幅器15に供給され、高周
波増幅器15および周波数変換器16が異常なけ
れば信号検出器24で信号が検出され、その出力
は制御監視回路25に送られる。次のステツプで
スイツチ14は切換信号c断でR側に戻され、ス
イツチ12が切換信号dによりT側に切り換えら
れる。高調波発生器11の出力は高周波入力同調
回路13に供給され、高周波入力同調回路13の
試験が行われる。高周波入力同調回路13は受信
周波数帯を連続的に変化しているので、数個所の
試験周波数で行われ正常か否か判断される。この
試験を行うために試験信号として高調波発生器1
1を使用する。高調波発生器11は受信周波数帯
にて数10kHzの高調波がほぼ均一に出力されてい
る。また、PLLを使用した局部発振回路22か
らはPLLのアンロツク信号が制御監視器25に
供給されており、局部発振回路22の故障を検出
できるようにしている。 Now, assuming that the receiver is set to the self-diagnosis state, first, the control signal A of the control monitoring circuit 25
The IF signal generator 23 is turned on, the switch 19 is switched to the T side by the switching signal a, and the output of the IF signal generator 23 is supplied to the intermediate frequency amplifier 20 via the switch 19. The output of the intermediate frequency amplifier 20 is supplied to a signal detector 24 to detect a test signal. If a signal is detected, the information is sent to the CPU
The control and monitoring circuit 15 has a built-in control and monitoring circuit. The control monitoring circuit 25 determines that the intermediate frequency amplifier 20 is normal when there is detection information from the signal detector 24, and determines that the intermediate frequency amplifier 20 is malfunctioning when there is no detection information. Next, the switching signal a is disconnected, the switch 19 is returned to the R side, and the switching signal b switches the switch 17 to the T side, and the output of the IF signal generator 23 is supplied to the wave generator 18 via the switch 17. . Thereafter, the wave device 18 is tested to see if it is normal or not in the same manner. Furthermore, in the next step, the IF signal generator 23 is turned OFF when the control signal A is disconnected, the harmonic generator 1 is turned ON due to the control signal B, the switch 17 is set to the R side when the switching signal b is disconnected, and the switch 14 is set to the R side when the switching signal B is disconnected. You can switch to the T side with c. The output of the harmonic generator 11 is the switch 1
If the high frequency amplifier 15 and the frequency converter 16 are normal, the signal is detected by the signal detector 24 and its output is sent to the control monitoring circuit 25. In the next step, the switch 14 is returned to the R side by the disconnection of the switching signal c, and the switch 12 is switched to the T side by the switching signal d. The output of the harmonic generator 11 is supplied to the high frequency input tuning circuit 13, and the high frequency input tuning circuit 13 is tested. Since the high frequency input tuning circuit 13 continuously changes the reception frequency band, the test is performed at several frequencies to determine whether it is normal or not. To perform this test, harmonic generator 1 is used as a test signal.
Use 1. The harmonic generator 11 outputs harmonics of several tens of kHz almost uniformly in the receiving frequency band. Further, a PLL unlock signal is supplied from the local oscillation circuit 22 using a PLL to the control monitor 25, so that a failure of the local oscillation circuit 22 can be detected.
このような試験を制御監視回路25の制御によ
り自動的に行えば受信機の何れの部分が故障して
いるか簡単に診断することができる。また故障個
所は表示器26により記号で表示される。 If such a test is automatically performed under the control of the control and monitoring circuit 25, it is possible to easily diagnose which part of the receiver is malfunctioning. Furthermore, the failure location is indicated by a symbol on the display 26.
(発明の効果)
以上説明したように、受信機が故障した場合
に、本発明による自己診断機能を動作させれば受
信機のどの部分が故障しているか一目瞭然に判断
することができ、受信機の修理時間を大幅に短縮
できるという利点がある。(Effects of the Invention) As explained above, when the receiver malfunctions, by operating the self-diagnosis function according to the present invention, it is possible to determine at a glance which part of the receiver is malfunctioning. This has the advantage of significantly reducing repair time.
第1図は本発明の一実施例のブロツク図、第2
図は従来例のブロツク図を示す。
11…高調波発生器、12,14,17,19
…スイツチ、13…高周波入力同調回路、15…
高周波増幅器、16…周波数変換器、18…波
器、20…中間周波増幅器、21…復調器、22
…局部発振回路、23…IF信号発生器、24…
信号検出器、25…制御監視回路、26…表示
器。
FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
The figure shows a block diagram of a conventional example. 11...Harmonic generator, 12, 14, 17, 19
...Switch, 13...High frequency input tuning circuit, 15...
High frequency amplifier, 16... Frequency converter, 18... Wave converter, 20... Intermediate frequency amplifier, 21... Demodulator, 22
...Local oscillation circuit, 23...IF signal generator, 24...
Signal detector, 25...Control monitoring circuit, 26...Display device.
Claims (1)
周波数帯の試験信号を発生する高調波発生器11
と、IF試験信号を発生するIF信号発生器23と、
受信信号と試験信号を切り換えるスイツチ12,
14,17,19と、中間周波増幅器20の出力
を検出する信号検出器24と、上記各部の切換・
制御・監視を行い、また局部発振回路22の
PLLのアンロツク信号を監視する制御監視回路
25と、故障個別を表示する表示器26とを備
え、試験信号を受信機の各ステージの入力端に加
えて後段から前段へと逐次自動的に試験を行うこ
とを特徴とする受信機の自己診断装置。1 In a superheterodyne receiver, a harmonic generator 11 that generates a test signal in the receiving frequency band
and an IF signal generator 23 that generates an IF test signal.
switch 12 for switching between the received signal and the test signal;
14, 17, 19, a signal detector 24 for detecting the output of the intermediate frequency amplifier 20, and a switching/switching circuit for each of the above parts.
It controls and monitors the local oscillation circuit 22.
Equipped with a control monitoring circuit 25 that monitors the PLL unlock signal and a display 26 that displays individual failures, the test signal is applied to the input terminal of each stage of the receiver and the test is automatically performed sequentially from the later stage to the earlier stage. A receiver self-diagnosis device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63227156A JPH0275228A (en) | 1988-09-09 | 1988-09-09 | Self-diagnostic device for receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63227156A JPH0275228A (en) | 1988-09-09 | 1988-09-09 | Self-diagnostic device for receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0275228A JPH0275228A (en) | 1990-03-14 |
JPH0427737B2 true JPH0427737B2 (en) | 1992-05-12 |
Family
ID=16856374
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63227156A Granted JPH0275228A (en) | 1988-09-09 | 1988-09-09 | Self-diagnostic device for receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0275228A (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0480135U (en) * | 1990-11-27 | 1992-07-13 | ||
JP4614248B2 (en) * | 2000-06-14 | 2011-01-19 | マスプロ電工株式会社 | PLL synthesizer monitoring method and LNB apparatus |
JP4325976B2 (en) * | 2002-10-29 | 2009-09-02 | Nsc株式会社 | Receiving machine |
JP4672696B2 (en) * | 2007-03-26 | 2011-04-20 | 日本電信電話株式会社 | Software updating method and software updating apparatus for wireless terminal |
US8385869B2 (en) | 2007-11-07 | 2013-02-26 | Qualcomm, Incorporated | Embedded module receiver noise profiling |
-
1988
- 1988-09-09 JP JP63227156A patent/JPH0275228A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0275228A (en) | 1990-03-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |