JPH04268556A - Formation of resist pattern - Google Patents

Abstract

PURPOSE:To enable space patterns of a 0.2mum level to be formed by a stepper and to obtain resist patterns with a wide process margin. CONSTITUTION:A resist is exposed via a photomask 31 having light shielding patterns 39 for light control, light shielding patterns for forming electrodes and phase shift patterns having phase shifters 37 arrayed at fine pitches at the time of forming the resist patterns by a stepping method. The fine patterns are obtd. by utilizing the edge lines of the phase shifters 37. Further, the sizes of the patterns to be transferred are controlled in accordance with the light shielding patterns 39 for light control. Holes or pillar patterns are obtd. by patterning the edge lines so as to intersect these lines by using the mask twice.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to semiconductor devices (IC, L
The present invention relates to a method for forming a resist pattern used in manufacturing processes such as SI).

0002

[Prior Art] Conventional technologies in this field include (1) Japanese Patent Publication No. 62-59296;
2) Proceedings of the 37th Symposium on Semiconductor Integrated Circuit Technology (December 1989) p. There were those shown in 13 to 18 "Resist pattern formation by phase shift exposure method".

[0003] In the field of photolithography technology using projection exposure, various techniques have been proposed that can form fine resist patterns that are compatible with higher integration of semiconductor devices. Among these techniques, one of the techniques that is attracting attention is a technique called a phase shift method. This method is disclosed, for example, in the above-mentioned Publication No. (1), and in order to increase the optical contrast on the wafer, a transparent thin film (phase shifter) that shifts the phase of exposure light is partially provided on the photomask. This is a technology that improves the resolution of projection exposure methods.

As an example of application, there is a resist pattern forming method using a phase shift method disclosed in the above-mentioned document (2). The photomask disclosed in the above-mentioned public notice (1) is shown in Figure 8.
As shown in a partial cross-sectional view of FIG. A phase shifter 17 that gives a phase difference to the light passing through the pair of transmission parts was provided on at least one of the pair of transmission parts so that the light would not interfere and strengthen each other.

By using this photomask 15,
Since the optical contrast of the light shielding part 11 and the transmitting part 13 on the resist is improved, a finer line and space pattern can be obtained than in the case where no phase shifter is provided. Further, in the resist pattern forming method disclosed in the above-mentioned document (2), for example, as shown in the plan view of the main part in FIG. Transparent part 2
3 is created, and a fine isolated pattern of negative resist is formed using a photomask 27 provided with a shifter 25 (indicated by a dotted line) on the transmitting part 23 so as to invert the phase of the transmitted light in that part. It was something to do.

[0006]

[Problem to be solved by the invention] However, with any of the methods described above, it is difficult to form patterns at the 0.2 μm level in IC and LSI patterns, which will become increasingly finer in the future, especially space patterns. is extremely difficult. An object of the present invention is to provide an excellent resist pattern forming method with a wide process margin in order to solve the above-mentioned problem that it is difficult to form a 0.2 μm level space pattern using a projection exposure apparatus. do.

[0007]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides (A) dimming resistors arranged at a fine pitch below the resolution limit when forming a resist pattern by a projection exposure method. The resist is exposed through a photomask including a light-shielding pattern, a light-shielding pattern for electrode formation, and a phase shift pattern having a phase shifter.

Furthermore, a fine pattern can be obtained by utilizing the edge line of the phase shifter. Furthermore, the dimensions of the pattern to be transferred are controlled based on the dimming light shielding pattern. In addition, a hole or pillar pattern is obtained by using a mask twice and patterning so that the edge lines intersect. (B) When forming a resist pattern using the projection exposure method, the resist pattern is formed using a photomask that is formed so that part or all of the edge of the phase shifter is located on the light control film that controls the light transmittance. It is designed to expose to light.

Furthermore, a fine pattern can be obtained by utilizing the edge line of the phase shifter. Furthermore, the dimensions of the pattern to be transferred are controlled by the transmittance of the light control film. In addition, a hole or pillar pattern is formed by using a mask twice and patterning so that the edge lines intersect.

0010

[Operation] According to the present invention, in the resist pattern forming method, when a negative resist is used, a fine space pattern is formed, and when a positive resist is used, a line pattern is formed using an exposure optical system. The system uses light blocking patterns for dimming arranged at a fine pitch below the resolution limit,
A photomask including a light shielding pattern for electrode formation and a phase shift pattern having a transparent phase shifter for shifting the phase of exposure light is used, and the photomask is transferred by a stepper.

In this photomask, transfer is performed using the edge portion of the phase shifter. The edge portion of the phase shifter creates a very narrow area of low light intensity on the transferred wafer, so this is utilized. At this time, the fine light-adjusting light shielding pattern does not form an image on the wafer, but only acts to reduce the amount of light. This allows the light intensity on the wafer to be controlled and the resist dimensions to be controlled. Further, the unnecessary portions of the formed unexposed portions are re-exposed using another normally constructed mask. Also,
In this method, the mask can be used twice to cross the edge lines to form a fine hole or pillar pattern.

In addition, in the resist pattern forming method, the phase of the exposure light is shifted to form a fine space pattern when a negative resist is used, and a line pattern when a positive resist is used. A photomask with a transparent thin film (phase shifter) and a light control film that adjusts the amount of light is transferred using a stepper. In this photomask, transfer is performed using the edge portion of the phase shifter. The edge portion of the phase shifter creates a very narrow area of low light intensity on the transferred wafer, so this is utilized. At this time, areas with partially different transmittances are provided on the mask substrate (reticle substrate) to control the light intensity on the wafer and control the resist dimensions. The unnecessary unexposed portions formed here are re-exposed using another normally constructed mask. Further, it is also possible to use the photomask having the above-mentioned phase shifter twice and cross the edge line portions to form a fine hole or pillar pattern.

[0013]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Here, as an example of pattern application, a gate pattern mask of GaAs-IC was produced. FIG. 1 is a plan view schematically showing a first photomask showing an embodiment of the present invention, FIG. 1(a) is an overall plan view thereof, and FIG. FIG. FIG. 2 is a plan view schematically showing a second photomask showing an embodiment of the present invention.

First, the first photomask 31 is formed on a dimming light shielding pattern 39 having a transmittance of 0 to 90% below the pattern area. Further, the first photomask 31 includes a light shielding portion 33 in a portion corresponding to the wiring portion of the gate electrode. Furthermore, this first photomask 31 is
The phase shifter 37 includes a phase shifter 37 for the phase shift method provided over both the light shielding part 33 and the light transmitting part 35, and the phase shifter 37 is provided so that a part 37a of the edge part is located inside the light shielding part 33. equip As will be described later, a portion 37a of the edge portion of the phase shifter 37 functions as a mask for forming a portion of the gate electrode that provides the gate length.

Here, the dimming light shielding pattern 39 in this embodiment is composed of fine chrome patterns arranged at a pitch below the resolution limit of the exposure optical system. Here, chromium with a size of 0.2 μm ▲□▼ is transferred onto the wafer.
1 (0.4 μm) pitch is shown. With the stepper and i-line NA 0.42 optical system used in the next patterning experiment, the chromium pattern at this pitch will only uniformly decrease the light intensity distribution on the wafer, and the optical contrast will be approximately 0. . In other words, the light intensity can be lowered without affecting patterning.

The light shielding portion 33 is made of chromium, and the phase shifter 37 is made of electron beam resist OEBR-100 (manufactured by Tokyo Ohka Kogyo Co., Ltd.). The thickness of the phase shifter 37 is 310 μm. By passing through this phase shifter 37, the phase of the i-line light used for patterning is shifted by 180°. On the other hand, the second photomask 41 is
Region 43 corresponding to the light shielding part 33 of the first photomask 31
a and the phase shifter 37 formed on the first photomask 31
A light-shielding portion 43 has a region 43b corresponding to the edge portion 37a (a region having a width sufficient to include this edge portion 37a in the gate length direction), and the rest is a light-transmitting portion 42. [Patterning experiment 1] First, by spin coating, LMR-UV [Fuji Pharmaceutical Co., Ltd.
Co., Ltd.] to a thickness of 1 μm.

Next, this silicon substrate coated with resist is baked at 70° C. for 1 minute using a hot plate. Next, this sample was exposed to the i-line projection exposure apparatus RA101ULI.
I [manufactured by Hitachi, Ltd.], and 15
A first exposure is performed with an exposure amount of 0 mJ/cm2. The latent image formed on the resist by this first exposure is as shown in FIG. That is, in FIG. 3, resist 5
1, the area corresponding to the light shielding part 33 of the first photomask 31 in FIG. This becomes the exposure section 55.

At this time, in the portion of the mask pattern which is similar to the first photomask 31 and does not have a light shielding pattern for dimming, the resist on the wafer has a current of substantially 150 mJ/cm.
2, but the current light control light shielding pattern 39
In order to cut 25% of the light, the corresponding area is 1
It receives exposure of 50×0.75=112.5 mJ/cm2.

Next, the photomasks of the projection exposure apparatus are changed from the first photomask 31 to the second photomask 41 shown in FIG.
Instead, a second photomask 4 is applied to the first exposed sample.
1 and a second exposure with an exposure dose of 120 mJ/cm2. The latent image formed on the resist 51 by this second exposure is as shown in FIG. That is, the light shielding portion 3 of the photomask 31 shown in FIG. 1 of the resist 51 in FIG.
Only the area corresponding to 3 and the area corresponding to part 37a of the edge portion of the phase shifter 37 become the unexposed area 53a (unexposed area of the second exposed area), and all other areas are exposed. .

The second exposed sample is baked on a hot plate at 110° for 1 minute. Thereafter, this sample is spray developed for 30 seconds using an LMR-UV developer (manufactured by Fuji Pharmaceutical Co., Ltd.). The resist pattern obtained after development is as shown in FIG. In FIG. 5, 61 is a resist pattern, 63 is a resist remaining portion,
65 is a portion where the resist is dissolved by the developer and the silicon substrate is exposed. This resist pattern 61
Measure the dimension L of the part that gives the gate length using the SEM length measuring machine S-
6000 [manufactured by Hitachi, Ltd.], the area corresponding to the 100% transmittance area of the second mask was 0.1 μm, and the area corresponding to the 80% transmittance area was 0.1 μm. 15 μm, the part corresponding to 65% transmittance is 0
．． It was found to be 2 μm. After depositing a gate electrode forming metal on this resist pattern 61, lift-off is performed to obtain gate electrodes having gate lengths of 0.1 μm, 0.15 μm, and 0.2 μm. [Patterning experiment 2] The exposure amount during the first exposure was 5
Multiple values range from 0 mJ/cm2 to 150 mJ/cm2, and the exposure amount during the second exposure is 120 mJ
/cm2, and conduct a patterning experiment using the same procedure as patterning experiment 1.

Next, the dimension L of the portion given by the gate length of each resist pattern with a different first exposure amount for a pattern without a dimming light shielding pattern on this sample is determined by the SE
Measure each using M length measuring machine S-6000. Figure 6 shows how the dimension L changes with respect to the first exposure dose, with the horizontal axis representing the first exposure dose (mJ/cm2) and the vertical axis representing the measured gate length of the resist pattern. The dimension L (μm) of the provided portion is shown. It can be seen that the dimensions of the resist pattern can be controlled by changing the exposure amount. It can be seen that the dimensions can be controlled with the same amount of exposure by adjusting the amount of exposure using the light-adjusting light-shielding pattern in the same way. [Dimming Light-shielding Pattern] Examples of various light-controlling light-shielding patterns for obtaining various transmittances include those shown in FIG. Here, a is the pitch below the resolution limit, b
is the dimension of the shading pattern in the x direction, c is the y dimension of the shading pattern
It is the dimension in the direction. That is, b×c (however, both b and c are a
The dimming light shielding patterns (below) are arranged in both the x and y directions at a pitch a that is less than the resolution limit.

With this configuration, the overall transmittance at this portion is b×c/a2. The light shielding pattern does not necessarily have to be rectangular. Here, the pitch a below the resolution limit is given by the numerical aperture of the exposure optical system being NA and the wavelength being λ.
It is preferable that a<0.5·λ/NA. Next, a resist pattern forming method showing another embodiment of the present invention will be described.

FIG. 10 is a plan view schematically showing a first photomask showing another embodiment of the present invention, and FIG. 11 is a schematic plan view showing a second photomask showing another embodiment of the invention. FIG. First, the first photomask 71 is provided with a light control film 73 in its pattern area, and is provided with a light shielding part 75 in a portion corresponding to the wiring part of the gate electrode. Furthermore, this first
The photomask 71 includes a phase shifter 77 for the phase shift method provided over both the light shielding part 75 and the light control film 73. As will be explained later, a portion 77a of the edge portion of the phase shifter 77 functions as a mask for forming a portion giving the gate length of the gate electrode.

The light control film 73 having the transmittance of this embodiment is made of very thin chromium with a thickness of 30 Å or less. For example, 80% with a thin chromium film thickness of 20 Å,
A thin chromium film with a thickness of 30 Å has a transmittance of 65%. The light shielding portion 75 is made of chromium with a thickness of 800 Å, and the phase shifter 77 is made of electron beam resist OEBR-100 (manufactured by Tokyo Ohka Kogyo Co., Ltd.). The thickness of the phase shifter 77 is 310 μm. By passing through this phase shifter, the i-line light used for patterning has a phase of 1.
80 degrees off.

On the other hand, the second photomask 81 has a region 83a corresponding to the light shielding portion 75 of the first photomask 71 and a region corresponding to the edge portion 77a of the phase shifter 77 provided on the first photomask 71 (however, This edge portion 77a
) 83
A light shielding part 83 is provided on top of b, and the rest is a light transmitting part 82.
It becomes. [Patterning Experiment 1] In this example, LMR-UV [Fuji Pharmaceutical Co., Ltd.] was applied as a negative resist onto a silicon substrate with a diameter of 3 inches using a spin coating method.
[manufactured by]] to a thickness of 1 μm.

Next, this silicon substrate coated with resist is baked at 70° C. for 1 minute using a hot plate. Next, this sample was exposed to the i-line projection exposure apparatus RA101ULI.
I (manufactured by Hitachi, Ltd.), and a first exposure is performed at an exposure amount of 150 mJ/cm2 through a first photomask 71 shown in FIG. The latent image formed on the resist by this first exposure is as shown in FIG.

An area 93 of the resist 91 in FIG. 12 corresponding to the light shielding part 75 of the first photomask 71 in FIG. , the other areas are exposed area 9
It becomes 5. Further, at this time, in the pattern on the region with 100% transmittance, the resist is substantially 150 mJ/cm2
However, the area corresponding to the 80% transmittance area is exposed to 120 mJ/cm2, and the pattern on the 65% area is exposed to 97.5 mJ/cm2.

Next, the photomask of the projection exposure apparatus is shown in FIG.
In place of the first photomask 71 shown in FIG. 11 to the second photomask 81 shown in FIG. 11, a second exposure is performed on the first exposed sample through a second photomask 81 at an exposure dose of 120 mJ/cm2. This second photomask 81 includes
A light shielding portion 83 is formed which includes a region 83a corresponding to the light shielding portion 75 and a region 83b corresponding to a portion 77a of the edge portion of the phase shifter 77.

A latent image formed on the resist 91 by the second exposure using the second photomask 81 is shown in FIG.
It's something like. That is, resist 9 in FIG.
The area corresponding to the light shielding part 75 of the photomask 71 in FIG. All other areas become exposed portions 95.

The second exposed sample is baked on a hot plate at 110° for 1 minute. Thereafter, this sample is spray developed for 30 seconds using an LMR-UV developer (manufactured by Fuji Pharmaceutical Co., Ltd.). The resist pattern obtained after development is as shown in FIG. In FIG. 14, 101 is a resist pattern, 103 is a resist remaining portion, and 105 is a portion where the resist is dissolved by a developer and the silicon substrate is exposed. The dimension L of the portion of this resist pattern 101 that gives the gate length is SEM
When measured using a length measuring machine S-6000 [manufactured by Hitachi, Ltd.], the part corresponding to the 100% transmittance part of the first mask is 0.1 μm, and the part corresponding to the transmittance part 80%. It was found that the thickness corresponding to the transmittance of 65% was 0.15 μm, and the thickness corresponding to the transmittance of 65% was 0.2 μm. After depositing a gate electrode forming metal on this resist pattern 101, lift-off is performed to form a gate electrode of 0.1 μm, 0.15 μm, 0.
．． A gate electrode with a gate length of 2 μm is obtained. [Patterning experiment 2] The exposure amount during the first exposure was 5
Multiple values range from 0 mJ/cm2 to 150 mJ/cm2, and the exposure amount during the second exposure is 120 mJ.
A patterning experiment is carried out in the same manner as in patterning experiment 1, with a constant value of /cm2.

Next, the dimension L of the portion given by the gate length of each resist pattern with a different first exposure amount on this sample is determined.
are measured using a SEM length measuring machine S-6000. Dimension L relative to the exposure amount (mJ/cm2) of the first exposure
(μm) is shown in FIG. 15, with the horizontal axis representing the exposure dose of the first exposure and the vertical axis representing the dimension L of the portion giving the measured gate length of the resist pattern. It can be seen that the dimensions of the resist pattern can be controlled by changing the exposure amount, and that the pattern dimensions can be controlled by controlling the thickness of the thin chromium film of the first mask, that is, by controlling the transmittance. [Comparative Example 1] A patterning experiment was conducted using a single mask consisting of only a Cr pattern. In this mask pattern, the width of L shown in FIG. 14 is leveled in steps of 0.1 μm from 0.1 to 1.0 on the wafer. Using the same resist stepper as before, the exposure amount was set to 20mJ.
A patterning experiment was conducted by varying the amount of energy from /cm2 to 500mJ/cm2. When observed using a SEM length measuring machine S-6000, the thinnest portion corresponding to the width of L in FIG. 14 was 0.3 μm. This is 0.4
300 mJ/cm for μm and 0.3 μm masks, respectively.
2,240mJ/cm2, but when the exposure amount was increased beyond that, the pattern became unresolved and 0.
．． A pattern thinner than 3 μm was not obtained.

In the above embodiment, an example was explained in which the light transmittance of the light control film is changed by changing the thickness of the chromium film, but the light control film itself may be replaced. For example, a tantalum oxide light control film may be used instead of a chromium light control film. Furthermore, in this invention, a photomask also includes a reticle.

Note that the present invention is not limited to the above-mentioned embodiments, and various modifications can be made based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

[0034]

As described above in detail, according to the present invention, when there is an edge of the phase shifter in the light-transmitting region of the photomask, the intensity of the exposure light is lower on the wafer facing the edge portion. By actively utilizing the occurrence of regions where the light is very weak, that is, pseudo-unexposed regions, fine unexposed regions can be formed in the resist, thereby forming a resist pattern.

Therefore, fine space patterns and line patterns of 0.2 μm or less can be easily formed. However, the line width of this resist pattern can be easily controlled by controlling the dimming light shielding pattern formed on the mask. It is also possible to control the line width of this resist pattern by increasing or decreasing the exposure amount.

Furthermore, the line width of the resist pattern can be easily controlled by controlling the transmittance of the light control film formed on the mask. Furthermore, the line width of the resist pattern can be controlled by increasing or decreasing the exposure amount. Therefore, it is possible to provide a resist pattern forming method that allows formation of a fine resist pattern and has a wide focus margin.

[Brief explanation of the drawing]

FIG. 1 is a plan view schematically showing a first photomask showing an embodiment of the present invention.

FIG. 2 is a plan view schematically showing a second photomask showing an embodiment of the present invention.

FIG. 3 is a diagram showing a latent image formed on a resist after first exposure, showing an example of the present invention.

FIG. 4 is a diagram showing a latent image formed on a resist after second exposure, showing an example of the present invention.

FIG. 5 is a plan view showing resist patterns obtained after first and second exposures showing an example of the present invention.

FIG. 6: Exposure amount (mJ) of first exposure showing an example of the present invention;
2 is a characteristic diagram of the dimension L (μm) of a portion of the resist pattern that gives the gate length with respect to /cm2).

FIG. 7 is a plan view showing an example of a dimming light shielding pattern according to an embodiment of the present invention.

FIG. 8 is a partial cross-sectional view of a conventional photomask.

FIG. 9 is a partial plan view of another conventional photomask.

FIG. 10 is a plan view schematically showing a first photomask showing another embodiment of the present invention.

FIG. 11 is a plan view schematically showing a second photomask showing another embodiment of the present invention.

FIG. 12 is a diagram showing a latent image formed on a resist after first exposure, showing another embodiment of the present invention.

FIG. 13 is a diagram showing a latent image formed on a resist after second exposure showing another embodiment of the present invention.

FIG. 14 is a plan view showing resist patterns obtained after first and second exposures showing another example of the present invention.

FIG. 15 is a characteristic diagram of the dimension L (μm) of the portion of the resist pattern giving the gate length with respect to the exposure amount (mJ/cm 2 ) of the first exposure, showing another embodiment of the present invention.

[Explanation of symbols]

31, 71 First photomask 39 Dimming light shielding pattern 33, 43, 75, 83 Light shielding part 35, 42, 8
2 Light transmitting parts 37, 77 Phase shifters 37a, 77a Part of the edge part of the phase shifter (
Edge portion) 41, 81 Second photomask 43a, 43b, 83a, 83b Region 51, 9
1 Resist 53, 53a, 93a Unexposed area 54 Pseudo unexposed area 55, 95 Exposed area 61, 101 Resist pattern 63, 103
Resist remaining portion 65, 105 Exposed silicon substrate portion 73 Light control film

Claims (8)

[Claims] 1. When forming a resist pattern by a projection exposure method, the resist pattern is provided with a light shielding pattern for dimming, a light shielding pattern for electrode formation, and a phase shift pattern having a phase shifter arranged at a fine pitch below the resolution limit. A resist pattern forming method characterized by exposing a resist to light through a photomask. 2. The resist pattern forming method according to claim 1, wherein a fine pattern is formed by utilizing an edge line of a phase shifter. 3. The resist pattern forming method according to claim 1, wherein the dimensions of the transferred pattern are controlled based on a dimming light shielding pattern. 4. The resist pattern forming method according to claim 1, wherein a mask is used twice to pattern the pattern so that the edge lines intersect, thereby forming a hole or pillar pattern. 5. When forming a resist pattern by a projection exposure method, a photomask is formed so that part or all of the edge of the phase shifter is located on a light control film that controls light transmittance. A method for forming a resist pattern, which comprises exposing a resist to light. 6. The resist pattern forming method according to claim 5, wherein a fine pattern is formed using an edge line of a phase shifter. 7. The resist pattern forming method according to claim 5, wherein the dimensions of the pattern to be transferred are controlled by the transmittance of the light control film. 8. The resist pattern forming method according to claim 5, wherein a mask is used twice to pattern the pattern so that the edge lines intersect, thereby forming a hole or pillar pattern.