JPH04263517A - Superconducting synapse circuit - Google Patents

Abstract

PURPOSE:To variably weight the strength coupling between respective neurons. CONSTITUTION:This circuit is equipped with a gate 11 using a Josephson element to define an output current from another neuron circuit as a gate current and a weight inductance 14 arranged parallelly to the gate, the gate 11 is supplied a control current from a weight memory 13, and the weight inductance 14 is magnetically coupled with an input part superconducting closed loop 102 of the superconducting neuron circuit. Corresponding to the values '1' and '0' of the weight memory 13, the gate 11 is switched, and the current flowing to the weight inductance 14 can be controlled. Thus, the strength of coupling between the neuron circuits is made variable.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a neuron element, which is a basic element for realizing an artificial neural network on a device, and more particularly to a superconducting neuron element.

0002

2. Description of the Related Art Neuron elements, which are basic elements for realizing on a device a so-called artificial neural network that imitates the information processing method of the human brain, have conventionally been made using semiconductor integrated circuits. On the other hand, when a superconductor is used for the neuron element, there is an advantage that heat generation in wiring parts etc. can be suppressed because the power consumption of the element using the superconductor is extremely low. In addition, superconducting integrated circuits have the advantage that active elements (Josephson elements) can essentially be made into three-dimensional elements, making wiring between neuron elements much easier than in semiconductor integrated circuits, where it is difficult to make active elements three-dimensional. there were.

The present inventor has devised the following superconducting neuron device as a neuron device using a superconductor. An example of this superconducting neuron element is shown in FIG.

The neuron element in FIG. 7 has an input line 101 from other neuron elements or the outside, and a superconducting closed loop 102.
, a bias input terminal 103, a switching element 104 consisting of one Josephson element, an output gate 105 consisting of one Josephson element, an output line 106 magnetically coupled to the superconducting closed loop of another neuron element, and a reset gate of the output line. 107 and a reset signal line 108. In FIG. 7, the fan-in and fan-out numbers are each 5.

Each of the five input lines 101 is magnetically coupled to a superconducting closed loop 102 with its own mutual inductance. Mutual inductance M1, M2, M3
, M4, and M5 are 4pH, 1pH, and 5pH, respectively.
pH, 2pH, and 3pH. The inductance of the entire superconducting closed loop 102 is the inductance of the wiring part, 3 pH.
The total pH is 18. In addition, all input currents are 0.
6mA and I1, I3, I4, and I2, I5
, for the coupling part with the superconducting closed loop 102,
Reverse the direction of flow. For example, inductance M1
A current I1 is applied to the input line connected to the superconducting closed loop 102 at
, flows in the superconducting closed loop 12 to eliminate the magnetic field induced by I1 , (4/18)・0
．． A circulating current of 6=0.13 mA flows. In addition, when input currents I2, I3, and I4 flow, the total circulating current Ic
ir is Icir =0.13-0.03+0.17
+0.07=0.34mA. Here, the sign of the second term is negative because the direction of the current I2 is opposite to the other currents, so the direction of the induced circulating current is opposite. Therefore, the currents I1, I3, and I4 become excitatory signals, and the currents I2 and I5 become suppressive signals.

Bias current 0 from bias input terminal 103
．． When 6 mA is applied, the inductance of the branch on the output line 108 side and the branch on the side magnetically coupled to the input line 101 is significantly larger than the inductance of the branch including the switching element 104, so almost all of the bias current flows through the branch including the switching element 104. flows towards. The switching element 104 is
It consists of one Josephson element with a critical current value of 0.8 mA. When a bias current of the above value is passed through the switching element 104, if a circulating current Icir of 0.20 mA or more flows in the superconducting closed loop 102 in the direction shown in FIG. 7, the bias current and the circulating current are added together and the switching element Since the current flowing through 104 exceeds its critical current value, switching element 104 switches to the voltage state and a bias current of 0.6 mA flows through output line 106 and the branch magnetically coupled with input line 101. The inductance of the branch on the output line 106 side is usually much larger than the inductance of the branch magnetically coupled to the input line 101. Therefore, most of the bias current flows into the branch magnetically coupled to the input line 101. At this time, if the critical current value of the output gate 105 is 0.4 mA, the output gate 105 switches and all the bias current flows into the branch on the output line 106 side.

In this way, if the superconducting neuron element shown in FIG. 7 is used, each input is weighted and added together (synaptic operation), and when the sum exceeds a certain threshold, an output is produced (neuron operation). ) Basic operations of neuron elements can be performed.

Furthermore, the current flowing through the output line 106 continues to flow in a superconducting closed loop consisting of a path including the output line 106 and the switching element 105 even after the bias current falls. In order to reset this current, an appropriate current is passed through the reset signal line 108 and the reset gate 107 is switched to a voltage state.

[0009]

One of the important features of neural networks is that the strength of connections (weights) between each neuron is adjusted by learning so as to obtain the optimal output for the input. For this purpose, the strength of the connection between each neuron needs to be variable. However, in the superconducting neuron device described above, the strength of the connection between each neuron cannot be changed because it is determined by the mutual inductance value of the connection part.

An object of the present invention is to provide a superconducting synaptic circuit in which the strength of connections between neurons can be changed and the strength (weight) of connections can be adjusted by learning.

[Means for Solving the Problems] According to the first invention of the present application, a gate using a Josephson element whose gate current is an input current consisting of an output current from another neuron circuit or an external signal current; A weight memory for supplying a control current to the gate, and a weight inductance magnetically coupled to the input superconducting closed loop of the superconducting neuron circuit and arranged in parallel with the gate, the switch of the gate causing the A superconducting synapse circuit is obtained in which an input current is passed through the weight inductance to induce a circulating current in the superconducting closed loop.

According to the second invention of the present application, there is provided a gate using a Josephson element whose gate current is an input current consisting of an output current from another neuron circuit or a signal current from the outside, and a control current applied to the gate. A small number of units are connected in series, each of which includes a weight memory to be supplied, and at least a weight inductance magnetically coupled to the input superconducting closed loop of the superconducting neuron circuit and arranged in parallel with the gate. The input current is caused to flow through the weight inductance by a switch, and a circulating current of a desired value is induced in the superconducting closed loop by a combination of values of the weight inductance attached to the gate to be switched. A synaptic circuit is obtained.

[0012] If the third invention of the present application is used, a magnetic field coupling type using a Josephson element whose control current is an output current from another neuron circuit or an input current consisting of an external signal current and a signal current from a weight memory is obtained. AND gate and
Input part of superconducting neuron circuit A plurality of units magnetically coupled to the superconducting closed loop and including at least a weighting inductance arranged in parallel with the AND gate are connected in series, and the weighting inductance is connected in series by a switch of the AND gate. The AND
A superconducting synaptic circuit is obtained, characterized in that a combination of the values of the weighting inductances associated with the gates induces a circulating current of a desired value in the superconducting closed loop.

[0013] By using the fourth invention of the present application, a superconducting memory including a first gate using a Josephson element and a second gate magnetically coupled to the first gate and using a Josephson element is obtained. a gate current path that supplies a gate current to the second gate, a control current path that supplies a control current to the second gate, and magnetically coupled to an input superconducting closed loop of a superconducting neuron circuit. And the first
control a switch of the first gate depending on the presence or absence of a circulating current stored in the superconducting memory loop, and a circulating current value induced in the superconducting loop. A superconducting synaptic circuit characterized by controlling the .

[0014]

[Operation] The synapse circuit of the neuron element performs the operation of multiplying a given input X by a certain weight W to produce a product W.X and sending it to the neuron circuit. A neuron circuit works by adding up the outputs from each synaptic circuit and outputting an output when the sum (formula below) exceeds a certain threshold.

[0015]

In the first aspect of the present invention, if the output from the weight memory is "1" and the control current of the gate is flowing while the input current is flowing to the gate using the Josephson element, then the control current of the gate is flowing. The gate switches to a voltage state and the input current flows into a weighted inductance placed in parallel with said gate. On the other hand, if the output from the weight memory is "0", no control current flows through the gate, and the gate maintains its superconducting state. If the inductance of the path including the weight inductance is made much larger than the inductance of the path including the gate, or if a resistance component is inserted into the path including the weight inductance, the weight Almost no current flows through the inductance. When a current flows through the weight inductance, a circulating current is induced in the input superconducting closed loop of the superconducting neuron element that is magnetically coupled to the weight inductance. The value of this circulating current Icir is I, where L is the total inductance of the superconducting closed loop, M is the combined inductance with the weight inductance, and I is the current flowing through the weight inductance.
cir=(M/L)I. As mentioned above, “1” and “0” in the weight memory are made to correspond to the weight W mentioned above,
If (M/L)I is made to correspond to the input X, the circuit of the present invention is a synaptic circuit that supplies the product of the input X and the weight W to the neuron circuit.

In the second invention of the present application, a plurality of the circuits described in the first invention are connected in series as one unit. In this case, the circulating current value Icir induced in the superconducting closed loop is expressed by the following equation.

[0018]

Here, m is the number of circuits coupled in series, Mi and Ai are the coupling inductance of the weighted inductance and the superconducting closed loop arranged in parallel with the i-th gate, respectively, and These are the values of "1" and "0" of the weight memory that provides the control current. In the circuit of the present invention, many different values of Icir can be obtained by combining the values Ai of the weight memories. In other words, there are many types of weight values that can be selected.

In the third invention of the present application, the input current and the output current from the weight memory are the control currents of the AND gate, and the circuit in which the current flows through the weight inductance only when both are "1" is integrated into one unit. , multiple units are connected in series. This makes it possible to obtain a synaptic circuit that induces a circulating current in the superconducting closed loop according to the value of the weight memory when an input current flows.

In the fourth invention of the present application, a superconducting memory loop including a second gate using a Josephson element is used as a weight memory. The superconducting memory loop can store a circulating current in it depending on the value of the gate current when the switch is in the voltage state, the value of which is:
It remains unchanged until the second gate is then switched. A part of the superconducting memory loop is the control line of the first gate placed in parallel with the weight inductance,
Depending on the circulating current stored in the superconducting memory loop, the first gate can be switched to allow current to flow through the weight inductance. This provides a synaptic circuit that induces a circulating current in the input superconducting closed loop of the superconducting neuron element in response to the circulating current stored in the superconducting memory loop.

[0022]

Embodiment (Embodiment 1) FIG. 1 is a diagram for explaining an embodiment of the first invention. An embodiment of the first invention will be described below with reference to FIG.

In this synaptic circuit, the output current from the gate 11 using a Josephson element, the output current from other neuron circuits, or the signal current from the outside is the input current Ii of the synaptic circuit.
It consists of an input line 12 supplied as n, a weight memory 13, a weight inductance 14 arranged in parallel with the gate 11, a reset gate 15, and a reset signal line 16. The gate 11 is supplied with a gate current from an input line 12 and a control current from a weight memory 13 . Further, the weight inductance 14 is magnetically coupled to the input superconducting closed loop 102 of the superconducting neuron element described in the section (Prior Art), and its mutual inductance is 3 pH. Also, the total inductance of the superconducting closed loop 102 is 60p
It is H. The reset gate 15 has a weight inductance of 1
placed in series with 4.

In this embodiment, a two-junction quantum interferometer shown in an equivalent circuit in FIG. 2 is used as the gate 11. The two-junction quantum interferometer includes two Josephson elements 21 in a superconducting closed loop, a gate current Ig is supplied from a gate current 23, and a control current Ic is supplied from a control current path 24 via an inductance 22. . In addition, the two-junction quantum interferometer has the threshold characteristics shown in Figure 3, and when the operating point is within the peak of the threshold, it is in a superconducting state; When you get out of the mountain, it switches to voltage state. In this embodiment, the critical current values of the Josephson elements 21 are each 0.4 mA, and the values of the inductances 22 are each 0.85 pH.

The input current Iin is 0.0 through the input line 12.
When 6 mA is supplied, Iin is shunted according to the inductance ratio of the path including the gate 11 and the path including the weight inductance 14. Assuming that the equivalent inductances of the gate 11 and the reset gate 15 are each 0.4 pH, and the self-inductance value of the weight inductance 14 is 10 pH, about 96% of Iin flows to the path including the gate 11. At this time, if the output from the weight memory is "1" and the weight current Iw is flowing at 0.6 mA, the gate 11 switches to the voltage state.

This switch will be explained using the threshold characteristics shown in FIG. When only the weighting current Iw is flowing, the operating point is at 32 in FIG. 3, but when the input current Iin is supplied, the operating point shifts to 33 and goes outside the threshold peak, so the gate 11 is in a voltage state. Switch to . On the other hand, input current Ii
Even when n flows first and the operating point is at 31, the weight current Iw
flows, the operating point moves to 33, and gate 1
1 switches to voltage state.

When the gate 11 switches to the voltage state, the input current Iin flows entirely in the direction of the path containing the weighting inductance 14. When a current flows through the weight inductance 14, the mutual inductance 3pH between the weight inductance 14 and the superconducting closed loop 102 of the superconducting neuron element increases.
3/60×0.
A circulating current of 6=0.03 mA is induced in the superconducting closed loop 102. This circulating current is added to circulating currents from other synaptic circuits, and when the value exceeds a certain value, the switching element 104 switches to a voltage state and is output through the output line 106.

On the other hand, if the output from the weight memory 13 is "0" and the weight current Iw does not flow, the gate 11 remains in the superconducting state, and no current flows through the path including the weight inductance 14, so that the superconducting current Iw does not flow. No circulating current flows through the conduction closed loop 102 due to this synaptic circuit.

Furthermore, once a current flows through the weight inductance 14, the current continues to flow through the superconducting closed loop including the weight inductance 14 and the gate 11 even after the input current falls. Therefore, in this embodiment, a reset gate 15 is inserted in series with the weight inductance 14, and a current is caused to flow through the reset signal line at an appropriate timing to switch the reset gate 15 to a voltage state. Reset the current in the superconducting closed loop. This reset gate 1
5, the two-junction quantum interferometer shown in FIG. 2 can be used.

As explained above, if the circuit of this embodiment is used, the values W of "1" and "0" of the weight memory and the input current I
It can be seen that a circulating current corresponding to the product of in can be induced in the superconducting closed loop of the superconducting neuron circuit, and that the circuit of this example works as a synaptic circuit with binary weights.

Further, in this embodiment, a two-junction quantum interferometer is used as the gate 11 and the reset gate 15, but gates using other types of Josephson junctions such as an in-line gate or a three-junction quantum interferometer may be used. You can also do it. Furthermore, instead of the reset gate 15, a resistor with a small value can be inserted in series with the weight gate 14.

(Embodiment 2) FIG. 4 is a diagram for explaining an embodiment of the second invention. An embodiment of the second invention will be described below using FIG.

In this synapse circuit, the output current from the gate 11 using a Josephson element, the output current from other neuron circuits, or the signal current from the outside is the input current Ii of the synapse circuit.
Four units are connected in series, each consisting of an input line 12 supplied as signal n, a weight memory 13, a weight inductance 14 arranged in parallel with the gate 11, a reset gate 15, and a reset signal line 16. If the above units are named A, B, C, and D from the top of FIG. 4, the ratio of the mutual inductance between the weighted inductances 14 of A, B, C, and D and the input closed loop 102 of the superconducting neuron element is 1. :2:4:8. The four gates 11 are supplied with a gate current Iin from an input line 12, and are supplied with a control current Iw from a memory 13 attached to each gate. Each weight inductance 14 is also magnetically coupled to the input superconducting closed loop 102 of the superconducting neuron element described in the (Prior Art) section.

In this embodiment, a two-junction quantum interferometer whose equivalent circuit is shown in FIG. 2 is used as the gate 11. The two-junction quantum interferometer includes two Josephson elements 21 in a superconducting closed loop, a gate current Ig is supplied from a gate current path 23, and a control current Ic is supplied from a control current path 24 via an inductance 22. . In addition, two-junction quantum interference has the threshold characteristic shown in Figure 3, and when the operating point is within the peak of the threshold, it is in a superconducting state; When it goes outside, it switches to voltage state. In this embodiment, the critical current value of the Josephson element 21 is 0.4 mA, and the value of the inductance 22 is 0.4 mA.
A two-junction quantum interferometer with a pH of 85 is used.

The input current Iin through the input line 12 is 0.
When 6 mA is supplied, Iin is divided according to the inductance ratio of the path including the gate 11 and the path including the weight inductance 14. The equivalent inductance of gate 11 and reset gate 15 is 0.4pH, A, B, C, respectively.
, D are 10 pH, 20 pH, 30 pH, and 80 pH, respectively, and the gates 11 of A, B, C, and D each have 96%,
Input current Iin of 98%, 99%, and 99.5% flows. At this time, the output from the weight memory is "1" and the weight current Iw is flowing at 0.6 mA at the gate 11 of the unit.
switches to a voltage state so that the operating point moves from operating point 32 to operating point 33 in FIG. Even if the input current Iin flows first and the weighting current Iw flows later, the operating point in FIG. 3 will change from operating point 31 to operating point 33.
The gate 11 is similarly switched to move to . On the other hand, the gate 11 of the unit whose output from the weight memory is "0" and no weight current Iw flows therein maintains a superconducting state, and almost no current flows through the weight inductance 14.

In this embodiment, the ratio of mutual inductance between the weight inductance 14 of each unit A, B, C, and D and the superconducting closed loop 102 at the input section of the superconducting neuron element is 1:2:4:8. Therefore, if the mutual inductance between the weight inductance 14 of unit A and the superconducting closed loop 102 is M, and the total inductance of the superconducting closed loop 102 is L, then by combining the outputs from each weight memory 13, the superconducting closed loop has M. /L・(WA
A circulating current of +2WB +4Wc +8WD )·Iin is induced. Here WA , WB , WC , WD
are output from the weight memories 13 of units A, B, C, and D, respectively, and have a value of "0" or "1". In other words, this circuit is a combination of WA, WB, WC, and WD.
A supercurrent with four bits of different values of circulating current can be induced in the superconducting closed loop 102.

The circulating current induced in the superconducting closed loop 102 by this circuit is added to the circulating current from other synaptic circuits, and when the value exceeds a certain threshold, the switching element 104 of the superconducting neuron element changes to the voltage state. The output is output to the output line 106.

Furthermore, once a current flows through the weight inductance 14, the current continues to flow through the superconducting loop including the weight inductance 14 and the gate 11 even after the input current falls. Therefore, in this embodiment, a reset gate 15 is inserted in series with the weight inductance 14, and a current is caused to flow through the reset signal line at an appropriate timing to switch the reset gate 15 to a voltage state. Reset the current in the superconducting closed loop. This reset gate 1
5, the two-junction quantum interferometer shown in FIG. 2 can be used.

As explained above, by using the circuit of this embodiment, it is possible to induce circulating currents of different values in 4 bits in the superconducting closed loop by combining the values of the weight memory 13 of each unit with respect to the input current Iin. , the circuit of this example is
It operates as a synapse circuit with a 4-bit variable weight. In this example, the number of units is 4, and the ratio of the weight inductance values of each unit is 1:2:4:8.
By changing the number of units or changing the ratio of weight inductance values of each unit, a synapse circuit having a desired variable weight can be configured.

Further, in this embodiment, a two-junction quantum interferometer is used as the gate 11 and the reset gate 15, but gates using other types of Josephson junctions such as an in-line gate or a three-junction quantum interferometer may also be used. can. Furthermore, instead of the reset gate 15, a resistor with a small value can be inserted in series with the weight inductance 14.

(Embodiment 3) FIG. 5 is a diagram for explaining an embodiment of the third invention. An embodiment of the third invention will be described below with reference to FIG.

This synapse circuit uses a gate 11 using a Josephson element, an output current from another neuron circuit, or a signal current from the outside as an input current I of the synapse circuit.
an input line 12 supplied as in, a weight memory 13, a magnetic field coupling type AND gate 51 biased by an external gate current Ig, and using the input current Iin and the output current Iw from the weight memory 13 as control currents; A weight inductance 14, a reset gate 15, and a reset signal line 16 arranged in parallel with the superconducting neuron element and magnetically coupled to the input superconducting closed loop 102.
Four units are connected in series. If the above units are named A, B, C, and D from the top of Fig. 5,
The ratio of the mutual inductance values between the weighted inductances 14 of A, B, C, and D and the superconducting closed loop 102 is 1:2.
:4:8.

In this embodiment, a two-junction quantum interferometer whose equivalent circuit is shown in FIG. 2 is used as the AND gate 51. A two-junction quantum interferometer uses a Josephson element 21 in a superconducting closed loop.
, and the gate current I from the gate current path 23.
g is supplied, and a control current Ic is supplied from a control current path 24 via an inductance 22. Although only one control current path 24 is shown in FIG. 2, this gate is
Since it is an ND gate, there are two control current paths 24. In addition, the two-junction quantum interferometer has the threshold characteristics shown in Figure 3, and when the operating point is within the peak of the threshold, it is in a superconducting state; When you get out of the mountain, it switches to voltage state.

In this embodiment, a two-junction quantum interferometer is used in which the Josephson elements 21 each have a critical current value of 0.4 mA, and the inductances 22 each have a value of 0.85 pH.

Gate current Ig of AND gate 51 is 0
．． When an input current Iin of 0.3 mA is supplied through the input line 12 in a state where 4 mA is supplied, the AND gate 51
The operating point moves from operating point 34 in FIG. 3 to operating point 35. Since the operating point 35 is located inside the peak of the threshold value, the AND gate 51 will not switch based on this point alone. In this state, the output current Iw from the weight memory 13 is 0.3 mA.
If so, the operating point moves from the operating point 35 to the operating point 36 in FIG. 3 and goes outside the threshold peak, so the AND gate 51 switches to the voltage state. Further, even when only the output current Iw from the weight memory is flowing and the input current Iin is not flowing, the operating point is at the operating point 35 and the AND gate 51 does not switch.

When the AND gate 51 switches to the voltage state, the gate current Ig is all connected to the weighted inductance 1
Flows toward the path containing 4. When a current flows through the weight inductance 14, a circulating current is induced in the superconducting closed loop 102 of the superconducting neuron circuit. In this example, A,
The ratio of the weight inductance 14 of each unit B, C, D and the mutual inductance value of the superconducting closed loop 102 is:
Since the ratio is 1:2:4:8, if the mutual inductance between the weight inductance 14 of unit A and the superconducting closed loop 102 is M, and the total inductance of the superconducting closed loop 102 is L, then The circulating current Icir is expressed by the following equation.

[0047]Icir =M/L・(GA +2GB
+4GC +8GD)・Ig Here, GA, GB, GC, GD are unit A,
“1” indicates the presence or absence of 51 switches of gates B, C, and D.
”, “0”. If the input current Iin and the output current Iw from the weight memory are treated as digital signals of “1” and “0”, then Gi = Iin・Iwi, so Icir can be calculated using the following equation. It can be written as (Gi, Iwi
is the switch of AND gate 51 of unit i and Iw
Indicates the presence or absence of ) Icir = M/L・(Iin・I
wA+2Iin・IwB+4Iin・IwC+8Iin
・IwD)・Ig =M/L・Ig ・Iin(IwA
+2IwB+4IwC+8IwD) Since the values of L, M, and Ig are constant, this circuit assigns 4-bit weights from 0 to 15 to the digital signal Iin, and calculates the circulating current Icir and superconductivity corresponding to the weights. This is a synaptic circuit induced in the input superconducting closed loop 102 of the neuron element.

[0048] This synaptic circuit creates superconducting closed loop 1.
The circulating current induced during 02 is added to the circulating current from other synaptic circuits, and when the value exceeds a certain threshold, switching element 1 of the superconducting neuron circuit
04 switches to a voltage state, and output is provided on output line 106.

Furthermore, once a current flows through the weight inductance 14, the current continues to flow through the superconducting loop including the weight inductance 14 and the gate 11 even after the input current falls. Therefore, in this embodiment, a reset gate 15 is inserted in series with the weight inductance 14, and a current is caused to flow through the reset signal line at an appropriate timing to switch the reset gate 15 to a voltage state. This resets the current in the superconducting loop. This reset gate 15
As a method, a two-junction quantum interferometer shown in FIG. 2 can be used.

As explained above, if the circuit of this embodiment is used, the circulating current of different values of 4 bits can be superconducted by combining the values of the weight memory 13 of each unit with respect to the digitized input signal Iin. can be induced during closed loop,
The circuit of this embodiment operates as a synapse circuit with variable weight of 4 bits. Furthermore, since the input current Iin is not used as the gate current of the AND gate 51, the input line 12
That is, the inductance values of the output lines 106 of other neuron elements do not change due to the AND gate switch. Furthermore, for this purpose, the inductance of the path including the weight inductance 14 can be made sufficiently large, and the AND
Leakage current when the gate 51 does not switch can be made sufficiently small.

In this embodiment, the number of units is 4 and the ratio of the weight inductance values of each unit is 1:2:4:8, but the number of units can be changed or the ratio of the weight inductance values of each unit can be changed. By changing the weight, a synapse circuit having a desired variable weight can be constructed.

Further, in this embodiment, a two-junction quantum interferometer is used as the gate 11 and the reset gate 15, but gates using other Josephson junctions such as an in-line gate or a three-junction quantum interferometer can also be used. . Furthermore, instead of the reset gate 15, a resistor with a small value can be inserted in series with the weight inductance 14.

(Embodiment 4) FIG. 6 is a diagram for explaining an embodiment of the fourth invention. An embodiment of the fourth invention will be described below with reference to FIG.

This synapse circuit supplies a gate current Ig to a gate 61 which is the second gate shown in the claims section using a Josephson element, a superconducting memory loop 62 including the gate 61, and a gate current Ig to the gate 61. Gate current path 6
3. A control current path 64 that supplies a control current Ic to the gate 61, an input line 12 that supplies an output current from another neuron circuit or a signal current from the outside as an input current Iin to the synapse circuit; An AND gate 51, which is the first gate shown in the claims section, having a superconducting memory loop 62 as a control line, is arranged in parallel with the AND gate 51, and is connected to the superconducting closed loop 102 and the magnetic input part of the superconducting neuron circuit. weight inductance 1
4. Four units are connected in series, each consisting of a weight inductance 14, a reset gate 15 that resets the current flowing in the superconducting closed loop including an AND gate 15, and a reset signal line 16 that provides a signal to the reset gate 15. . The above units are A, B, C from above in Figure 6.
, D, the ratio of the mutual inductance values between the weight inductances 14 of A, B, C, and D and the superconducting closed loop 102 is 1:2:4:8.

In this embodiment, a two-junction quantum interferometer whose equivalent circuit is shown in FIG. 2 is used as the gate 61 and the AND gate 51. The two-junction quantum interferometer includes two Josephson elements 21 in a superconducting closed loop, a gate current Ig is supplied from a gate current path 23, and a control current Ic is supplied from a control current path 24 via an inductance 22. . Although only one control current path 24 is shown in FIG.
In the ND gate 51, there are two control current paths 24. In addition, the two-junction quantum interferometer has the threshold characteristics shown in Figure 3, and is in a superconducting state when the operating point is within the peak of the threshold; When it goes outside, it switches to voltage state. In this embodiment, the critical current value of the Josephson element 21 as the gate 61 is 0.2 mA, respectively.
A two-junction quantum interferometer in which the inductance 22 has a value of 1.7 pH is used, the critical current value of the Josephson element 21 as the AND gate 51 is 0.4 mA, and the inductance 22 has a value of 1.7 pH. Use a meter.

When the gate current Ig is supplied from the gate current path 63, the gate current Ig is divided in accordance with the ratio of inductance between the path including the gate 61 of the superconducting memory loop 62 and the path not including the gate 61. Since the inductance of the path not including gate 61 is much larger than the inductance of the path including gate 61, the gate current Ig
Most of it flows to the path including gate 61. At this time, the current shunted to the path that does not include the gate 61 has a sufficiently small value, so it does not affect the switch of the AND gate 51. When a control current Ic flows through the control current path 64 while a gate current Ig is flowing through the gate 61,
The operating point of the gate 61 is from operating point 31 to operating point 33 in FIG.
, the gate 61 switches to the voltage state. When the gate 61 switches, the gate current Ig flows toward the path of the superconducting memory loop 62 that does not include the gate 61. From this state, when the control current Ic becomes zero and subsequently the gate current Ig becomes zero, the superconducting memory including the gate 61 Memory current IM in loop 62
continues to flow. The magnetic flux in the superconducting closed loop is the quantum magnetic flux Φ0 = 2.07×10-15 (Wb/m2
), the memory current IM is expressed by the following equation, where LM is the inductance of the path that does not include the gate 61 of the superconducting memory loop 62, and LM0 is the inductance of the entire superconducting memory loop.

IM=nΦ0/LM0 Here, n is the number of quantum magnetic fluxes to be conserved, and is an integer expressed by the following formula using the Gauss symbol [X] representing the largest integer not exceeding X.

n=(LM Ig /Φ0 +0.5) In this example, the values of LM and LM0 are set to 20 pH and 20 pH, respectively.
When the pH is 21 and the gate current Ig is 0.3 mA,
The memory current IM is approximately 0.3 mA. The number of quantum magnetic fluxes Φ0 conserved at this time is three.

In order to return the memory current IM that once flowed into the superconducting memory loop 62 to zero, the gate 61 is
It is necessary to switch the voltage state. for that purpose,
Control current Ic when gate current Ig is not flowing
Just let it flow. The gate 61 receives the memory current I
M is biased in the opposite direction when gate current Ig is applied, and the operating point is at operating point 37 in FIG. When the control current Ic flows from this state, the operating point shifts to the operating point 38 in FIG. 3, the gate 61 switches to a voltage state, and the closed superconducting loop is broken, so the memory current IM becomes zero. On the other hand, when the gate current Ig is applied while the memory current IM is flowing, the two currents cancel each other out and the operating point moves to the operating point 39 in FIG. The gate 61 does not switch because it only moves.

As described above, in this circuit, the memory current IM flowing through the superconducting memory loop 62 is set to "1" by simultaneously flowing the gate current Ig and the control current Ic.
”, and the memory current IM flowing through the superconducting memory loop 62 by flowing only the control current Ic
can be set to "0". AND gate 51 is
Input line 1 is biased with bias current Ib.
When the input current Iin from the superconducting memory loop 62 and the memory current IM from the superconducting memory loop 62 flow together, the operating point moves from the operating point 34 to the operating point 36 through the operating point 35 in FIG. 3, and switches to the voltage state. When the AND gate 51 switches, the bias current Ib biasing the AND gate 51 flows toward the weight inductance 14. When a current flows through the weighting inductance 14, a circulating current is induced in the superconducting closed loop 102 of the superconducting neuron element magnetically coupled to the weighting inductance 14.

In this embodiment, since the ratio of mutual inductance values between the weight inductance 14 of each unit A, B, C, and D and the superconducting closed loop 102 is 1:2:4:8, unit A When the mutual inductance between the weighted inductance 14 and the superconducting closed loop 102 is M, and the total inductance of the superconducting closed loop 102 is L, the circulating current Icir induced in the superconducting closed loop is expressed by the following equation.

Icir =M/L・(GA +2GB
+4GC +8GD)・Ib Here, GA, GB, GC, GD represent the presence or absence of switches for the gates 51 of units A, B, C, and D.
1” and “0”.Input current Iin Memory current I
If M is treated as a digital signal of "1" and "0", Gi =Iin·IMi, so Icir can be written as the following equation. (Gi, IMi represent the switch of the AND gate 51 of unit i and the presence or absence of IM.) Icir = M/L・(Iin・IMA+2Ii
n・IMB+4Iin・IMC+8Iin・IMD)・
Ib =M/L・Ib・Iin(IMA+2IMB+
4IMC+8IMD) Since the values of L, M, and Ib are constant, this circuit applies a memory current I to the superconducting memory loop 62.
Depending on whether M is stored, a 4-bit weight from 0 to 15 is assigned to the digital signal Iin, and a circulating current Icir corresponding to the weight is induced in the superconducting closed loop 102 of the input section of the superconducting neuron element. It is a synaptic circuit that

[0063] This synaptic circuit creates superconducting closed loop 1.
The circulating current induced during 02 is added to the circulating current from other synaptic circuits, and when the value reaches a certain threshold, switching element 1 of the superconducting neuron circuit
04 switches to a voltage state, and output is provided on output line 106.

Furthermore, once a current flows through the weight inductance 14, the current continues to flow through the superconducting loop including the weight inductance 14 and the gate 11 even after the input current falls. Therefore, in this embodiment, a reset gate 15 is inserted in series with the weight inductance 14, and a current is caused to flow through the reset signal line at an appropriate timing to switch the reset gate 15 to a voltage state. This resets the current in the superconducting loop. This reset gate 15
As a method, a two-junction quantum interferometer shown in FIG. 2 can be used.

As explained above, if the circuit of this embodiment is used, the superconducting memory loop 6
The desired circulating current is induced in the superconducting closed loop 102 at the input of the superconducting neuron element. A superconducting synaptic circuit is obtained. Further, since the presence or absence of the memory current IM flowing in the superconducting memory loop 62 can be controlled by the gate current Ig and the control current Ic, the weight of this synaptic circuit is variable.

In this embodiment, the superconducting memory loop 62 is a combination of the circuits described in Embodiment 3, or a combination of the circuits described in Embodiment 2.
A similar effect can be expected even when combined with the circuit described in .

In this embodiment, the number of units is 4 and the weight inductance value ratio of each unit is 1:2:4:8, but the number of units or the weight inductance value ratio of each unit may be changed. By doing so, a synaptic line having a desired variable weight can be configured.

Further, in this embodiment, a two-junction quantum interferometer is used as the gate 11 and the reset gate 15, but gates using other Josephson junctions such as an in-line gate or a three-junction quantum interferometer can also be used. . Furthermore, instead of the reset gate 15, a resistor with a small value can be inserted in series with the weight gate 14.

[0069]

Effects of the Invention By using the first invention, a superconducting synapse circuit can be obtained in which binary weighting of "1" and "0" can be applied to the input current. If the second invention is used, a superconducting synapse circuit that can variable weight input current to a desired value can be obtained. By using the third invention, it is possible to obtain a superconducting synapse circuit in which variable weighting of a desired value can be applied to the digitized input current, and in addition, depending on the magnitude of the weight, the input line, that is, the output line of other neurons can be The load never changes. Furthermore, leakage current when the output from the weight memory is "0" can also be made sufficiently small. If the fourth invention is used, a superconducting synapse circuit capable of variable weighting using a superconducting memory loop can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram for explaining a first embodiment of the present invention.

FIG. 2 is a circuit diagram for explaining a two-junction quantum interferometer.

FIG. 3 is a threshold characteristic diagram for explaining the operation of a two-junction quantum interferometer.

FIG. 4 is a circuit diagram for explaining a second embodiment of the present invention.

FIG. 5 is a circuit diagram for explaining a third embodiment of the present invention.

FIG. 6 is a circuit diagram for explaining a fourth embodiment of the present invention.

FIG. 7 is a circuit diagram for explaining a conventional superconducting neuron element.

[Explanation of symbols]

11 Gate 12 Input line 13 Weight memory 14 Weight inductance 15 Reset gate 16 Reset signal line 21 Josephson element 22 Inductance 23 Gate current path 24 Control current path 31-39 Operating point 51 AND gate 61 Gate 62 Superconducting memory loop 63 Gate current path 64 Control current path 101 Input line 102 Superconducting closed loop 103 Bias input terminal 104 Switching element 105 Output gate 106 Output line 107 Reset gate 108 Reset signal line

Claims (4)

[Claims] Claim 1: A gate using a Josephson element whose gate current is an input current consisting of an output current from another neuron circuit or a signal current from the outside, a weight memory that supplies a control current to this gate, and a superconductor. The input part of the neuron circuit includes at least a weighting inductance magnetically coupled to the superconducting closed loop and arranged in parallel with the gate, and a switch of the gate causes the input current to flow through the weighting inductance and circulating to the superconducting closed loop. A superconducting synaptic circuit characterized by inducing an electric current. 2. A gate using a Josephson element whose gate current is an input current consisting of an output current from another neuron circuit or a signal current from the outside, a weight memory that supplies a control current to this gate, and a superconducting neuron. A plurality of units magnetically coupled to the input section of the circuit superconducting closed loop and including at least a weighted inductance arranged in parallel with the gate are connected in series, and a switch of the gate causes the input current to be transferred to the weighted inductance. A superconducting synapse circuit, characterized in that a circulating current of a desired value is induced in the superconducting closed loop by a combination of values of the weight inductances associated with the gates flowing and switching. 3. A magnetically coupled AND gate using a Josephson element whose control current is an input current consisting of an output current from another neuron circuit or a signal current from the outside and a signal current from a weight memory, and a superconducting neuron. The input part of the circuit is magnetically coupled to the superconducting closed loop and the AND
A plurality of units including at least a weighted inductance arranged in parallel with a gate are connected in series, and a current is caused to flow through the weighted inductance by a switch of the AND gate, and the value of the weighted inductance associated with the AND gate to be switched is determined. A superconducting synaptic circuit characterized in that a circulating current of a desired value is induced in the superconducting closed loop through combinations. 4. A superconducting memory loop comprising: a first gate using a Josephson element; a second gate magnetically coupled to the first gate and using a Josephson element; a gate current path that supplies a gate current to the gate of the gate; a control current path that supplies a control current to the second gate; and a control current path that is magnetically coupled to the input superconducting closed loop of the superconducting neuron circuit and that is connected to the first gate. and includes at least a weighted inductance arranged in parallel with the superconducting memory loop, and controls a switch of the first gate depending on the presence or absence of a circulating current stored in the superconducting memory loop to control a circulating current value induced in the superconducting closed loop. A superconducting synaptic circuit characterized by: