JPH04256212A - Constant amplitude phase shift circuit - Google Patents

Abstract

PURPOSE:To obtain a constant amplitude phase shift circuit which can satisfactorily operate even with a frequency exceeding several hundred MHz by difference-adding two signals in a differential amplifier circuit. CONSTITUTION:An inputted signal is branched into two signals of a first signal S1 and a second signal S2 and they are set to be taken out. One signal between two signals S1 and S2 is left in the same phase as it is and the phase of the other signal is shifted and is supplied to the differential amplifier circuit 3. A processing attenuating one of the two signals S1 and S2 to l/2 is executed and they are respectively supplied to the inputelectrodes of respective registers in the differential circuit 3. It adds the difference of two signals S2 and S2. Thus, a constant amplitude phase shift operation can be executed without using an operational amplifier.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant amplitude phase shift circuit, and is particularly suitable for use in constructing a constant amplitude phase shift circuit with a very high frequency of several hundred MHz to several GHz.

0002

2. Description of the Related Art Conventionally, constant amplitude phase shift circuits have been known that keep the amplitude of an output phase shift signal constant even if the frequency of an input signal changes. Such a constant amplitude phase shift circuit is constructed by combining an adder having two coefficient circuits and means for adding an unprocessed signal and a phase-shifted signal to the coefficient circuits. Further, as a specific example of a circuit for realizing this, a constant amplitude phase shift circuit using an operational amplifier 24 having a phase inverting input and a non-inverting input is known as shown in the circuit diagram of FIG.

When the circuit of FIG. 3 is represented in a functional block diagram, as shown in FIG. 2, it is a low-pass filter circuit consisting of two coefficient circuits 21 and 22, an adder circuit 23, a resistor R1, and a capacitor C1. 25 etc. Assuming that the output signal in this block diagram is EO, the value of EO is as shown in equation (1).

0004

##EQU00001## Also, if the absolute value of the amplitude is EABS, then it becomes as shown in equation (2).

##EQU00002## Further, when the output phase is .theta., the magnitude of the output phase .theta. is expressed by equation (3).

[Mathematical 3] From these formulas (1), (2), and (3), the angular frequency ω
It can be seen that the amplitude is constant and the phase changes from 0 to 2π radians due to the change in .

[0005]

In the constant amplitude phase shift circuit configured as described above, the frequency band of the operational amplifier 24 cannot be made sufficiently wide. Therefore, the frequency is several hundred M
If a constant amplitude phase shift circuit exceeding Hz is configured with the circuit shown in FIG. 3, the phase shift rotation of the operational amplifier 24 will be large and sufficient frequency characteristics cannot be obtained. For this reason,
Since sufficient feedback cannot be applied, it has been difficult at present to realize a constant amplitude phase shift circuit with a frequency exceeding several hundred MHz using the circuit shown in FIG. An object of the present invention is to provide a constant amplitude phase shift circuit that operates even at frequencies exceeding several hundred MHz as described above.

[0006]

[Means for Solving the Problems] A constant amplitude phase shift circuit according to the present invention converts an input signal into two signals, a first signal and a second signal.
The first circuit is configured by differentially connecting two transistors with the same characteristics, and the first signal and the second signal are respectively applied to the input electrodes of these transistors. a differential connection circuit that differentially adds and outputs signals; a first signal supply line that inverts the phase of a signal taken out from the first circuit and supplies the inverted signal to the differential connection circuit; A signal transmission circuit consisting of a second signal supply line that supplies the signal taken out from the circuit to the differential connection circuit in phase, and a signal transmission circuit that supplies either the first signal or the second signal to 1/2. and a signal processing circuit that performs attenuation processing to set the magnitudes of the two signals respectively supplied to the input electrodes of each transistor of the differential circuit to be 2:1.

[0007]

[Operation] Since the present invention comprises the above-mentioned technical means, an input signal is branched into two signals, a first signal and a second signal, and one of these two signals is in phase. In addition to supplying the above differential connection circuit as is,
The other signal has its phase inverted and is supplied to the differential connection circuit. Also, either one of these two signals can be 1/
By performing processing to attenuate the signals to 2 and supplying them to the input electrodes of each transistor of the differential circuit, and differentially adding these two signals using the differential circuit, it is possible to obtain a constant amplitude signal without using an operational amplifier. Allow phase shift operation to occur.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a circuit diagram of a constant amplitude phase shift circuit showing an embodiment of the present invention. The constant amplitude phase shift circuit of this embodiment will be explained below based on FIG. In the circuit of Figure 1, the input signal SIN supplied through input terminal 1 is
T is applied to the gate of transistor Q1.

The FET transistor Q1 has a gate connected to the ground GND via the resistor R1, a source connected to the ground GND via the resistor R2, and a drain connected to the power supply VDD. It is configured as a source follower.

The output of the source follower taken out from the source of the FET transistor Q1 is branched into two signals, a first signal S1 and a second signal S2, and is connected to a first signal supply line 5.
and a second signal supply line 6 to the differential connection circuit 3 through a signal transmission circuit 7. The differential connection circuit 3 includes an FET transistor Q2 with uniform characteristics.
and FET transistor Q3 are differentially connected.
The sources of Q3 and Q3 are connected in common, and are also connected to the ground GND via an FET transistor Q4 forming a constant current source.

The first signal supply line 5 is provided to connect the source of the FET transistor Q1 and the gate of the FET transistor Q2, and as shown in FIG. They are interposed in series between the two. Further, the connection point between the resistor R0 and the gate of the FET transistor Q2 is connected to the ground GND via the capacitor C0, and these resistors R0
and capacitor C0 constitute a low-pass circuit. Therefore, the signal supplied through the first signal supply line 5 is phase-shifted according to the sizes of the resistor R0 and capacitor C0 and is supplied to the gate of the FET transistor Q2.

On the other hand, the second signal supply line 6 is provided to connect the source of the FET transistor Q1 and the gate of the FET transistor Q3.
A resistor R5 is interposed in series between these. In addition, the above resistor R5 and FET transistor Q3
Resistor R6 and capacitor 1 are connected to the gate of
It is connected to ground GND via a series circuit consisting of:

Furthermore, a load resistor R3 is interposed between the drain of the FET transistor Q2 and the power supply VDD, and a load resistor R4 is interposed between the drain of the FET transistor Q3 and the power supply VDD. There is. A signal taken out from the drain of the FET transistor Q2 is supplied to the output terminal 2 as an output signal SOUT, and is led out from the output terminal 2.

In the circuit of FIG. 1 constructed in this manner, the resistance value of the resistor R5 and the resistance value of the resistor R6 are made equal. Therefore, the differential addition in the differential connection circuit 3 can be performed on a two-to-one basis.
The circuit of this embodiment can perform a constant amplitude phase shift operation similar to that of the circuit shown in FIG. Therefore, since there is no need to use an operational amplifier as shown in Figure 3, a high frequency constant amplitude phase shift circuit can be realized without the problem of oscillation, and the high frequency characteristics can be greatly improved. can. Note that the above output signal SOUT is FE
It may be taken out from the drain of the T transistor Q3 and supplied to the output terminal 2. Furthermore, although the above embodiments show examples using FET transistors, bipolar transistors may also be used.

[0015]

Effects of the Invention As described above, the present invention enables an input signal to be branched into two signals, a first signal and a second signal, and to be extracted. , one signal remains in phase and the other signal is inverted in phase and supplied to the differential connection circuit, and either one of these two signals is
2 is applied to the input electrodes of each transistor of the differential circuit, and the differential circuit performs differential addition of these two signals.
It is possible to perform a constant amplitude phase shift operation without using an operational amplifier, which may cause oscillation and is difficult to operate at a high frequency, as in the prior art. As a result, several hundred M
It is possible to realize constant amplitude phase shift operation with excellent high frequency characteristics that can be operated satisfactorily from Hz to several GHz.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a constant amplitude phase shift circuit of the present invention.

FIG. 2 is a functional block diagram of a conventional constant amplitude phase shift circuit.

FIG. 3 is a configuration diagram showing a specific circuit example of the constant amplitude phase shift circuit of FIG. 2;

[Explanation of symbols]

1 Input terminal 2 Output terminal 3 Differential connection circuit 5 First signal supply line 6 Second signal supply line 7 Signal transmission circuit SIN input signal SOUT Output signal S1 First signal S2 Second signal GND ground

Claims (1)

[Claims] [Claim 1] A first circuit that can branch an input signal into two signals, a first signal and a second signal, and take them out, and two transistors with the same characteristics are differentially connected. A differential connection circuit that differentially adds and outputs the first signal and second signal respectively applied to the input electrodes of these transistors, and a differential connection circuit that inverts the phase of the signal taken out from the first circuit. a first signal supply line that supplies the signal to the differential connection circuit, and a second signal supply line that supplies the signal taken out from the first circuit to the differential connection circuit while maintaining the same phase. and the above first
or the second signal is attenuated by half, so that the magnitudes of the two signals supplied to the input electrodes of each transistor of the differential circuit are 2:1. 1. A constant amplitude phase shift circuit, comprising: a signal processing circuit configured to set the constant amplitude phase shift circuit.