JPH0425378U - - Google Patents
Info
- Publication number
- JPH0425378U JPH0425378U JP1990066863U JP6686390U JPH0425378U JP H0425378 U JPH0425378 U JP H0425378U JP 1990066863 U JP1990066863 U JP 1990066863U JP 6686390 U JP6686390 U JP 6686390U JP H0425378 U JPH0425378 U JP H0425378U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- mute
- video signal
- signal
- subcarrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Picture Signal Circuits (AREA)
- Noise Elimination (AREA)
Description
第１図はこの考案に係る映像信号ミユート回路
の実施例を示す回路図である。第２図は従来例の
映像信号ミユート回路の回路図である。
主な符号の説明、１……ペデスタルクランプ回
路、２……サブキヤリアトラツプ回路、Ｑ１〜Ｑ
３……トランジスタ、Ｓ１……スイツチ回路。
FIG. 1 is a circuit diagram showing an embodiment of a video signal mute circuit according to this invention. FIG. 2 is a circuit diagram of a conventional video signal mute circuit. Explanation of main symbols, 1...Pedestal clamp circuit, 2...Subcarrier trap circuit, Q1~ Q
3 ...transistor, S1 ...switch circuit.
Claims (1)
ベルをミユートさせるためミユート信号によつて
ＯＮ／ＯＦＦするＯＮ／ＯＦＦスイツチ回路で構
成される映像信号ミユート回路において、 前記ＯＮ／ＯＦＦスイツチ回路に第１のトラン
ジスタと、第２のトランジスタとのエミツタ及び
コレクタ同士を接続してなる入力レベル判別回路
と、映像信号内のサブキヤリアの信号を除去する
サブキヤリアトラツプ回路と、このサブキヤリア
トラツプ回路をミユート信号によつてＯＮ／ＯＦ
Ｆするスイツチ回路とを設け、ミユート信号によ
つてミユート動作時にも同期信号のみを残すよう
に構成したことを特徴とする映像信号ミユート回
路。[Claims for Utility Model Registration] A video signal muting circuit comprising an ON/OFF switch circuit that inputs a video signal and turns ON/OFF according to a mute signal in order to mute the level of the input video signal, an input level discrimination circuit formed by connecting the emitters and collectors of a first transistor and a second transistor to each other in an ON/OFF switch circuit; a subcarrier trap circuit that removes a subcarrier signal in a video signal; This subcarrier trap circuit is turned ON/OFF by the mute signal.
What is claimed is: 1. A video signal mute circuit, comprising: a switch circuit that performs a mute operation;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990066863U JPH0425378U (en) | 1990-06-26 | 1990-06-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990066863U JPH0425378U (en) | 1990-06-26 | 1990-06-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0425378U true JPH0425378U (en) | 1992-02-28 |
Family
ID=31599938
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990066863U Pending JPH0425378U (en) | 1990-06-26 | 1990-06-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0425378U (en) |
-
1990
- 1990-06-26 JP JP1990066863U patent/JPH0425378U/ja active Pending
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