JPH04252617A - Digital modulation system - Google Patents

Abstract

PURPOSE:To improve the degree of suppression of a low-band component in the digital modulation system like an 8-14 modulation system. CONSTITUTION:A modulation code is selected in accordance with a rule based on the polarity of the just preceding DSV as the output of a DSV polarity discriminating circuit 17, the output of a waveform polarity discriminating circuit 15, and the output of a DSV holding circuit 19. The discrimination result of the circuit 17 is supplied as the input to the circuit 19, and the circuit 19 updates the output to new input contents when the result that the DSV is not 0 is inputted, but the circuit 19 holds the DSV precedding convergence to 0 when the result that the DSV is 0 is inputted. A ROM 13 (CDS polarity table) receives the same input as a ROM 12 (code conversion table) and outputs a CDS value after NRZI conversion of the 14-bit code outputted from the ROM 12 and outputs the number of bits '1' in the code (frequency in polarity inversion for NRZI conversion) as a remainder of 2. A DSV counting circuit 16 consists of an adder 161 and an FF 162 and integrates the CDS value of each code as the output of the ROM 13 to calculate the DSV.

Description

[Detailed description of the invention]

[Object of the invention]

0002

[Industrial Application Field] The present invention is designed to suppress low-frequency components of a modulated signal in a system such as a VTR (video tape recorder) that records digital data at high density via a rotating transformer. This paper relates to a digital modulation method.

0003

[Prior Art] Generally, a VTR that performs helical scanning
In a system that records via a rotating transformer, it is difficult to transmit low-frequency components below about 100 KHz, so it is desirable to use a so-called DC-free modulation method that does not have a low-frequency power spectrum as much as possible. .

Various modulation methods have been proposed to realize high recording density without DC. Literature (National T.
electrical report vol. 32N
o. 4 Aug. 1986) describes a code conversion method called an 8-14 modulation method that converts data into a 14-bit code in units of 8 bits. This method has a density ratio of 1.14, which is higher than the conventional MFM modulation method of 1.0, and is DC-free. An example of the conventional 8-14 modulation method is
It is described in No. 196469.

[0005] Code assignment in the above 8-14 modulation method is based on CDS (Codeword Digi).
For a modulation code where tal Sum) is “0”,
One-to-one correspondence with digital data, CDS is “0”
For other modulation codes, the CDS values are divided into positive groups and negative groups, and one digital data is divided into two groups.
correspond to two modulation codes. In other words, there is a one-to-two correspondence. FIG. 4 shows a modulation code selection method based on the above correspondence. In FIG. 4, the polarity of DSV is the polarity of the final end of the recording waveform obtained by the previous conversion.

[0006] Here, DSV (Digital Su
m Variation) is the modulation code sequence NR
ZI (Non Return to Zero
This is an integral value when the converted waveform is set as "1" (positive polarity) when it is at H (high) level, and "-1" (negative polarity) when it is at L (low) level. However, it is assumed that the waveform of NRZI conversion starts from the L level. Moreover, CDS is DSV within one modulation code. In NRZI conversion, the data bit “
1", the waveform after NRZI conversion is inverted with the previous waveform polarity even if the bit pattern is the same as shown in FIG. 5, and the effective CDS polarity is inverted.
When selecting a code, it is also necessary to refer to the previous waveform polarity.

To explain the relationship between CDS and DSV shown in FIG. 5, a modulation code with a positive CDS value increases DSV when the immediately preceding waveform polarity is negative, and decreases DSV when the immediately preceding waveform polarity is positive. let A modulation code with a negative CDS value is opposite to the above, decreasing the DSV when the waveform polarity is negative, and increasing the DSV when the waveform polarity is positive. In addition,
A modulation code with a CDS value of 0 keeps the DSV constant regardless of whether the waveform polarity is positive or negative.

Therefore, the modulation operation is performed according to the selection method shown in FIG. 4, and the one-to-two correspondence code selection is performed with reference to the immediately preceding DSV and waveform polarity so that the absolute value of the DSV is small. In other words, the fact that the modulation code is DC-free means that the absolute value of the DSV is always small, so when converting the code, the previous DSV and waveform polarity are monitored and the DSV is continuously Codes are selected to avoid increases or decreases.

By the way, in the above method, when the DSV is zero, the code with the smaller absolute value is selected regardless of the polarity of the CDS. Therefore, after the DSV becomes zero at the code end, it is not uniquely determined whether the DSV will be positive or negative at the next code end.

To explain this with reference to FIG. 6, in both FIGS. 6(a) and 6(b), after DSV becomes zero at time t0, DSV stays positive and becomes zero again at t1. . Thereafter, in FIG. 6(a), the DSV swings to the negative polarity and returns to zero at t2, and in FIG. 6(b), it swings to the positive polarity again and returns to zero at t2.

Now, consider converting the DSV fluctuations on the time axis in FIGS. 6(a) and 6(b) to the frequency axis. For simplicity, Figures 6(a) and (b) are replaced with Figure 7(a).
, (b).

Regarding FIG. 7(a), since it is a single sine waveform, it can be expressed by equation (1). f(t) = Asin2π/T・t

(1) Regarding Figure 7(b),
a when expanded according to the Fourier series expansion formula of equation (2)
Considering 0 , an , bn , ∞
f(t) = a0/2+Σ(ancos2nπ
/T・t+bnsin2nπ/T・t) (2)
n=1
a0 =4a/π

(3)
0
n=2m-1
an = { −(4/ π)・{
A/(n2 -1)} n=2m m=1
, 2, 3 (4) Since it is an even function, bn = 0

(5) becomes.

Since a0 in equation (3) indicates a DC component, it can be seen that when a code is selected as shown in FIG. 6(b), a DC component is generated in the DSV fluctuation. . As stated in JP-A-61-120323, this DSV fluctuation frequency appears in the modulation signal spectrum, so the DSV fluctuation pattern shown in Fig. 7(b) is the DC component of the modulation signal. It becomes. In electrical equipment such as a VTR that uses a transmission path with loss of low-frequency components, the low-frequency components of modulated signals are not transmitted correctly, resulting in inconveniences during recording and reproduction.

[0014]

[Problems to be Solved by the Invention] As mentioned above, in the conventional modulation method, a low-frequency component is generated in the modulation signal, and the V
A transmission system such as TR that involves loss of low-frequency components is inconvenient for accurate recording and reproduction.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a digital modulation method that can suppress the occurrence of low-frequency components in a modulated signal.

[Configuration of the invention]

[0017]

[Means for Solving the Problem] The digital modulation method according to claim 1 converts an m-bit data code into an n-bit modulation code having a larger number of bits than the m bits, and then performs NRZI conversion. , for a specific or all data codes, two or more modulation codes with different CDS (DSV in one modulation code) in the modulation code after NRZI conversion are made to correspond, while the data code is When selecting a modulation code for one-to-one correspondence, in a digital modulation method that adaptively selects codes so that fluctuations in the DSV value of the modulation code are suppressed within a certain value, the previous DSV is zero, and DS
When V changes from zero to non-zero (that is, when the CDS of the next selectable modulation code is non-zero), the code is selected so that the DSV changes in the direction opposite to the polarity of the DSV immediately before the DSV becomes zero. It is characterized by doing the following.

[0018]

[Operation] According to the present invention, when the DSV changes from zero to non-zero, the DSV is changed in the opposite polarity direction to the polarity just before it becomes zero, thereby preventing a DC component from occurring in the fluctuation of the DSV. , suppresses the low frequency components of the modulated signal.

[0019]

[Example] An example will be described with reference to the drawings. FIG. 3 shows a modulation code selection method in the present invention. In FIG. 3, it is assumed that there are no selectable data words with a CDS of zero. 3, the difference from FIG. 4 is that the immediately preceding D
When the SV is zero and the CDS of the next selectable code is non-zero, the polarity of the DSV just before the DSV converges to zero is displayed. D
If SV is positive, CDS selects a positive modulation code;
At this time, if the DSV before zero convergence is negative, a modulation code with a negative CDS is selected. Also, if the immediately preceding waveform polarity is negative and the DSV before zero convergence is positive, the CDS selects a negative modulation code, and if the DSV before zero convergence is negative at this time, the CDS selects a positive modulation code. Select code. Last DSV
When is positive or negative (that is, non-zero), it is unrelated to the polarity of DSV before convergence to zero, and is similar to FIG. 4. The selection method of each modulation code in FIG. 3 determined as described above is determined by rule No. 1 to 8.

FIG. 1 shows an example of a modulation circuit to which the present invention is applied. In FIG. 1, data input from a data input terminal 11 is input to first and second ROMs 12 and 13. The ROM 12 selects a modulation code from the previous DSV polarity output from the DSV polarity determination circuit 17, the output from the waveform polarity determination circuit 15, and the output from the DSV hold circuit 19 according to the rules shown in FIG. The DSV hold circuit 19 is supplied with the judgment result of the DSV polarity judgment circuit 17 as an input, and when the input is a result of DSV non-zero, the output is updated to new input contents, but if the input is DSV
When the result is zero, the output is not updated and the D before zero convergence is
Performs operations such as holding SV. In ROM13,
The ROM 12 receives the same input as the ROM 12 and outputs the 14-bit code after NRZI conversion.
The number of polarity reversals during conversion) is output as a remainder of 2. DSV
The count circuit 16 includes an adder 161 and a flip-flop (
FF) 162, and integrates the CDS value for each code, which is the output of the ROM 13, to calculate the DSV. The waveform polarity determination circuit 15 is composed of an EXOR gate 151 and a flip-flop (FF) 152, and adds the number of "1" bits (number of polarity inversions) for each code, which is the output of the ROM 13, modulo 2 to determine the current state. Outputs the polarity of the recorded waveform. In the circuit having the loop configuration as described above, the 14-bit code output from the ROM 12 is converted into a bit-serial signal by the parallel-to-serial converter 14, then NRZI modulated by the NRZI converter 18, and the output terminal At step 20, a recording signal waveform is obtained. This recording signal waveform is output to a recording section (not shown) and recorded on a recording medium such as a magnetic tape.

Next, the operation of the above circuit is shown in Tables 1 and 2 and FIG.
Explain with reference to. Tables 1 and 2 show modulation code tables used in this embodiment. This code table is JP-A-61-1
This is a part of a modulation code table in the 8-14 modulation method of Publication No. 96469. In this code table, the last bit of the modulation code is "0", and one or more bits "0" are included between bits "1" in the modulation code. Furthermore, the number of consecutive bits "0" within the modulation code is limited to eight at most, and the number of consecutive bits "0" at both ends of the modulation code is limited to four or less. Therefore, in a modulation code string, one or more bits "0" and eight or less bits are always included between bits "1".

[0022]

[Table 1]

[0023]

[Table 2]

In FIG. 2, FIG. 2(b) is the same as FIG. 2(a).
It shows the DSV change in . As shown in Figure 2(a), first, in the initial state, the DSV is 2 and the recording waveform (N
Consider the case where the polarity of the RZI conversion waveform) is negative and the DSV hold value (ie, DSV before zero convergence) is positive. Here, the input data strings are “4A”, “2F”, “50”, “45”.
”, “4A”, and “4A” (hexadecimal data) are supplied. When “4A” is input as data, the immediately preceding DSV is positive and the waveform polarity is negative, so the According to rule No. 2 and referring to Table 2, CDS=-
Select a negative modulation code of 2. As a result, the DSV becomes 0, the waveform polarity becomes positive (see explanation of FIG. 5), and the DSV hold value becomes positive. Next, when “2F” is input as data,
Since this data has a one-to-one correspondence with only one data of CDS=0 as shown in Table 1, only one modulation code is selected. As a result, DSV is constant at zero,
The waveform polarity is reversed and becomes negative, and the DSV hold value becomes positive. Next, when “50” is input as data, the previous D
Since SV is zero, waveform polarity is negative, and DSV hold value is positive, rule No. 3 in FIG. 5, and with reference to Table 2, C
Choose a negative modulation code with DS=-4. As a result, DSV
is -4, the waveform polarity is negative (see explanation of FIG. 5), and the DSV hold value is negative. In this way, input data string “4”
A”, “2F”, “50”, “45”, “4A”, “4
For the input of “A”, rule No. 2, none, 5 in Figure 3
, 8, 7, and 6 in the order of NRZI modulation and output.

As shown in FIG. 2(b), when the DSV changes from zero to non-zero, it is possible to change the DSV in a direction opposite to the polarity immediately before it becomes zero. by this,
It is possible to suppress low-frequency components generated in the modulated signal without generating DC components in the fluctuating frequency components of the DSV.

[0026]

[Effects of the Invention] As described above, according to the present invention, the DS
When V changes from zero to non-zero, DSV can change in the direction opposite to the polarity just before it becomes zero, so D
It is possible to suppress low-frequency components generated in the modulated signal without generating DC components in the fluctuating frequency components of the SV.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a modulation circuit to which a digital modulation method of the present invention is applied.

FIG. 2 is an explanatory diagram illustrating the circuit operation and DSV fluctuation in FIG. 1;

FIG. 3 is an explanatory diagram showing a modulation code selection method according to the present invention.

FIG. 4 is an explanatory diagram showing a conventional modulation code selection method.

FIG. 5 is an explanatory diagram showing the relationship between CDS and DSV.

FIG. 6 is a graph showing an example of DSV fluctuation in a conventional example.

FIG. 7 is a waveform diagram showing simplified waveforms for analyzing the waveforms in FIG. 6;

[Explanation of symbols]

11 Data input terminal 12 ROM (code conversion table) 13 ROM
(CDS polarity table) 15 Waveform polarity determination circuit 16 DSV count circuit 17 DSV polarity determination circuit 18 NRZI converter 19 DSV hold circuit 20 Modulation signal output terminal

Claims (1)

[Claims] [Claim 1] An m-bit data code is converted into an n-bit modulation code with a larger number of bits than the m-bits, and then NRZI conversion is performed, and it is applicable to a specific or all data codes. Then, two or more modulation codes with different CDS (DSV in one modulation code) in the modulation code after NRZI conversion are made to correspond, while the data code is modulated to make it correspond one-to-one with one of the modulation codes. When selecting a code, in a digital modulation system that adaptively selects a code so that fluctuations in the DSV of the modulation code are suppressed within a certain value, the previous DSV is zero, and the next selectable modulation code is A digital modulation method characterized in that, when CDS is not zero, code selection is performed so as to change DSV in a direction opposite to the polarity of DSV immediately before DSV becomes zero.