JPH04245839A - Transmission output circuit - Google Patents
Transmission output circuitInfo
- Publication number
- JPH04245839A JPH04245839A JP1125891A JP1125891A JPH04245839A JP H04245839 A JPH04245839 A JP H04245839A JP 1125891 A JP1125891 A JP 1125891A JP 1125891 A JP1125891 A JP 1125891A JP H04245839 A JPH04245839 A JP H04245839A
- Authority
- JP
- Japan
- Prior art keywords
- amplitude
- signal
- output
- amplifier
- integrator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 title claims abstract description 24
- 230000003321 amplification Effects 0.000 claims abstract description 12
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 12
- 239000003990 capacitor Substances 0.000 description 9
- 230000007423 decrease Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000010354 integration Effects 0.000 description 1
Abstract
Description
[発明の目的] [Purpose of the invention]
【0001】0001
【産業上の利用分野】本発明は調整が不要で低コストな
伝送出力回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission output circuit that requires no adjustment and is low cost.
【0002】0002
【従来の技術】図3に従来例を示す。T1,T2は端子
で電話回線に接続される。伝送信号はT2にあらわれる
。1はDTMFダイアラやFSK MODEMのような
伝送信号を発生する送信回路で可変抵抗器VR1を介し
増幅器2に接続されている。増幅器2は送信回路1から
出力されるDTMF信号やFSK信号を所望のレベルに
増幅するものでこの例では演算増幅器OP1、抵抗器R
2,R3から成る反転増幅器で記載してある。増幅器2
の増幅度は可変抵抗器VR1により可変される。C1は
コンデンサで増幅器2で増幅された送信信号を電話回線
に交流結合する目的で設けられている。R1は抵抗器で
電話回線への出力インピダンスを決める目的で設けられ
ており通常600Ω程度が選ばれる。2. Description of the Related Art FIG. 3 shows a conventional example. T1 and T2 are connected to a telephone line through terminals. The transmitted signal appears at T2. Reference numeral 1 denotes a transmission circuit that generates a transmission signal, such as a DTMF dialer or FSK MODEM, and is connected to the amplifier 2 via a variable resistor VR1. The amplifier 2 amplifies the DTMF signal and FSK signal output from the transmitting circuit 1 to a desired level, and in this example, the operational amplifier OP1 and the resistor R
2, an inverting amplifier consisting of R3. amplifier 2
The degree of amplification is varied by a variable resistor VR1. C1 is a capacitor provided for the purpose of AC coupling the transmission signal amplified by the amplifier 2 to the telephone line. R1 is a resistor provided for the purpose of determining the output impedance to the telephone line, and is usually selected to be about 600Ω.
【0003】0003
【発明が解決しようとする課題】このような従来回路で
は、送信回路1のバラツキやコンデンサC1のバラツキ
があるため、可変抵抗器VR1で端子T2からの出力レ
ベルが所望のレベルになる様に増幅器2の増幅度を調整
する必要があった。また可変抵抗器VR1が高コストな
ので製品自体が高コストになっていた。本発明の目的は
、調整を不要とし低コストな伝送出力回路を提供するこ
とにある。[発明の構成][Problems to be Solved by the Invention] In such a conventional circuit, since there are variations in the transmitting circuit 1 and variations in the capacitor C1, it is necessary to adjust the amplifier so that the output level from the terminal T2 becomes a desired level using the variable resistor VR1. It was necessary to adjust the amplification degree of 2. Furthermore, since the variable resistor VR1 is expensive, the product itself is expensive. An object of the present invention is to provide a low-cost transmission output circuit that does not require adjustment. [Structure of the invention]
【0004】0004
【課題を解決するための手段】上記目的を達成するため
に本発明は、帰還抵抗を介して出力端を一方の入力端へ
接続する増幅手段と、増幅手段により増幅された伝送信
号の交流振幅と基準電圧の振幅とを比較する比較手段と
、伝送信号の交流振幅が基準電圧の振幅より大きい場合
に比較手段が出力する信号を積分する積分器と、増幅手
段の帰還抵抗に並列に接続され積分器の出力信号により
可変される可変抵抗手段で構成する。[Means for Solving the Problems] In order to achieve the above object, the present invention provides an amplifying means for connecting an output end to one input end via a feedback resistor, and an AC amplitude of a transmission signal amplified by the amplifying means. and an amplitude of the reference voltage, an integrator that integrates the signal output by the comparison means when the AC amplitude of the transmission signal is larger than the amplitude of the reference voltage, and an integrator connected in parallel to the feedback resistor of the amplification means. It consists of variable resistance means that is varied by the output signal of the integrator.
【0005】[0005]
【作用】このような構成において、比較手段が伝送信号
の交流振幅と基準電圧の振幅とを比較して伝送信号の交
流振幅の方が大きい場合に信号を出力し、積分器を介し
てこの出力信号により可変抵抗手段が可変されて増幅手
段の増幅度を調整するので、調整の手間が省け低コスト
になる。[Operation] In such a configuration, the comparing means compares the AC amplitude of the transmission signal with the amplitude of the reference voltage, outputs a signal when the AC amplitude of the transmission signal is larger, and outputs this signal via the integrator. Since the variable resistance means is varied by the signal to adjust the amplification degree of the amplification means, the effort of adjustment can be saved and costs can be reduced.
【0006】[0006]
【実施例】以下、本発明の実施例を図面を参照して説明
する。図1は本発明の伝送出力回路の構成図である。T
1,T2は端子で電話回線に接続される。伝送信号はT
2にあらわれる。1はDTMFダイアラやFSK MO
DEMのような伝送信号を発生する送信回路で増幅器2
に接続されている。増幅器2は送信回路1から出力され
るDTMF信号やFSK信号を所望のレベルに増幅する
。この例では演算増幅器OP1、抵抗器R2,R3から
成り抵抗器R2に並列に抵抗可変素子4が接続されてい
る。C1はコンデンサで電話回線と交流結合する目的で
設けられている。R1は抵抗器で電話回線への出力イン
ピダンスを決める目的で設けられており通常600Ω程
度が選ばれる。コンデンサC2は交流量をコンパレータ
OP2に印加する目的で設けられコンパレータOP2側
を抵抗器R4で接地電位にバイアスされている。Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of a transmission output circuit according to the present invention. T
1 and T2 are terminals connected to the telephone line. The transmission signal is T
Appears in 2. 1 is DTMF dialer or FSK MO
Amplifier 2 is a transmitting circuit that generates a transmission signal such as a DEM.
It is connected to the. The amplifier 2 amplifies the DTMF signal and FSK signal output from the transmitting circuit 1 to a desired level. In this example, it consists of an operational amplifier OP1 and resistors R2 and R3, and a variable resistance element 4 is connected in parallel to the resistor R2. C1 is a capacitor provided for the purpose of AC coupling with the telephone line. R1 is a resistor provided for the purpose of determining the output impedance to the telephone line, and is usually selected to be about 600Ω. The capacitor C2 is provided for the purpose of applying an alternating current to the comparator OP2, and the comparator OP2 side is biased to the ground potential by a resistor R4.
【0007】次に作用について説明する。コンパレータ
OP2は−端子側に基準電圧Vrefが接続されており
+端子側の入力電圧が−端子側電圧より下まわると‘L
’レベルを出力する。Vrefは基準電圧で+側は接地
されており−側はコンパレータOP2の−端子に接続さ
れている。基準電圧Vrefがvr を出力していると
するとコンパレータOP2の−端子には−vr が印加
されることになる。基準電圧Vrefはツュナーダイオ
ードやバンドギャップリファレンス、電源電圧を用いて
構成されることが多い。D1はダイオードでコンパレー
タOP2の出力が‘L’レベルの時のみ電流が流れ積分
器3と導通する。3は積分器で演算増幅器OP3,抵抗
器R5,コンデンサC3から成りコンパレータOP2の
‘L’レベル電圧を積分する積分器3の出力は抵抗可変
素子4に接続され増幅器1の増幅度を制御している。4
は抵抗可変素子でこの例ではCdsフォトカプラで記し
てある。LED側は抵抗R6を介し積分器3に接続され
ており抵抗器側は増幅器1の抵抗器R2と並列に接続さ
れている。LED側の電流が増加すると抵抗器側の抵抗
は減少する。Next, the operation will be explained. Comparator OP2 has the reference voltage Vref connected to the - terminal side, and when the input voltage on the + terminal side becomes lower than the voltage on the - terminal side, 'L
'Output the level. Vref is a reference voltage, the + side is grounded, and the - side is connected to the - terminal of the comparator OP2. If the reference voltage Vref is outputting vr, -vr will be applied to the - terminal of the comparator OP2. The reference voltage Vref is often constructed using a Tuner diode, a bandgap reference, or a power supply voltage. D1 is a diode through which current flows and conducts with the integrator 3 only when the output of the comparator OP2 is at the 'L' level. 3 is an integrator, which is composed of an operational amplifier OP3, a resistor R5, and a capacitor C3.The output of the integrator 3, which integrates the 'L' level voltage of the comparator OP2, is connected to a variable resistance element 4, which controls the amplification degree of the amplifier 1. There is. 4
is a resistance variable element, which is represented by a Cds photocoupler in this example. The LED side is connected to the integrator 3 via a resistor R6, and the resistor side is connected in parallel with the resistor R2 of the amplifier 1. As the current on the LED side increases, the resistance on the resistor side decreases.
【0008】図2に波形図を示す。送信回路1からは(
a) のような波形が出力されている。信号aは増幅器
2により増幅され電話回線と交流結合させるためコンデ
ンサC1を通過しT2へ至る。ここでコンデンサC1を
通過した信号の交流成分は(b) となり所望の出力振
幅が2Vaであったとする(波形bの(1) )。信号
bはコンデンサC2によりコンパレータOP2に印加さ
れている。
コンデンサC2はコンパレータOP2に交流成分のみを
伝える目的で設けられている。コンパレータOP2の−
端子側には基準電圧Vrefが接続されているが、この
基準電圧Vrefの電圧vrはvr=Vaとなるように
選んである。つまり基準電圧の+側は接地されているた
め、コンパレータOP2の−端子側は−vr が印加さ
れることになる。よってコンパレータOP2の+端子側
に入力する信号bの電圧が−端子側電圧−vr9l下ま
わると(波形bの(2) )、すなわち信号bが所望の
入力電圧振幅2Vbを上まわると、コンパレータOP2
の出力は‘L’となる(波形bの(3) )。ここで、
ダイオードD1に電流が流れ積分器3と導通する そ
して積分器3はコンパレータOP2の‘L’レベルの電
圧を積分しdのような電圧を出力する。いいかえればコ
ンパレータOP2の出力が‘L’レベルとなると‘L’
レベルの間中積分器3は積分動作を行ない(波形dの(
5) )、‘L’レベルから‘H’レベルに変化すると
その時の電流を継続する(波形dの(6) )。再びコ
ンパレータOP2の出力が‘L’レベルになると積分器
3は積分動作を行う(波形dの(7) )。このような
動作をvr =va となるまでくりかえす。信号dは
抵抗R6により電流に変換されて抵抗可変素子4に流れ
込み、LED側の電流が増加すると増幅器2の抵抗器R
2と並列に接続されている抵抗器の抵抗が減少する。抵
抗可変素子4の抵抗器側の抵抗が減少すると増幅器2の
増幅度が小さくなりその分信号bの振幅も小さくなる。
以上の動作をくりかえし増幅度を回路により制御するこ
とにより所望の振幅を得ることができる。FIG. 2 shows a waveform diagram. From transmitter circuit 1 (
a) A waveform like this is output. Signal a is amplified by amplifier 2 and passes through capacitor C1 to T2 for AC coupling to the telephone line. Here, it is assumed that the AC component of the signal passing through the capacitor C1 becomes (b) and the desired output amplitude is 2Va ((1) of waveform b). Signal b is applied to comparator OP2 by capacitor C2. Capacitor C2 is provided for the purpose of transmitting only the alternating current component to comparator OP2. - of comparator OP2
A reference voltage Vref is connected to the terminal side, and the voltage vr of this reference voltage Vref is selected so that vr=Va. In other words, since the + side of the reference voltage is grounded, -vr is applied to the - terminal side of the comparator OP2. Therefore, when the voltage of signal b input to the + terminal side of comparator OP2 falls below the - terminal side voltage -vr9l ((2) of waveform b), that is, when signal b exceeds the desired input voltage amplitude 2Vb, comparator OP2
The output becomes 'L' ((3) of waveform b). here,
A current flows through the diode D1 and conducts with the integrator 3.The integrator 3 then integrates the 'L' level voltage of the comparator OP2 and outputs a voltage like d. In other words, when the output of comparator OP2 becomes 'L' level, it becomes 'L'.
During the level, the integrator 3 performs an integration operation ((of waveform d)
5) ), when the current changes from 'L' level to 'H' level, the current at that time continues ((6) of waveform d). When the output of the comparator OP2 becomes 'L' level again, the integrator 3 performs an integrating operation ((7) of waveform d). This operation is repeated until vr = va. The signal d is converted into a current by the resistor R6 and flows into the variable resistance element 4, and when the current on the LED side increases, the resistor R of the amplifier 2
The resistance of the resistor connected in parallel with 2 decreases. When the resistance on the resistor side of the variable resistance element 4 decreases, the amplification degree of the amplifier 2 decreases, and the amplitude of the signal b decreases accordingly. A desired amplitude can be obtained by repeating the above operation and controlling the amplification degree by the circuit.
【0009】[0009]
【発明の効果】このように本発明は、増幅手段の増幅度
を調整する可変抵抗手段は、伝送信号の交流振幅が基準
電圧の振幅より大きくなった場合に比較手段が出力する
信号で可変されるので、自動調整が可能で低コストな伝
送出力回路を得ることができる。As described above, in the present invention, the variable resistance means for adjusting the amplification degree of the amplification means is varied by the signal output by the comparison means when the AC amplitude of the transmission signal becomes larger than the amplitude of the reference voltage. Therefore, it is possible to obtain a low-cost transmission output circuit that can be automatically adjusted.
【図1】 本発明の伝送出力回路の構成図。FIG. 1 is a configuration diagram of a transmission output circuit of the present invention.
【図2】 本発明の伝送出力回路の動作を示す波形図
。FIG. 2 is a waveform diagram showing the operation of the transmission output circuit of the present invention.
【図3】 従来の伝送出力回路の構成図。FIG. 3 is a configuration diagram of a conventional transmission output circuit.
Claims (1)
端へ接続する増幅手段と、この増幅手段により増幅され
た伝送信号の交流振幅と基準電圧の振幅とを比較する比
較手段と、前記交流振幅が前記基準電圧の振幅より大き
い場合に前記比較手段が出力する信号を積分する積分器
と、前記増幅手段の帰還抵抗に並列に接続され前記積分
器の出力信号により可変される可変抵抗手段とを有する
伝送出力回路。1. Amplifying means for connecting an output end to one input end via a feedback resistor; comparing means for comparing the AC amplitude of the transmission signal amplified by the amplifying means with the amplitude of the reference voltage; an integrator that integrates the signal output by the comparison means when the AC amplitude is larger than the amplitude of the reference voltage; and variable resistance means that is connected in parallel to the feedback resistor of the amplification means and is varied by the output signal of the integrator. A transmission output circuit having.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1125891A JP2911232B2 (en) | 1991-01-31 | 1991-01-31 | Transmission output circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1125891A JP2911232B2 (en) | 1991-01-31 | 1991-01-31 | Transmission output circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04245839A true JPH04245839A (en) | 1992-09-02 |
JP2911232B2 JP2911232B2 (en) | 1999-06-23 |
Family
ID=11772918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1125891A Expired - Lifetime JP2911232B2 (en) | 1991-01-31 | 1991-01-31 | Transmission output circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2911232B2 (en) |
-
1991
- 1991-01-31 JP JP1125891A patent/JP2911232B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP2911232B2 (en) | 1999-06-23 |
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