JPH04245067A - Reproducing device - Google Patents

Abstract

PURPOSE:To reduce the occurrence of quantization errors at the time of reproducing signals from a recording medium so as to stably reproduce information. CONSTITUTION:A photodetector 8 detects signals corresponding to the information on a recording medium 1 and a quantization circuit 139 compares the detected signals with a reference level and quantizes signals in accordance with the compared results. Then the detected signals of the photodetector 8 are converted into a binarized signal string in accordance with the quantized results and, in addition, the level shifting amount between the signal level immediately before quantizing the signals and the reference level is detected. Finally, the gain of the detected signals or the value of the reference level is changed in accordance with the level shifting amount.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reproducing apparatus such as an optical disc apparatus for reproducing information recorded on an optical disc.

0002

[Background Art] Conventionally, when reproducing information recorded on an optical disc as a recording medium, the reference level for quantizing the signal obtained from the optical disc or the magnitude of the gain of the reproduced signal obtained from the optical disc is Fixed.

[0003] For this reason, if there is dust or scratches on the substrate surface of the optical disc, or if there is uneven sensitivity in the recording film of the optical disc and sufficient recording was not performed under the same recording conditions, it is difficult to reproduce signals from the optical disc. The signal level becomes smaller.

[0004] Therefore, since the reference level for quantization and the gain of the reproduced signal are fixed, there is a problem in that quantization errors occur during signal reproduction, resulting in information reproduction errors.

[0005] Accordingly, the present invention can reduce quantization errors during signal reproduction, and can stably reproduce information.

[0006]

[Problem to be solved by the invention] Conventionally, since the reference level for quantization and the gain of the reproduced signal are fixed, quantization errors occur during signal reproduction, resulting in information reproduction errors. There's a problem.

The present invention has been made in view of the above points, and an object of the present invention is to provide a playback device that can reduce quantization errors during signal playback from a recording medium and can stably play back information. shall be.

[0008]

[Means for Solving the Problems] A playback device of the present invention includes:
a detection means for detecting a signal according to information on a recording medium, a reference value generation means for generating a reference value, a detection signal from the detection means and a reference value from the reference value generation means are compared,
a first processing means for quantizing the signal according to the comparison result; a conversion means for converting the detection signal of the detection means into a binary signal sequence according to the quantization result from the first processing means;
Calculation means for calculating the difference between the detection signal from the detection means and the reference value from the reference value generation means, and a calculation means for calculating the difference between the detection signal from the detection means and the reference value from the reference value generation means; It consists of a second processing means for changing the value.

The reproducing apparatus of the present invention includes a detection means for detecting a signal corresponding to information on a recording medium, a reference value generation means for generating a plurality of reference values, a detection signal from the detection means and the reference value generation means. a first processing means that compares the signals with a plurality of reference values and quantizes the signal according to the comparison result; and a first processing means that quantizes the signal according to the comparison result; a conversion means for converting into a digitized signal sequence; a calculation means for calculating the difference between the detection signal from the detection means and a reference value closest to the detection signal in the reference value generation means; and by this calculation means. The second processing means changes the reference value generated by the reference value generation means in accordance with the calculated difference.

The reproducing apparatus of the present invention includes a detection means for detecting a signal corresponding to information on a recording medium, a reference value generation means for generating a reference value, an amplification means for amplifying the detection signal from the detection means, and amplification means for amplifying the detection signal from the detection means. a first processing means for comparing the signal amplified by the means with the reference value from the reference value generating means and quantizing the signal according to the comparison result; a conversion means for converting the detection signal of the detection means into a binary signal sequence, a calculation means for calculating the difference between the detection signal from the detection means and a reference value from the reference value generation means, and this calculation means. The second processing means changes the content of amplification by the amplification means according to the difference calculated by the second processing means.

The reproducing apparatus of the present invention includes a detection means for detecting a signal corresponding to information on a recording medium, a reference value generation means for generating a plurality of reference values, an amplification means for amplifying the detection signal from the detection means, a first processing means that compares the signal amplified by the amplification means with a plurality of reference values from the reference value generation means and quantizes the signal according to the comparison result;
a conversion means for converting the detection signal of the detection means into a binary signal sequence according to the quantization result from the first processing means; a detection signal from the detection means and its detection signal in the reference value generation means; , and a second processing means that changes the content of amplification by the amplification means in accordance with the difference calculated by the calculation means.

0012

[Operation] This invention detects a signal corresponding to information on a recording medium by a detection means, generates a reference value by a reference value generation means,
The detection signal from the detection means is compared with the reference value from the reference value generation means, the signal is quantized according to the comparison result, and the detection signal from the detection means is binarized according to the quantization result. The difference between the detection signal from the detection means and the reference value from the reference value generation means is calculated, and the reference value generated from the reference value generation means is calculated according to the calculated difference. This allows you to change the value.

[0013] In the present invention, a detection means detects a signal corresponding to information on a recording medium, a plurality of reference values are generated by a reference value generation means, and the detection signal from the detection means and the reference value generation means are combined. , quantize the signal according to the comparison result, convert the detection signal of the detection means into a binary signal sequence according to the quantization result, and detect the detection signal from the detection means. Calculating the difference between the signal and a reference value closest to the detected signal by the reference value generating means, and changing the value of the reference value generated from the reference value generating means in accordance with the calculated difference. It was designed to do so.

The present invention detects a signal corresponding to information on a recording medium with a detection means, generates a reference value with a reference value generation means, amplifies the detection signal from the detection means with an amplification means,
This amplified signal is compared with the reference value from the reference value generation means, the signal is quantized according to the comparison result, and the detection signal of the detection means is binarized into a signal string according to the quantization result. The difference between the detection signal from the detection means and the reference value from the reference value generation means is calculated, and the content of amplification by the amplification means is changed according to the calculated difference. be.

The present invention detects a signal corresponding to information on a recording medium with a detection means, generates a plurality of reference values with a reference value generation means, amplifies the detection signal from the detection means with an amplification means, The amplified signal is compared with a plurality of reference values from the reference value generation means, the signal is quantized according to the comparison result, and the detection signal of the detection means is binarized according to the quantization result. The difference between the detection signal from the detection means and the reference value closest to the detection signal in the reference value generation means is calculated, and the amplification means The content of the amplification is changed.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a disk device. This recording medium 1 is rotated by a motor 2 at a constant speed, for example. This motor 2 has a motor control circuit 1
8.

Recording and reproduction of information on the recording medium 1 is performed by an optical head 3. This optical head 3 includes a drive coil 13 that constitutes a movable part of a linear motor 31.
The drive coil 13 is connected to a linear motor control circuit 17.

Note that the recording medium 1 uses a recording film in which pits are formed by perforation.
A recording film or a multilayer recording film that utilizes phase change may be used, and a magneto-optical disk or the like may be used as the recording medium. In the above case, the configuration of the optical head and the like is similarly changed.

A linear motor position detector 26 is connected to the linear motor control circuit 17, and the linear motor position detector 26 determines the position by detecting the optical scale 25 provided on the optical head 3. It is designed to output a signal.

Further, a permanent magnet (not shown) is provided at the fixed portion of the linear motor 31, and the drive coil 13
is excited by the linear motor control circuit 17, so that the optical head 3 is moved in the radial direction of the recording medium 1.

An objective lens 6 is held in the optical head 3 by a wire or a leaf spring (not shown), and the objective lens 6 is moved in the focusing direction (in the direction of the optical axis of the lens) by a drive coil 5. The coil 4 allows movement in the tracking direction (direction perpendicular to the optical axis of the lens).

Furthermore, the laser light generated by the semiconductor laser oscillator 9 driven by the laser control circuit 14 is
The recording medium 1 is irradiated via the collimator lens 11a, the half prism 11b, and the objective lens 6, and the reflected light from the recording medium 1 is reflected by the objective lens 6 and the half prism 1.
1b, a condensing lens 10a, and a cylindrical lens 10b.

The photodetector 8 has four divided photodetection cells 8.
It is composed of a, 8b, 8c, and 8d.

The output signal of the photodetection cell 8a of the photodetector 8 is supplied to one end of the adders 30a, 30c via the amplifier 12a, and the output signal of the photodetection cell 8b is supplied to the amplifier 1.
2b to one end of adders 30b and 30d,
The output signal of the photodetection cell 8c is supplied to the other end of the adders 30b and 30c via an amplifier 12c, and the output signal of the photodetection cell 8d
The output signal is sent to adders 30a and 3 via amplifier 12d.
It is designed to be supplied to the other end of 0d.

The output signal of the adder 30a is supplied to the inverting input terminal of the differential amplifier OP1.
The output signal of the adder 30b is supplied to the non-inverting input terminal of the adder 30b. Thereby, the differential amplifier OP1 supplies a track difference signal to the tracking control circuit 16 according to the difference between the adders 30a and 30b. This tracking control circuit 16 creates a track drive signal according to the track difference signal supplied from OP1.

A track drive signal output from the tracking control circuit 16 is supplied to the drive coil 4 in the tracking direction. Further, the track difference signal used in the tracking control circuit 16 is supplied to the linear motor control circuit 17.

The output signal of the adder 30c is supplied to the inverting input terminal of the differential amplifier OP2, and the output signal of the adder 30d is supplied to the non-inverting input terminal of the differential amplifier OP2. Thereby, the differential amplifier OP2 supplies a signal regarding the focus point to the focusing control circuit 15 according to the difference between the adders 30c and 30d. The output signal of the focusing control circuit 15 is supplied to the focusing drive coil 5, and is controlled so that the laser beam is always in just focus on the recording medium 1.

Each photodetection cell 8a, . . . of the photodetector 8 with focusing and tracking performed as described above
The sum signal of the outputs of the adders 8d, that is, the output signals from the adders 30a and 30b, reflects changes in reflectance from pits (recorded information) formed on the tracks. This signal is supplied to the signal processing circuit 19, and this signal processing circuit 19
Image information and address information (track number, sector number, etc.) are reproduced.

Further, a recording signal generating circuit 44 is provided before the laser control circuit 14. This recording signal creation circuit 44 includes a modulation circuit 40 that converts (modulates) the recording signal using a 2-7 code conversion method, and a 2-7 code conversion system.
7 code at a multi-level signal level and a modulation circuit 41 that changes the switching interval of signal level change, and the signal processing circuit 19 has a signal processing circuit 19 that converts the reproduced signal into a multi-level signal level and a signal level change interval. A demodulation circuit 42 converts the 2-7 code into a 2-7 code depending on the switching interval of the change, and the 2-7 code from the demodulation circuit 42
It has a demodulation circuit 43 that inversely converts (demodulates) the 7 code to obtain a reproduced signal.

The reproduction signal (reproduction information) reproduced by this signal processing circuit 19 is outputted to a recording medium control device 46 as an external device via an interface circuit 45.

As described above, although the signal processing circuit 19 and the recording signal creation circuit 44 include the modulation circuit 40 for 1-7 code and 2-7 code and the demodulation circuit 43, these are not necessarily necessary. , 2 passed through the interface circuit 70
A value signal sequence can be directly modulated or demodulated into a multilevel signal.

This disk device also includes a focusing control circuit 15, a tracking control circuit 16, and
A D/A converter 22 used for exchanging information between the linear motor control circuit 17 and the CPU 23 is provided.

Further, the tracking control circuit 16 includes:
The objective lens 6 is moved in response to a track jump signal supplied from the CPU 23 via the D/A converter 22, and the beam light is moved by one track.

The laser control circuit 14, focusing control circuit 15, tracking control circuit 16, linear motor control circuit 17, motor control circuit 18, signal processing circuit 1
9. The recording signal generation circuit 44 and the like are controlled by the CPU 23 via the bus line 20, and the CPU 23 is configured to perform predetermined operations according to a program stored in the memory 24.

The demodulation circuit 42 of the present invention extracts a multivalued signal from the recording medium 1 as shown in FIG. 2(e) (that is, the adder 3
The reproduced signals obtained from the outputs from 0a and 30b) are 2
As shown in FIG. 3, the signal waveform converter 51 and the signal level switching timing detector 5
2, a multilevel level determination section 53, and a signal synthesis section 54. The signal waveform converter 51 corrects the signal waveform of the supplied reproduced signal to facilitate signal detection and signal processing, and specifically corrects when the maximum amplitude of the reproduced signal fluctuates. It removes noise components with higher frequencies than necessary, or conversely amplifies only frequency components that include signal components.

The signal level switching timing detection section 5
2 detects the switching timing of the signal level of the reproduced signal. The multi-level determining section 53 determines the multi-level level of the reproduced signal modified by the signal waveform converting section 51 in accordance with the detection of the switching timing from the signal level switching timing detecting section 52. It is. The signal synthesis section 54 synthesizes a binary signal sequence in accordance with the judgment result of the multi-level judgment section 53.

Further, the modulation circuit 41 for the demodulation circuit 42 includes information that the binarized signal string has, information that is added to the signal level or amount of change in the signal level, and information that is added to the interval between changes in the signal level. As shown in FIG. 4, it is composed of a modulation signal creation section 61, a signal level switching timing creation section 62, and a multilevel level value determination section 63. There is.

The modulation signal generating section 61 divides the information of the binary signal sequence into information to be included in the signal level or amount of change in signal level, and information to be included in the interval between changes in signal level. be. The signal level switching timing creation section 62 creates a signal level switching timing using the modulation signal from the modulation signal creation section 61. The multilevel level value determining unit 63 determines a signal level designated voltage as a multilevel level value based on the modulation signal from the modulation signal generating unit 61 and the switching timing from the signal level switching timing generating unit 62. It is.

The laser control circuit 14 is operated by a laser drive signal corresponding to the multi-level value from the multi-level level value determining section 63.

A modulation method for converting a binary signal sequence into a multilevel signal by the modulation circuit 42 will be explained using FIG. 2. The maximum possible recording density when recording 2-7 code signals on recording medium 1 is "2" interval (1.5T interval)
On the other hand, the wind margin is often relatively wide because it is limited by how close the pit pitch interval can be physically recorded on the recording medium 1. Therefore, the feature of the embodiment shown in FIG. 2 is that the minimum pit pitch relative to the reference period T is widened by using multilevel recording. In the case of a 2-7 code signal before modulation into a multilevel signal, if the number of consecutive 0's is n (2≦n≦7), then when n≦4; amount of change in quantized signal level 1 Change in level
Switching interval of signal level change
n+3 When n≧5; Amount of change in quantized signal level Change of 2 levels
Convert (modulate) to a multilevel signal so that the switching interval of signal level change is n
do.

That is, in the 2-7 code signal, areas where the intervals between "0s" are wide are left as they are, and where the intervals between "0s" are narrow, the intervals between "0s" are widened using a multilevel signal. Further, the number of levels L at this time is set to three values (L=3) in the embodiment shown in FIG.

For the 2-7 code signal as shown in FIG. 2(a), the number of "0" is checked as shown in FIG. 2(b), and the change in the signal level is quantized according to the above rule. The amount and the switching interval of the signal level change are set ((c) in FIG. 2). In the embodiment shown in FIG. 2, the amount of change in signal level is used as information.

Therefore, the signal level value after the change is as shown in FIG.
It corresponds to the value of the first digit when the cumulative value obtained by sequentially adding the amount of change as shown in (d) of FIG. As a result, the reproduced signal (obtained from the outputs of the adders 30a and 30b) when information is recorded on the recording medium 1 becomes as shown in FIG. 2(e).

An example of the configuration of the modulation circuit 41 for realizing the modulation method described above will be explained with reference to FIG. The modulation signal creation section 61 includes a RAM 110, an address designation counter 111, shift registers 112 and 122, and a counter 1.
13, 114, inverters 115, 119, 121, and gate circuits 116, 117, 118, 120.

[0045] The signal level switching timing creation section 6
2 includes a shift register 122, a gate circuit 123, and a flip-flop circuit 124. The multi-value level value determining section 63 includes an adder 125, a ROM 126 for converting from binary to ternary, and a D/A converter 127.

The key point of the modulation circuit 41 having such a configuration is that the multi-value level value determination unit 63 converts the signal information into a signal level change amount using the adder 125, and the modulation signal creation unit 61 converts the signal information into a signal level change amount using the adder 125. There are two points in which the timing of the signal is changed by stopping the reference clock midway through the transfer of the signal.

First, data of a binary signal string (2-7 code) is stored in the RAM 110. The data is sequentially taken out using shift registers 112 and 122. 2-7
“1” in the code signal string is the Q of the shift register 122
When reaching H, it is determined whether there is a "1" in the subsequent 5 bits, and if there is, it is determined as "01" (the signal level change amount is 1, and the embodiment shown in FIG. 2(e) Then, the signal level addition amount is input as "1" to the adder 125 via the flip-flop circuit 124.

Furthermore, if there is no "1" in the 5 bits, the adder 12 sets it as "10" (signal level addition amount is 2).
5 is input.

In the adder 125, the state before addition is input to terminals B1 and B2. The value after addition is stored in ROM in L base number (ternary number in the case of Fig. 5) corresponding to the level number L.
After being converted via 126, the D/A converter 127
is used to set the recording power.

When “1” in the signal string of the 2-7 code comes to QH of the shift register 122, if there is no “1” in the subsequent 5 bits, the signal level is switched directly to the signal level switching timing. used. On the other hand, if the next "1" comes in the next five bits, data transfer from the RAM 110 is stopped for three clocks to increase the interval until the next "1" arrives.

The counter 114 normally has QA=QB=“
The envelope terminal EN is stuck at “0”.
When it reaches 0”, it starts counting and again QA = QB =
Continue counting until the state reaches "0".

Next, a configuration example of the demodulation circuit 42 shown in FIG. 3 will be explained using FIG. 6. The signal level switching timing detection section 52 includes a timing detection amplifier 130 and an absolute value circuit 131. The multi-value level determination section 53 includes analog switches 132 and 135.
, reference signal generation section 133, level addition value detection circuit 134
, a sample and hold circuit 136, a mono multivibrator 137, and a shift register 138. The signal combining section 54 includes a quantization circuit 139,
ROM140, inverter 141, gate circuit 142,
143, 144, a timing adjustment counter 145, a shift register 146, and a RAM 147.

The major points of the demodulation circuit 42 having such a configuration are that the amount of change in the reproduced signal after quantization is D, the number of levels is L, and the signal information value due to signal level change (at the position of signal level change during modulation) is When the level addition value) is Ad, A
The value of Ad is determined by using the relationship that the value of d=“L+D” is the value of the first digit when expressed in L base.

The shifting of the shift register is temporarily stopped in accordance with the determined value of Ad, and the timing of the signals is matched. That's what it says.

First, the function of the signal level switching timing detection section 52 will be explained. Signal waveform converter 5
1 is input to the inverting terminal 130a of the timing detection amplifier 130, and a signal whose response is slightly delayed is input to the non-inverting terminal 130b. The relationship between the two signal waveforms is as shown in FIG. 7(a). This figure 7
As can be seen from (a), the difference between the two values becomes large at the point where the signal level switches.

When this difference exceeds a certain range, the diode D1 or D2 attached to the timing detection amplifier 130 becomes short-circuited, and the timing detection amplifier 130 becomes short-circuited.
The gain suddenly increases. As a result, the output of the timing detection amplifier 130 becomes almost pulse-like.

Furthermore, by passing the signal through the absolute value circuit 131, a waveform as shown in FIG. 7(b) can be obtained. Using this signal, a mono multivibrator 137 generates a pulse equivalent to one clock of the reference clock. This pulse passes through shift registers 138 and 146 and is stored in RAM1.
It is recorded in 47.

In the meantime, this pulse is transferred to shift register 1.
When the pulse passes through the QB of the shift register 138, the signal level switching amount is detected by the level addition value detection circuit 134 at the timing shown in (b) of FIG.
When passing through C, the sample-and-hold circuit 136 samples and holds the signal before switching for comparison at the time of the next signal level switching at the timing shown in FIG. 8(c).

Note that (a) in FIG. 8 shows the signal waveform converter 51
represents the signal waveform immediately after passing through, and the size of the diagonally lined arrow represents the amount of level change due to signal level switching.

As is clear from FIG. 2, when the signal level amount increases, the amount of increase directly represents the signal information value (level addition value at the signal level change position during modulation) Ad due to the signal level change. When the signal level amount is decreasing, "3-decrease amount" represents the signal information value Ad.

Generalizing this relationship, there is a relationship between the number of levels L and the amount of change in the reproduced signal D as follows: Ad=L+D (however, the value of the first digit of the L number). This calculation is performed in an analog manner by the level addition value detection circuit 134.

Furthermore, the value of the level number L is determined by the reference signal generating section 1.
It is made with 33. The output of the quantization circuit 139 is a binary number, which is stored in the ROM 140 as L (3 in FIG. 6).
It is converted to the value of the first digit of the base number. When the output is "1", the timing adjustment counter 145 stops shifting the shift register 146 by three clocks of the reference clock, and returns the signal to a binary 2-7 code signal.

A specific circuit configuration of the quantization circuit 139 shown in FIG. 6 will be explained using FIG. 9.

The quantization circuit 139 includes a signal detection section 151 that detects the signal from the sample and hold circuit 136, a reference level generation section 152 that generates a plurality of reference levels, and a detection signal from the signal detection section 151 and a reference level generation section. 152
The signal comparison/quantization unit 153 compares the reference levels with a plurality of reference levels and outputs the comparison result as a quantized signal. The signal detection section 151 is an absolute value circuit 15
4 and a comparator 155. The reference level generation section 152 includes a reference level output section 156 consisting of an operational amplifier 156a, a signal level comparison section 157, and a low pass filter 158. The signal comparison/quantization section 153 includes comparators 159 and 160, an inverter circuit 161, and gate circuits 162 and 163.

The signal level comparison section 157 includes the difference circuit 16
4, 165, 166, and an analog switch 167.

The reference signal level generating section 152 uses the signal obtained from the signal detecting section 151 and the reference signal level generating section 1.
52, the value of the reference level is changed by comparing it with the reference level which is the output value.

The amount of deviation between the reference level value set by the reference level output section 156 and the signal value obtained from the signal detection section 151 is fed back to the reference level output section 156 as a difference signal, and is fed back to the reference level value. Ru.

Regarding the change state of the reference level at this time,
This will be explained using FIG. It is assumed that the reference level, which serves as a reference for quantizing the amount of change in the output level of the signal obtained from the signal detection section 151, is now showing a value as shown in FIG. 10(b). When a level change as shown in FIG. 10(a) occurs in the signal obtained from the signal detecting section 151, there is a difference between the amount of change in the signal obtained from the signal detecting section 151 and the reference level value in FIG. 10(c). ), a deviation amount of "ΔL" occurs. The value after passing through the low-pass filter 158 with respect to the amount of change in the value of the deviation amount is fed back to the reference level output section 156 to change the value of the reference level as shown in FIG. 10(d). .

In the case of the demodulation circuit 42 shown in FIG. 6, the voltage generated from the reference signal generation section 133 is always added, so the signal after passing through the sample and hold circuit 136 is always positive. However, in a general demodulation circuit, the amount of level change may change negatively. Therefore, a terminal (polarity indicating signal) is provided to indicate whether the amount of change is positive or negative based on the output of the comparator 155.

An absolute value circuit 154 is provided to detect the absolute value of the amount of change in signal level as a detection signal for feeding back the reference level value obtained from the signal detection section 151.

In the portion corresponding to the reference level output section 156 in FIG. 9, the output voltage of the operational amplifier 156a is divided by resistance to create a reference level, and upper and lower limit level values for quantization are set. The comparator 15 compares the upper and lower limit level values during quantization with the signal from the signal detection unit 151.
9 and 160, and the inverter circuit 161
, gate circuits 162 and 163 perform calculations, and the level value after quantization of the signal from the absolute value circuit 154 is outputted from each output terminal of the signal level comparison section 157 as a quantized signal. The signal level comparator 157 calculates the amount of deviation between each reference level and the signal from the absolute value circuit 154 using a difference circuit 164.
, 165, and 166, and select the desired difference amount using the analog switch 167.

This difference signal is obtained by changing with respect to the signals from the individual absolute value circuits 154, but only relatively slow changes are captured by the low-pass filter 158 and fed back. By adding this obtained difference signal to the operational amplifier 156a of the reference level output section 156, the output voltage of the operational amplifier 156a is changed.

As mentioned above, even if the reproduced signal level from the recording medium locally decreases due to dust or scratches on the substrate surface of the recording medium or locally decreased recording film sensitivity, the level of the reproduced signal from the recording medium decreases. Since the reference level for quantizing the signal also changes along with its value, stable quantization can be achieved and a very high signal reading rate can be ensured.

[0074] In the above embodiment, the reference level generating section that generates the reference level for quantizing the signal level outputs a variable reference level by applying feedback to the signal level obtained from the recording medium. However, the present invention is not limited to this, and the amplitude of the signal obtained from the recording medium may be made variable by comparing the reference level with the signal level obtained from the recording medium.

The specific circuit configuration of the quantization circuit 139 of this embodiment will be explained using FIG. 11.

That is, the quantization circuit 139 includes the signal detection section 1 that detects the signal from the sample and hold circuit 136.
71. Reference level generation unit 1 that generates a plurality of reference levels
72. Signal comparison/quantization unit 1 that compares the detection signal from the signal detection unit 171 with a plurality of reference levels from the reference level generation unit 172 and outputs the comparison result as a quantized signal.
73, voltage conversion circuit 17 that converts the signal from the signal comparison/quantization section 173 into a voltage value and outputs it to the signal detection section 171
It is composed of 4.

The signal detection section 171 includes an absolute value circuit 175,
It is composed of a comparator 176, a signal gain adjustment circuit 177, and a photocoupler 178. The signal comparison/quantization section 173 includes an A/D converter 179 and a ROM 18.
Consists of 0.

Regarding the change state of the reference level at this time,
This will be explained using FIG. 12. The reference level that serves as a reference for quantizing the amount of change in the output level of the signal obtained from the signal detection section 171 is currently fixed at a value as shown in FIG. 12(b). Signal gain adjustment circuit 17 in signal detection section 171
When a certain specific value is given to the gain of 7, when a level change as shown in FIG. 12(a) occurs in the signal obtained from the signal detection section 171, the change in the signal obtained from the signal detection section 171 A deviation amount of "ΔL" as shown in FIG. 12(c) occurs between the amount and the reference level value.

Feedback is applied to the signal detecting section 171 with respect to the amount of change in the value of the deviation amount, and the gain of the signal gain adjustment circuit 177 is changed to adjust the amount of change in the signal from the signal detecting section 171 as shown in (d) in FIG. ).

In this case, unlike FIG. 9, in FIG. 11, the quantization of the multilevel signal level and the comparison between the reference level and the reproduced signal are performed digitally. A signal supplied from the absolute value circuit 175 via the signal gain adjustment circuit 177 is converted into a digital signal by the A/D converter 179 and output to the ROM 180. A reference level value for quantizing a multilevel signal is stored in this ROM 180, and when a signal converted to a digital signal from the A/D converter 179 is supplied, it automatically responds to the level amount. The multilevel signal level value after quantization is output as a quantized signal, and a signal for controlling the gain of the signal from the absolute value circuit 175 is also output.

An analog gain control signal is generated by the voltage conversion circuit 174 in response to this latter digital signal. This voltage conversion circuit 174 is an addition circuit that weights the output terminal of the ROM 180. The output signal obtained from this adjusts the gain of the signal gain adjustment circuit 177 via a photocoupler 178.

[0082]

[Effects of the Invention] As detailed above, according to the present invention,
It is possible to provide a reproducing device that can reduce quantization errors when reproducing signals from a recording medium and can stably reproduce information.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the circuit configuration of a disk device in an embodiment of the present invention.

FIG. 2 is a diagram for explaining a modulation method of the modulation circuit of FIG. 1 for modulating a binary signal sequence into a multilevel signal.

FIG. 3 is a block diagram showing the circuit configuration of the demodulation circuit in FIG. 1;

FIG. 4 is a block diagram showing the circuit configuration of the modulation circuit in FIG. 1.

FIG. 5 is a circuit diagram showing a specific configuration example of the modulation circuit in FIG. 1;

FIG. 6 is a circuit diagram showing a specific configuration example of the demodulation circuit in FIG. 1;

FIG. 7 is a diagram for explaining the detection principle of the signal level switching timing detection section of the demodulation circuit in FIG. 1;

FIG. 8 is a diagram for explaining the detection principle of the multi-value level determination section of the demodulation circuit in FIG. 1;

FIG. 9 is a block diagram showing the circuit configuration of the quantization circuit in FIG. 1.

FIG. 10 is a diagram showing a state in which a quantized signal is changed by the quantization circuit of FIG. 1;

FIG. 11 is a block diagram showing the circuit configuration of the quantization circuit in FIG. 1.

FIG. 12 is a diagram showing how the amplitude of a signal obtained from a recording medium is changed by the quantization circuit of FIG. 1;

[Description of symbols] 1... Recording medium, 9... Semiconductor laser oscillator, 19... Signal processing circuit, 40, 41... Modulation circuit, 42, 43... Demodulation circuit, 44... Recording signal creation circuit, 51... Signal waveform converter, 5
2...Signal level switching timing detection unit, 53...Multilevel level determination unit, 54...Signal synthesis unit, 61...Modulation signal generation unit, 62...Timing generation unit, 63...Multilevel level value determination unit, 136...Sample hold Circuit, 139...Quantization circuit, 151...Signal detection section, 152...Reference level generation section, 1
53...Signal comparison/quantization section, 154...Absolute value circuit, 15
5...Comparator, 156...Reference level output section, 157
...Analog switch.

Claims (4)

[Claims] 1. Detection means for detecting a signal according to information on a recording medium; reference value generation means for generating a reference value;
a first processing means that compares the detection signal from the detection means with the reference value from the reference value generation means and quantizes the signal according to the comparison result; and quantization from the first processing means. a conversion means for converting the detection signal of the detection means into a binary signal sequence according to the result; a calculation means for calculating the difference between the detection signal from the detection means and the reference value from the reference value generation means; A playback device comprising: second processing means for changing the reference value generated by the reference value generation means in accordance with the difference calculated by the calculation means. 2. A detection means for detecting a signal corresponding to information on a recording medium, a reference value generation means for generating a plurality of reference values, and a detection signal from the detection means and a plurality of reference value generation means for generating a plurality of reference values. a first processing means that compares the signal with a reference value and quantizes the signal according to the comparison result, and binarizes the detection signal of the detection means according to the quantization result from the first processing means. a conversion means for converting into a signal sequence; a calculation means for calculating the difference between the detection signal from the detection means and a reference value closest to the detection signal in the reference value generation means; and a calculation means for calculating by the calculation means. a second processing means for changing the value of the reference value generated by the reference value generation means in accordance with the difference generated by the reference value generation means. 3. Detection means for detecting a signal according to information on a recording medium; reference value generation means for generating a reference value;
an amplification means for amplifying the detection signal from the detection means; a first one for comparing the signal amplified by the amplification means with a reference value from the reference value generation means and quantizing the signal according to the comparison result; processing means, conversion means for converting the detection signal of the detection means into a binary signal sequence according to the quantization result from the first processing means, and the detection signal from the detection means and the reference value generation. The present invention is characterized by comprising a calculation means for calculating a difference from a reference value from the means, and a second processing means for changing the content of amplification by the amplification means according to the difference calculated by the calculation means. playback device. 4. A detection means for detecting a signal corresponding to information on a recording medium, a reference value generation means for generating a plurality of reference values, an amplification means for amplifying a detection signal from the detection means, and amplification means for amplifying the detection signal from the detection means. a first processing means for comparing the signal amplified by the means with a plurality of reference values from the reference value generating means and quantizing the signal according to the comparison result; conversion means for converting the detection signal of the detection means into a binary signal sequence according to the conversion result; and a reference value of the detection signal from the detection means and the closest value to the detection signal in the reference value generation means. a calculation means for calculating the difference between the
A reproducing device comprising: second processing means for changing the content of amplification by the amplification means according to the difference calculated by the calculation means.