JPH0423U - - Google Patents

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Publication number
JPH0423U
JPH0423U JP3973690U JP3973690U JPH0423U JP H0423 U JPH0423 U JP H0423U JP 3973690 U JP3973690 U JP 3973690U JP 3973690 U JP3973690 U JP 3973690U JP H0423 U JPH0423 U JP H0423U
Authority
JP
Japan
Prior art keywords
voltage value
circuit
clock signal
low voltage
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3973690U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3973690U priority Critical patent/JPH0423U/ja
Publication of JPH0423U publication Critical patent/JPH0423U/ja
Pending legal-status Critical Current

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  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示す要部回路図で
あり、第２図は前記回路図の所定場所の電圧波形
図である。 図中、１は入力端子、２，６，７はインバータ
半導体素子、３，４は抵抗、５はパターン回路、
８は出力端子である。 FIG. 1 is a main circuit diagram showing an embodiment of the present invention, and FIG. 2 is a voltage waveform diagram at a predetermined location in the circuit diagram. In the figure, 1 is an input terminal, 2, 6, 7 are inverter semiconductor elements, 3, 4 are resistors, 5 is a pattern circuit,
8 is an output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] クロツク信号電圧値を低電圧値に下げる回路を
プリント基板のパターン回路の一端に接続し、該
低電圧値のクロツク信号を給電し、該パターン回
路の他端にて受電し、該低電圧値クロツク信号を
元のクロツク信号電圧値に復元する回路を配設す
ることを特徴とする電磁波の輻射低減回路。 A circuit that lowers the clock signal voltage value to a low voltage value is connected to one end of the pattern circuit of the printed circuit board, the low voltage value clock signal is supplied with power, the other end of the pattern circuit receives power, and the low voltage value clock signal is supplied with power. 1. An electromagnetic wave radiation reduction circuit comprising a circuit for restoring a signal to its original clock signal voltage value.
JP3973690U 1990-04-13 1990-04-13 Pending JPH0423U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3973690U JPH0423U (en) 1990-04-13 1990-04-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3973690U JPH0423U (en) 1990-04-13 1990-04-13

Publications (1)

Publication Number Publication Date
JPH0423U true JPH0423U (en) 1992-01-06

Family

ID=31548907

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3973690U Pending JPH0423U (en) 1990-04-13 1990-04-13

Country Status (1)

Country Link
JP (1) JPH0423U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54144095A (en) * 1978-04-28 1979-11-09 Kazuko Nagata Colored lamp cover

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54144095A (en) * 1978-04-28 1979-11-09 Kazuko Nagata Colored lamp cover

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