JPH04239130A - Plasma processor and processing method - Google Patents

Plasma processor and processing method

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Publication number
JPH04239130A
JPH04239130A JP1265291A JP1265291A JPH04239130A JP H04239130 A JPH04239130 A JP H04239130A JP 1265291 A JP1265291 A JP 1265291A JP 1265291 A JP1265291 A JP 1265291A JP H04239130 A JPH04239130 A JP H04239130A
Authority
JP
Japan
Prior art keywords
plasma
reaction vessel
electrode
reactive
vessel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1265291A
Other languages
Japanese (ja)
Inventor
Emi Murakawa
惠美 村川
Ryuji Ariyoshi
竜司 有吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Steel Corp
Original Assignee
Kawasaki Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp filed Critical Kawasaki Steel Corp
Priority to JP1265291A priority Critical patent/JPH04239130A/en
Publication of JPH04239130A publication Critical patent/JPH04239130A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To provide the title processor and processing method capable of avoiding the production of the pollutants such as fine projections on a semiconductor substrate surface during the plasma processing step. CONSTITUTION:A reactive gas containing O2 is fed to a reactive container 1 with a discharge electrode from a gas leading-in port 1a and then discharged from an exhaust port 1b. A semiconductor substrate 4 to be plasma-processed is arranged on an RF electrode 2 in the reactive vessel 1 and the space between the RF electrode 2 and an opposite electrode 3 is impressed with high-frequency voltage 5 while a reactive gas is fed to the reactive vessel 1 so as to be discharged for producing plasma. On the other hand, the reactive vessel 1 is composed of Al, while an Al2O3 film 6 is formed on the inner wall surface by anode electrode oxidation step besides, forming the other Al2O3 films 7, 8 on the opposite surface of the discharge electrodes 2, 3. Accordingly, extremely flat etching surface can be formed. Furthermore, when the plasma is produced using fluorocarbon as the reactive gas, the vessel inner wall and the electrode surfaces are coated with polymer film to be a barrier layer.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、半導体基体のような試
料にプラズマエッチングやプラズマCVD のようなプ
ラズマ処理を施すためのプラズマ処理装置及びプラズマ
処理方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing apparatus and a plasma processing method for subjecting a sample such as a semiconductor substrate to plasma processing such as plasma etching or plasma CVD.

【0002】0002

【従来の技術】半導体装置の高集積化が進につれ、種々
の素子が形成されている半導体基体上に多層配線を形成
し、素子の占有効率を向上させる技術の開発が強く要請
されている。多層配線を高い信頼性を以て形成する際最
も重要な事項は層間絶縁膜を平坦化しその上に形成され
る配線の断面積が下地段差部に対して低下するのを防ぐ
ことである。
2. Description of the Related Art As semiconductor devices become more highly integrated, there is a strong demand for the development of a technique for forming multilayer wiring on a semiconductor substrate on which various elements are formed to improve the efficiency of occupying the elements. The most important thing when forming multilayer wiring with high reliability is to planarize the interlayer insulating film and prevent the cross-sectional area of the wiring formed thereon from decreasing with respect to the underlying stepped portion.

【0003】層間絶縁膜を平坦化する方法として SO
G (Spin OnGlass)法、バイアススパッ
タ CVD装置を用いる方法、レジストエッチバック法
等がある。このうち、レジストエッチバック法は、リソ
グラフィプロセスで通常用いられるレジストコータを利
用できるため安価な処理方法であり、制御性も良好であ
り、しかも平坦化度も極めて良好である。このレジスト
エッチバック法は、SiO2を主成分とする層間絶縁膜
上にレジスト膜をスピンコートし、ベーキングした後反
応性プラズマエッチングして基体表面を平坦化する方法
である。このプラズマエッチングでは、フルオロカーボ
ン系反応ガスに酸素を加え、SiO2のエッチング速度
とレジストのエッチング速度とが同一になるように設定
して基体表面を平坦にエッチングしている。
[0003] SO is a method for planarizing an interlayer insulating film.
Examples include a spin-on-glass (G) method, a method using a bias sputtering CVD device, and a resist etch-back method. Among these, the resist etch-back method is an inexpensive processing method because it can utilize a resist coater commonly used in a lithography process, has good controllability, and has an extremely good degree of planarization. This resist etch-back method is a method in which a resist film is spin-coated on an interlayer insulating film mainly composed of SiO2, baked, and then subjected to reactive plasma etching to planarize the substrate surface. In this plasma etching, oxygen is added to the fluorocarbon-based reactive gas, and the etching rate of SiO2 and the etching rate of the resist are set to be the same, so that the surface of the substrate is etched flat.

【0004】さらに、プラズマ処理方法は、プラズマエ
ッチングだけでなく種々の半導体装置の装置工程に使用
されており、例えばプラズマCVD法等にも利用されて
おり、半導体装置の製造においてその活用が強く要請さ
れている。
Furthermore, plasma processing methods are used not only for plasma etching but also for various equipment processes of semiconductor devices, such as plasma CVD methods, and there is a strong demand for its utilization in the manufacture of semiconductor devices. has been done.

【0005】[0005]

【発明が解決しようとする課題】上述したように、プラ
ズマエッチング装置は種々の半導体装置の製造工程に活
用できるが、エッチング処理後に半導体基体表面上に0
.2 μm 程度の微小な柱状突起物が形成される場合
がある。このような微小突起物が形成されてしまうと、
半導体基体表面を平坦化できず、却って半導体装置の生
産性を著しく低下させてしまう。このため、レジストエ
ッチバック法は安価なプロセスであるにもかかわらず量
産工場で広く使用されていないのが実情である。この課
題を解決する方法とし、酸素の添加量を低くしたり、或
は酸素の添加量を段階的に変化させる方法があるが、処
理に長時間かかるばかりでなく、十分な平坦化が得られ
ないのが実情である。尚、この突起物の発生はレジスト
エッチバックだけでなく、多結晶シリコンのエッチング
処理において発生している。
[Problems to be Solved by the Invention] As mentioned above, plasma etching equipment can be used in the manufacturing process of various semiconductor devices;
.. Minute columnar protrusions of about 2 μm may be formed. Once such microprotrusions are formed,
The surface of the semiconductor substrate cannot be flattened, and on the contrary, the productivity of semiconductor devices is significantly reduced. For this reason, the reality is that the resist etch-back method is not widely used in mass production factories, even though it is an inexpensive process. There are methods to solve this problem, such as lowering the amount of oxygen added or changing the amount of oxygen added in stages, but these methods not only take a long time to process, but also do not provide sufficient flattening. The reality is that there is not. Note that this protrusion occurs not only in resist etchback but also in polycrystalline silicon etching processing.

【0006】従って、本発明の目的は、プラズマ処理中
に半導体基体表面に微小な突起物が発生するのを防止で
き適切なプラズマ処理を行なうことができるプラズマ処
理装置及びプラズマ処理方法を提供することにある。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a plasma processing apparatus and a plasma processing method that can prevent minute protrusions from being generated on the surface of a semiconductor substrate during plasma processing and can perform appropriate plasma processing. It is in.

【0007】[0007]

【課題を解決するための手段】本発明によるプラズマ処
理装置は、反応容器と、反応容器内に配置した放電電極
とを具え、反応容器に反応ガスを供給してプラズマを生
成し、生成したプラズマを処理すべき試料に照射してプ
ラズマ処理を行なうプラズマ処理装置において、前記反
応容器の内壁表面と放電電極表面との少なくとも一部に
プラズマに対する不活性化処理を施したことを特徴とす
るものである。さらに、本発明によるプラズマ処理方法
は、反応容器、及びこの反応容器内に配置した放電電極
とを具え、反応容器に反応ガスを供給してプラズマを生
成し、生成したプラズマを処理すべき試料に照射してプ
ラズマ処理を行なうに際し、試料にプラズマを照射する
前に、反応ガスを反応容器に供給し、この反応ガスをプ
ラズマ重合させてポリマ化し、前記反応容器の内壁表面
と放電電極表面の少なくとも一部にポリマ皮膜を形成し
、その後前記反応ガスを用いて試料にプラズマ処理を行
うことを特徴とするものである。
[Means for Solving the Problems] A plasma processing apparatus according to the present invention includes a reaction vessel and a discharge electrode disposed in the reaction vessel, supplies a reaction gas to the reaction vessel to generate plasma, and generates plasma. A plasma processing apparatus that performs plasma processing by irradiating a sample to be processed with plasma, characterized in that at least a portion of the inner wall surface of the reaction vessel and the surface of the discharge electrode is subjected to plasma inactivation treatment. be. Furthermore, the plasma processing method according to the present invention includes a reaction vessel and a discharge electrode disposed in the reaction vessel, supplies a reaction gas to the reaction vessel to generate plasma, and directs the generated plasma to the sample to be treated. When performing plasma treatment by irradiating a sample, before irradiating the sample with plasma, a reaction gas is supplied to a reaction vessel, and this reaction gas is plasma-polymerized to form a polymer. This method is characterized in that a polymer film is formed on a portion of the sample, and then the sample is subjected to plasma treatment using the reaction gas.

【0008】[0008]

【作用】本発明者が半導体基体上に発生する柱状突起物
の発生原因を解明するため種々の実験及び解析を行なっ
た結果、プラズマ処理装置に用いられている放電電極又
は反応容器壁部の金属材料が汚染物質として作用するこ
とが判明した。すなわち、酸素とフルオロカーボンガス
とを反応ガスとして反応性プラズマエッチングを行ない
、半導体基体表面に形成された柱状突起物の成分分析を
行なったところ、この柱状突起物の主成分はポリマ化し
たフルオロカーボンであり、さらにオージェ分析法によ
り元素分析を行なった結果、C, F元素の他にアルミ
ニウム元素が多量に検出された。このアルミニウムは放
電電極の構成材料であるから、放電電極材料が汚染物質
として作用することが考えられる。また、酸素プラズマ
エッチングのコンデショニングにおいて、電極表面及び
反応容器の内壁表面に予めフルオロカーボンポリマ皮膜
を形成しておくと、柱状突起物が全く発生しないことも
判明した。一方、放電電極や反応容器壁部の金属材料が
露出していると、この露出部分から多数の2次電子が放
出され局所的にプラズマが高密度化し、その部分の金属
が多量にスパッタされ、その金属原子が処理されるべき
半導体基体上に付着し、付着した金属原子が触媒となっ
てポリマ化が局所的に進行したものと考えられる。特に
、アルミニウムやニッケルはプラズマ重合の重合促進剤
として使用されていることからも、アルミニウム原子が
付着した部分において局所的ポリマ化が促進し、プラズ
マ重合により多数の柱状突起物が形成されたものと考え
られる。
[Operation] As a result of various experiments and analyzes carried out by the present inventor in order to elucidate the cause of columnar protrusions occurring on semiconductor substrates, it was found that the metal of the discharge electrode or the wall of the reaction vessel used in the plasma processing equipment The material was found to act as a contaminant. That is, when reactive plasma etching was performed using oxygen and fluorocarbon gas as reactive gases, and the composition of columnar protrusions formed on the surface of a semiconductor substrate was analyzed, it was found that the main component of these columnar protrusions was polymerized fluorocarbon. Furthermore, as a result of elemental analysis using Auger analysis, a large amount of aluminum element was detected in addition to C and F elements. Since this aluminum is a constituent material of the discharge electrode, it is possible that the discharge electrode material acts as a contaminant. It has also been found that, in conditioning oxygen plasma etching, if a fluorocarbon polymer film is previously formed on the electrode surface and the inner wall surface of the reaction vessel, no columnar protrusions are generated. On the other hand, if the metal material of the discharge electrode or the wall of the reaction vessel is exposed, a large number of secondary electrons are emitted from this exposed part, locally increasing the plasma density, and a large amount of metal in that part is sputtered. It is thought that the metal atoms adhered to the semiconductor substrate to be processed, and the adhered metal atoms acted as a catalyst, causing local polymerization to proceed. In particular, since aluminum and nickel are used as polymerization accelerators for plasma polymerization, local polymerization is promoted in areas where aluminum atoms are attached, and many columnar protrusions are formed due to plasma polymerization. Conceivable.

【0009】上述した解析結果より、本発明では放電電
極の表面と反応容器の内壁表面との少なくとも一部にプ
ラズマに対するバリヤ層として作用する高密度、高稠密
性の被膜を形成して金属材料表面にプラズマに対する不
活性化処理を行なう。このような皮膜は、プラズマによ
って若干スパッタされることもあるが、スパッタされる
量は微量であるため、ほとんど問題にならない。この不
活性化皮膜として、フルオロカーボン系のポリマ皮膜や
弗素樹脂系ポリマ皮膜のような不活性なポリマ皮膜、或
は Al2O3のような金属酸化膜を用いることができ
る。
From the above-mentioned analysis results, in the present invention, a high-density, highly dense coating that acts as a barrier layer against plasma is formed on at least a portion of the surface of the discharge electrode and the inner wall surface of the reaction vessel, thereby improving the surface of the metal material. Then, perform plasma inactivation treatment. Although such a film may be slightly sputtered by plasma, the amount sputtered is so small that it hardly causes any problem. As this inactivation film, an inert polymer film such as a fluorocarbon polymer film or a fluororesin polymer film, or a metal oxide film such as Al2O3 can be used.

【実施例】図1は本発明によるプラズマ処理装置の一例
の構成を示す線図的断面図である。本例では、反応性イ
オンエッチング(RIE) を行なう平行板型プラズマ
エッチング装置を例にして説明する。反応容器1はガス
導入口a 及びガス排出口1bを有し、ガス導入口から
酸素を含む反応ガスを反応容器1内に供給する。反応容
器1内にはRF電極2と対向電極3を配置し、RF電極
2上にプラズマ処理されるべき半導体基体4を配置する
。RF電極2及び対向電極3を高周波高圧電源5に接続
する。そして電極2と3との間に高周波高電圧を印加す
ると共に反応ガスを供給し放電を発生させてプラズマを
生成する。本例では、反応容器1をアルミニウムで構成
し、その内壁表面を陽極酸化処理により酸化アルミニウ
ム皮膜6を形成する。また、放電電極2及び3もアルミ
ニウムで構成し、これら電極の互いに対向する表面に酸
化アルミニウム皮膜7及び8をそれぞれ形成する。従っ
て、反応容器及び放電電極のプラズマにさらされる大部
分がプラズマに対して不活性なアルミニウム酸化膜で皮
膜されることになる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagrammatic sectional view showing the structure of an example of a plasma processing apparatus according to the present invention. In this example, a parallel plate plasma etching apparatus that performs reactive ion etching (RIE) will be explained. The reaction vessel 1 has a gas inlet a and a gas outlet 1b, and a reaction gas containing oxygen is supplied into the reaction vessel 1 from the gas inlet. An RF electrode 2 and a counter electrode 3 are arranged in the reaction vessel 1, and a semiconductor substrate 4 to be subjected to plasma processing is arranged on the RF electrode 2. The RF electrode 2 and the counter electrode 3 are connected to a high frequency high voltage power source 5. Then, a high frequency and high voltage is applied between the electrodes 2 and 3, and a reactive gas is supplied to generate discharge and generate plasma. In this example, the reaction vessel 1 is made of aluminum, and an aluminum oxide film 6 is formed on the inner wall surface of the reaction vessel 1 by anodizing. Further, the discharge electrodes 2 and 3 are also made of aluminum, and aluminum oxide films 7 and 8 are formed on the mutually opposing surfaces of these electrodes, respectively. Therefore, most of the reaction vessel and discharge electrode exposed to plasma are coated with an aluminum oxide film that is inert to plasma.

【0010】図2は本発明によるプラズマ処理装置の変
形例を示す。本例では、流量調整系10により、酸素ガ
ス、反応ガス及びHe 稀釈ガスの供給量を調整し、反
応容器11内に酸素を含む反応ガスを供給する。そして
、対向電極12には多数の孔を形成し、RF電極13上
にプラズマ処理される半導体基体14を配置する。本例
でも、反応容器の内壁表面及び電極の対向する表面にそ
れぞれアルミニウム酸化膜15及び16を形成する。ま
た、反応容器の排出孔に真空ポンプ17を接続して反応
容器内の圧力を適切に調整する。
FIG. 2 shows a modification of the plasma processing apparatus according to the present invention. In this example, the flow rate adjustment system 10 adjusts the supply amounts of oxygen gas, reaction gas, and He dilution gas, and supplies the reaction gas containing oxygen into the reaction vessel 11. Then, a large number of holes are formed in the counter electrode 12, and a semiconductor substrate 14 to be subjected to plasma treatment is placed on the RF electrode 13. In this example as well, aluminum oxide films 15 and 16 are formed on the inner wall surface of the reaction vessel and the opposing surfaces of the electrodes, respectively. Further, a vacuum pump 17 is connected to the discharge hole of the reaction vessel to appropriately adjust the pressure inside the reaction vessel.

【0011】次に、実験結果について説明する。本実験
では、図2に示すRIE 装置を用いた。ガス導入口1
aから酸素を含むフルオロカーボン系ガスを導入する。 トータルの流量は 100sccmとし、酸素とフルオ
ロカーボン系ガスの比は3:10とした。また、ガス圧
は1.75Torrとした。高圧電源5の出力パワーは
630Wとした。この条件で、半導体基体にレジスエッ
チングバック処理を施したところ、半導体基体表面には
柱状突起物が全く発生せず、極めて平坦なエッチング表
面を形成することができた。また、電極2及び3の互い
に対向する表面に厚さ 500μm のポリテトラフロ
ロエチレン皮膜を形成した場合にも、上述した陽極酸化
処理した場合と同様に柱状突起物が全く形成せず極めて
良好なエッチング表面を形成することができた。一方、
反応容器の内壁表面及び電極表面に不活性化処理を施さ
ない場合、前述したようにポリマ化したフルオロカーボ
ンの無数の柱状突起物が形成された。
Next, experimental results will be explained. In this experiment, the RIE apparatus shown in FIG. 2 was used. Gas inlet 1
A fluorocarbon gas containing oxygen is introduced from a. The total flow rate was 100 sccm, and the ratio of oxygen to fluorocarbon gas was 3:10. Further, the gas pressure was set to 1.75 Torr. The output power of the high voltage power supply 5 was 630W. When the semiconductor substrate was subjected to resist etching back treatment under these conditions, no columnar protrusions were generated on the surface of the semiconductor substrate, and an extremely flat etched surface could be formed. Furthermore, even when a polytetrafluoroethylene film with a thickness of 500 μm is formed on the opposing surfaces of electrodes 2 and 3, no columnar protrusions are formed at all, resulting in extremely good etching, as in the case of the anodic oxidation treatment described above. I was able to form a surface. on the other hand,
When the inner wall surface of the reaction vessel and the electrode surface were not inactivated, countless columnar protrusions of polymerized fluorocarbon were formed as described above.

【0012】次に、本発明によるプラズマ処理方法につ
いて説明する。フルオロカーボンを反応ガスとして反応
容器に供給してプラズマを生成すると、フルオロカーボ
ンはプラズマ重合してポリマー化する。このポリマー化
したフルオロカーボンは電極表面及び反応容器の内壁表
面にポリマ皮膜として被着する。一方、前述したように
、ポリマー化したフルオロカーボンが電極表面及び反応
容器表面に被着すると、フルオロカーボン皮膜がバリヤ
層となり電極や反応容器の壁部がプラズマによってスパ
ッタされるのが阻止される。尚、このフルオロカーボン
皮膜はプラズマに対してバリヤ層として作用するが、プ
ラズマが作用すると極めて遅い速度で気化する。しかし
、気化しても、プラズマ処理される試料に対して作用す
る反応材料(エッチング剤又は堆積材料)と同一材料で
あるから、プラズマ処理中に試料に対して何んら悪影響
を及ぼすことはない。このため、本発明では、試料に対
するプラズマ処理に先立って、試料に対して作用する反
応ガスとほぼ同一組成の反応ガスを反応容器に供給し、
この反応ガスをプラズム重合させてポリマ化し、反応容
器の内壁表面又は電極表面にポリマ皮膜を形成する。そ
して、このポリマ皮膜を形成した後同一の反応ガスを用
いて試料にプラズマ処理を行なう。このようにしてポリ
マ皮膜を形成すれば、このポリマ皮膜がプラズマに対し
てバリヤ層となり、電極表面や反応容器表面に予めバリ
ヤ皮膜を設ける必要がなくなる。
Next, a plasma processing method according to the present invention will be explained. When a fluorocarbon is supplied as a reaction gas to a reaction vessel to generate plasma, the fluorocarbon undergoes plasma polymerization and becomes a polymer. This polymerized fluorocarbon is deposited as a polymer film on the electrode surface and the inner wall surface of the reaction vessel. On the other hand, as described above, when polymerized fluorocarbon is deposited on the electrode surface and the reaction vessel surface, the fluorocarbon film becomes a barrier layer and prevents the electrode and the reaction vessel wall from being sputtered by plasma. Although this fluorocarbon film acts as a barrier layer against plasma, it vaporizes at an extremely slow rate when plasma acts on it. However, even if it evaporates, it will not have any adverse effects on the sample during plasma processing because the material is the same as the reactive material (etching agent or deposited material) that acts on the sample being plasma processed. . Therefore, in the present invention, prior to the plasma treatment on the sample, a reaction gas having almost the same composition as the reaction gas acting on the sample is supplied to the reaction vessel,
This reaction gas is polymerized by plasma polymerization to form a polymer film on the inner wall surface of the reaction vessel or the electrode surface. After forming this polymer film, the sample is subjected to plasma treatment using the same reaction gas. If the polymer film is formed in this way, the polymer film becomes a barrier layer against plasma, and there is no need to previously provide a barrier film on the electrode surface or the reaction vessel surface.

【0013】本発明は上述した実施例だけに限定されず
種々の変形が可能である。例えば、上述した実施例では
プラズマエッチングを例にして説明したが、例えばプラ
ズマCVD のような他の種々のプラズマ処理にも適用
することができる。
The present invention is not limited to the above-described embodiments, but can be modified in various ways. For example, although the above-described embodiments have been described using plasma etching as an example, the present invention can also be applied to various other plasma treatments such as plasma CVD.

【発明の効果】以上説明したように本発明によれば、汚
染物質の発生源となる放電電極及び反応容器の内壁表面
にプラズマに対するバリヤ層を形成しているから、汚染
物質の発生を防止でき、良好なプラズマ処理を行なうこ
とができる。特に、局所的なプラズマ重合の発生を防止
できるので、極めて平坦なエッチング表面を形成するこ
とができる。
As explained above, according to the present invention, a barrier layer against plasma is formed on the discharge electrode and the inner wall surface of the reaction vessel, which are the sources of contaminants, so generation of contaminants can be prevented. , good plasma processing can be performed. In particular, since local plasma polymerization can be prevented, an extremely flat etched surface can be formed.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】図1は本発明によるプラズマ処理装置の一例の
構成を示す線図的断面図、
FIG. 1 is a diagrammatic cross-sectional view showing the configuration of an example of a plasma processing apparatus according to the present invention;

【図2】図2は本発明によるプラズマエッチング装置の
構成を示す線図的断面図である。
FIG. 2 is a diagrammatic cross-sectional view showing the configuration of a plasma etching apparatus according to the present invention.

【符号の説明】[Explanation of symbols]

1  反応容器 2  RF電極 3  対向電極 4  試料 5  高周波高圧電源 6, 7, 8   アルミニウム酸化膜。 1 Reaction container 2 RF electrode 3 Counter electrode 4 Sample 5 High frequency high voltage power supply 6, 7, 8 Aluminum oxide film.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  反応容器と、反応容器内に配置した放
電電極とを具え、反応容器に反応ガスを供給してプラズ
マを生成し、生成したプラズマを処理すべき試料に照射
してプラズマ処理を行なうプラズマ処理装置において、
前記反応容器の内壁表面と放電電極表面との少なくとも
一部にプラズマに対する不活性化処理を施したことを特
徴とするプラズマ処理装置。
Claim 1: A method comprising a reaction vessel and a discharge electrode disposed within the reaction vessel, supplying a reaction gas to the reaction vessel to generate plasma, and irradiating a sample to be treated with the generated plasma to perform plasma treatment. In the plasma processing equipment that performs
A plasma processing apparatus characterized in that at least a portion of the inner wall surface of the reaction vessel and the surface of the discharge electrode are subjected to plasma inactivation treatment.
【請求項2】  反応容器、及びこの反応容器内に配置
した放電電極を具え、反応容器に反応ガスを供給してプ
ラズマを生成し、生成したプラズマを処理すべき試料に
照射してプラズマ処理を行なうに際し、試料にプラズマ
を照射する前に、反応ガスを反応容器に供給し、この反
応ガスをプラズマ重合させてポリマ化し、前記反応容器
の内壁表面と放電電極表面の少なくとも一部にポリマ皮
膜を形成し、その後前記反応ガスを用いて試料にプラズ
マ処理を行うことを特徴とするプラズマ処理方法。
2. A method comprising a reaction vessel and a discharge electrode disposed within the reaction vessel, supplying a reaction gas to the reaction vessel to generate plasma, and irradiating the generated plasma onto a sample to be treated to perform plasma treatment. In this process, before irradiating the sample with plasma, a reaction gas is supplied to a reaction vessel, and the reaction gas is plasma-polymerized to form a polymer, thereby forming a polymer film on at least a portion of the inner wall surface of the reaction vessel and the surface of the discharge electrode. 1. A plasma processing method characterized in that the sample is plasma-treated using the reaction gas.
JP1265291A 1991-01-11 1991-01-11 Plasma processor and processing method Pending JPH04239130A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1265291A JPH04239130A (en) 1991-01-11 1991-01-11 Plasma processor and processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1265291A JPH04239130A (en) 1991-01-11 1991-01-11 Plasma processor and processing method

Publications (1)

Publication Number Publication Date
JPH04239130A true JPH04239130A (en) 1992-08-27

Family

ID=11811304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1265291A Pending JPH04239130A (en) 1991-01-11 1991-01-11 Plasma processor and processing method

Country Status (1)

Country Link
JP (1) JPH04239130A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07176524A (en) * 1993-11-05 1995-07-14 Tokyo Electron Ltd Material for vacuum processing device and manufacture
US5447595A (en) * 1992-02-20 1995-09-05 Matsushita Electronics Corporation Electrodes for plasma etching apparatus and plasma etching apparatus using the same
JP2000091327A (en) * 1998-09-17 2000-03-31 Hitachi Ltd Method and device for cleaning plasma treating device
KR20000021090A (en) * 1998-09-25 2000-04-15 구자홍 Device of surface treatment using plasma with equipment for preventing from piling up polymer
US6663748B2 (en) 2001-04-17 2003-12-16 Nec Lcd Technologies, Ltd. Method of forming a thin film
KR100469142B1 (en) * 1997-12-10 2005-06-21 주식회사 하이닉스반도체 Metal contamination prevention method of semiconductor device
KR100749950B1 (en) * 2003-05-09 2007-08-16 에이에스엠엘 네델란즈 비.브이. A method of preparing components, prepared component, lithographic apparatus and device manufacturing method
US7264850B1 (en) 1992-12-28 2007-09-04 Semiconductor Energy Laboratory Co., Ltd. Process for treating a substrate with a plasma

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5447595A (en) * 1992-02-20 1995-09-05 Matsushita Electronics Corporation Electrodes for plasma etching apparatus and plasma etching apparatus using the same
US7264850B1 (en) 1992-12-28 2007-09-04 Semiconductor Energy Laboratory Co., Ltd. Process for treating a substrate with a plasma
JPH07176524A (en) * 1993-11-05 1995-07-14 Tokyo Electron Ltd Material for vacuum processing device and manufacture
KR100469142B1 (en) * 1997-12-10 2005-06-21 주식회사 하이닉스반도체 Metal contamination prevention method of semiconductor device
JP2000091327A (en) * 1998-09-17 2000-03-31 Hitachi Ltd Method and device for cleaning plasma treating device
KR20000021090A (en) * 1998-09-25 2000-04-15 구자홍 Device of surface treatment using plasma with equipment for preventing from piling up polymer
US6663748B2 (en) 2001-04-17 2003-12-16 Nec Lcd Technologies, Ltd. Method of forming a thin film
KR100749950B1 (en) * 2003-05-09 2007-08-16 에이에스엠엘 네델란즈 비.브이. A method of preparing components, prepared component, lithographic apparatus and device manufacturing method

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