JPH0423335U - - Google Patents

Info

Publication number
JPH0423335U
JPH0423335U JP6382890U JP6382890U JPH0423335U JP H0423335 U JPH0423335 U JP H0423335U JP 6382890 U JP6382890 U JP 6382890U JP 6382890 U JP6382890 U JP 6382890U JP H0423335 U JPH0423335 U JP H0423335U
Authority
JP
Japan
Prior art keywords
light
light receiving
receiving circuit
receiving
forced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6382890U
Other languages
Japanese (ja)
Other versions
JPH0753311Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990063828U priority Critical patent/JPH0753311Y2/en
Publication of JPH0423335U publication Critical patent/JPH0423335U/ja
Application granted granted Critical
Publication of JPH0753311Y2 publication Critical patent/JPH0753311Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Electronic Switches (AREA)
  • Optical Radar Systems And Details Thereof (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図ないし第5図は本考案の第1実施例を示
し、第1図はブロツク図、第2図は全体のフロー
チヤート、第3図はチエツクルーチンのフローチ
ヤート、第4図は要部の電圧波形図、第5図は判
定手段のヒステリシス特性を示す特性図である。
第6図は本考案の第2実施例を示す第4図相当図
、第7図は同第3実施例を示す要部のブロツク図
、第8図は同第4実施例を示す要部のブロツク図
である。 図面中、2,43は可変抵抗器(検出感度調節
手段)、4は検出用の投光素子、5はチエツク用
の投光素子、7,44はアナログスイツチ(バイ
パス手段)、8は受光素子、9,40は受光回路
、12は判定手段、13は制御回路(異常検出手
段)である。
1 to 5 show a first embodiment of the present invention, FIG. 1 is a block diagram, FIG. 2 is an overall flowchart, FIG. 3 is a flowchart of a check routine, and FIG. 4 is a main part. FIG. 5 is a characteristic diagram showing the hysteresis characteristic of the determination means.
Fig. 6 is a diagram corresponding to Fig. 4 showing the second embodiment of the present invention, Fig. 7 is a block diagram of the main part showing the third embodiment of the invention, and Fig. 8 is a diagram of the main part showing the fourth embodiment of the invention. It is a block diagram. In the drawing, 2 and 43 are variable resistors (detection sensitivity adjustment means), 4 is a light emitting element for detection, 5 is a light emitting element for checking, 7 and 44 are analog switches (bypass means), and 8 is a light receiving element. , 9 and 40 are light receiving circuits, 12 is a determination means, and 13 is a control circuit (abnormality detection means).

Claims (1)

【実用新案登録請求の範囲】 検出用の投光素子およびこの投光素子から投射
された光を受けるように設けられる受光素子と、 この受光素子からの光電変換信号を増幅する受
光回路と、 前記受光回路からの受光信号に基づき前記受光
素子への入光状態にあるか非入光状態にあるかを
判断して被検出物体の検出動作をおこなう判定手
段と、 前記投光素子の発光強度又は前記受光回路にお
ける増幅率を調整する検出感度調節手段と、 点灯されることにより前記被検出物体の有無に
関わらず前記受光素子に光を入射させる強制入光
動作を行うチエツク用の投光素子と、 前記強制入光動作の実行時に前記検出感度調節
手段を無効化することにより前記チエツク用の投
光素子を大なる発光強度で点灯させ又は前記受光
回路を大なる増幅率に設定するバイパス手段と、 前記強制入光動作の実行により前記受光回路が
前記受光素子への入光状態になるか否かを判定し
て異常を検出する異常検出手段とを具備してなる
光電スイツチ。
[Claims for Utility Model Registration] A light projecting element for detection, a light receiving element provided to receive light projected from the light projecting element, a light receiving circuit for amplifying a photoelectric conversion signal from the light receiving element, and the above. a determining means for detecting an object by determining whether the light-receiving element is in a light-entering state or not in a light-receiving state based on a light-receiving signal from a light-receiving circuit; a detection sensitivity adjustment means for adjusting an amplification factor in the light receiving circuit; and a check light projecting element that performs a forced light entry operation to cause light to enter the light receiving element regardless of the presence or absence of the detected object by being turned on. , bypass means for lighting the check light emitting element at a high light emission intensity or setting the light receiving circuit at a high amplification factor by disabling the detection sensitivity adjustment means when executing the forced light entry operation; . Abnormality detection means for detecting an abnormality by determining whether or not the light receiving circuit enters a state in which light enters the light receiving element by executing the forced light entry operation.
JP1990063828U 1990-06-15 1990-06-15 Photoelectric switch Expired - Fee Related JPH0753311Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990063828U JPH0753311Y2 (en) 1990-06-15 1990-06-15 Photoelectric switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990063828U JPH0753311Y2 (en) 1990-06-15 1990-06-15 Photoelectric switch

Publications (2)

Publication Number Publication Date
JPH0423335U true JPH0423335U (en) 1992-02-26
JPH0753311Y2 JPH0753311Y2 (en) 1995-12-06

Family

ID=31594223

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990063828U Expired - Fee Related JPH0753311Y2 (en) 1990-06-15 1990-06-15 Photoelectric switch

Country Status (1)

Country Link
JP (1) JPH0753311Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52122876A (en) * 1976-04-09 1977-10-15 Tokyo Shibaura Electric Co Photoelectric relay with fault detection device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52122876A (en) * 1976-04-09 1977-10-15 Tokyo Shibaura Electric Co Photoelectric relay with fault detection device

Also Published As

Publication number Publication date
JPH0753311Y2 (en) 1995-12-06

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