JPH042191U - - Google Patents
Info
- Publication number
- JPH042191U JPH042191U JP1990042803U JP4280390U JPH042191U JP H042191 U JPH042191 U JP H042191U JP 1990042803 U JP1990042803 U JP 1990042803U JP 4280390 U JP4280390 U JP 4280390U JP H042191 U JPH042191 U JP H042191U
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- signal
- converter
- interlace
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 229940028444 muse Drugs 0.000 claims description 5
- GMVPRGQOIOIIMI-DWKJAMRDSA-N prostaglandin E1 Chemical compound CCCCC[C@H](O)\C=C\[C@H]1[C@H](O)CC(=O)[C@@H]1CCCCCCC(O)=O GMVPRGQOIOIIMI-DWKJAMRDSA-N 0.000 claims description 5
- 239000011159 matrix material Substances 0.000 claims description 3
- 230000010365 information processing Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Transforming Electric Information Into Light Information (AREA)
- Television Systems (AREA)
- Color Television Systems (AREA)
Description
第１図は本考案の一実施例を示すＭＵＳＥダウ
ンコンバータの映像信号処理回路のブロツク図、
第２図は従来のＭＵＳＥダウンコンバータの映像
信号処理回路のブロツク図である。
１はアナログ／デイジタル変換器、２はデイエ
ンフアシス回路、３は時間軸変換回路、４，６，
７はタイミング発生器、５はＰＬＬ回路、８は輝
度信号の内挿回路、９は色差信号を出力する色信
号の内挿回路、１０は逆マトリクス回路、１１は
インターレース変換回路、１２，１３はデイジタ
ル／アナログ変換器、８ａは輝度信号の内挿とイ
ンターレース変換回路、９ａは色信号の内挿とイ
ンターレース変換回路である。
FIG. 1 is a block diagram of a video signal processing circuit of a MUSE down converter showing an embodiment of the present invention.
FIG. 2 is a block diagram of a video signal processing circuit of a conventional MUSE down converter. 1 is an analog/digital converter, 2 is a de-emphasis circuit, 3 is a time axis conversion circuit, 4, 6,
7 is a timing generator, 5 is a PLL circuit, 8 is a luminance signal interpolation circuit, 9 is a color signal interpolation circuit that outputs a color difference signal, 10 is an inverse matrix circuit, 11 is an interlace conversion circuit, 12 and 13 are A digital/analog converter, 8a is a luminance signal interpolation and interlace conversion circuit, and 9a is a chrominance signal interpolation and interlace conversion circuit.
Claims (1)
、同変換出力をデイエンフアシス回路とＭＵＳＥ
用第１のタイミング発生器とＰＬＬ回路とに接続
し、同ＰＬＬ回路出力を同第１のタイミング発生
器とバイスキヤン用第２のタイミング発生器とＮ
ＴＳＣ用第３のタイミング発生器とに接続し、同
第１のタイミング発生器出力と前記デイエンフア
シス回路出力とを時間軸変換回路に接続し、同時
間軸変換回路出力と前記第２のタイミング発生器
出力とをそれぞれ輝度信号の内挿回路と色信号の
内挿回路とに接続し、同輝度信号の内挿回路出力
のＹ信号と同色信号の内挿回路出力の色差信号Ｒ
−Ｙ，Ｂ−Ｙとを逆マトリクス回路に接続し、同
逆マトリクス回路出力のＲ，Ｇ，Ｂ信号をそれぞ
れ分岐してインターレース変換回路と第１のＤ／
Ａ変換器とに接続し、前記第３のタイミング発生
器出力によりインターレース変換した同インター
レース変換回路出力のＲ，Ｇ，Ｂ信号を第２のＤ
／Ａ変換器に接続し、同第２のＤ／Ａ変換器と前
記第１のＤ／Ａ変換器とによりそれぞれＮＴＳＣ
とバイスキヤンに対応した複数系統のＲ，Ｇ，Ｂ
信号を出力してなるＭＵＳＥダウンコンバータ。 (2) ＭＵＳＥベースバンド信号を入力し、映像
情報処理回路出力よりノンインターレースＲ，Ｇ
，Ｂ信号を出力を出力する。一方同Ｒ，Ｇ，Ｂ信
号からインターレース変換器によりＮＴＳＣのＲ
，Ｇ，Ｂ信号を出力するようにしてなるＭＵＳＥ
ダウンコンバータ。[Claims for Utility Model Registration] (1) A/D converting the MUSE baseband signal and transmitting the converted output to the de-emphasis circuit and the MUSE
N
A third timing generator for TSC is connected to the third timing generator for the TSC, an output of the first timing generator and the output of the de-emphasis circuit are connected to a time axis conversion circuit, and an output of the first timing generator and the output of the de-emphasis circuit are connected to a time axis conversion circuit. The outputs are connected to a luminance signal interpolation circuit and a chrominance signal interpolation circuit, respectively, and the Y signal of the output of the interpolation circuit of the same luminance signal and the color difference signal R of the output of the interpolation circuit of the same color signal are connected.
-Y, B-Y are connected to an inverse matrix circuit, and the R, G, and B signals output from the inverse matrix circuit are branched, respectively, to the interlace conversion circuit and the first D/
A converter, and the R, G, B signals output from the interlace conversion circuit, which have been interlace converted by the output of the third timing generator, are connected to the second D converter.
/A converter, and the second D/A converter and the first D/A converter each perform NTSC
and multiple systems of R, G, and B that support bi-scan.
A MUSE down converter that outputs a signal. (2) Input the MUSE baseband signal and output non-interlace R, G from the video information processing circuit output.
, B signal is output. On the other hand, from the same R, G, and B signals, an interlace converter converts the NTSC R
, G, B signal output
down converter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990042803U JPH042191U (en) | 1990-04-20 | 1990-04-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990042803U JPH042191U (en) | 1990-04-20 | 1990-04-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH042191U true JPH042191U (en) | 1992-01-09 |
Family
ID=31554662
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990042803U Pending JPH042191U (en) | 1990-04-20 | 1990-04-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH042191U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5598405A (en) * | 1979-01-20 | 1980-07-26 | Matsushita Electric Works Ltd | Illuminator |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH036183A (en) * | 1989-06-01 | 1991-01-11 | Mitsubishi Electric Corp | Television system transducer |
-
1990
- 1990-04-20 JP JP1990042803U patent/JPH042191U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH036183A (en) * | 1989-06-01 | 1991-01-11 | Mitsubishi Electric Corp | Television system transducer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5598405A (en) * | 1979-01-20 | 1980-07-26 | Matsushita Electric Works Ltd | Illuminator |
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