JPH04216634A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To control an irregularity in the film thickness of a mask for ion implantation use for implanting ions in an Si substrate. CONSTITUTION:A gate electrode 1 is formed and thereafter, an SiO2/SiN two- layer film 7 for ion implantation mask use is formed and after a CVD oxide film is deposited thereon, sidewalls 6 are formed by an RIE method and an HF cleaning method and after that, an ion implantation is performed via the film 7. The control of the film thickness of the film 7 is easy and moreover, as the sidewalls 6 are removed and an annealing is performed, a stress is not applied to an Si substrate 2 at the time of the annealing. Moreover, the knock-on amount of oxygen atoms is reduced. Accordingly, a diffused layer with no defect can be formed.

Description

[Detailed description of the invention]

0001

[Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to a method for manufacturing a semiconductor device.
The present invention relates to an LDD process for suppressing crystal defects induced in a semiconductor substrate during ion implantation in the manufacturing process of a MOS device having an open drain structure.

0002

[Prior art and problems to be solved by the invention] 1.0
Usually, LD
A device is created using the D process. That LDD
In the process, first, HTO (High
On a Si substrate 63 having a gate electrode 62 covered with a (temperature oxide) film 61, a sidewall 64 is formed by RIE alone [see FIG. 12], and a pre-ion implantation oxide film 65 is formed [see FIG. 13]. Arsenic ions (or BF2 ions) were ion-implanted to form sources and drains, and an interlayer insulating film was formed, followed by N2 annealing. However, if sidewalls are formed by RIE alone, damage will be introduced into the Si substrate, and in the later oxide film formation process, OSF (Oxidation-induced stack) will be formed using the damaged layer as a core.
Defects such as king faults are formed. Furthermore, if the sidewall is formed by RIE alone, the shape of the sidewall becomes steep, and the stress applied to the Si substrate becomes large. Therefore, during the heat treatment process after forming the source/drain, stress from the sidewall edges is applied to the Si substrate, inducing crystal defects.

In order to solve these problems, processes shown in FIGS. 9 and 10 have been proposed. This involves forming an HTO film 61 on the gate electrode 62 as shown in FIG.
The sidewall 51 is formed by a combination of RIE and HF clean, and an oxide film is left on the silicon. That is, in this method, a taper 51a made of the remaining SiO2 film is attached to the end of the sidewall without introducing damage to the Si substrate 63 [Fig.
0], the stress applied to the Si substrate was alleviated. As a result, the growth of crystal defects (the black portion indicated by arrow D) occurring in the taper 51a at the end of the sidewall as shown in FIG. 8 is suppressed, and the junction leakage characteristics can be stabilized. However, problems also arise in the above process.

That is, basically, when ion implantation is performed through an oxide film such as a SiO2 film, oxygen constituting the oxide film is implanted (knocked on) into the Si substrate, causing defects such as dislocation loops in the As implanted layer. occurs. In FIG. 8, a region where a defect occurs due to implanted oxygen is represented by a white circle indicated by an arrow N. In particular, the dependence of defect density on oxide film thickness as shown in FIG. 7 has been observed, and the range of oxide film thickness for obtaining low defect density is narrow, 300 to 500 Å. However, in the LDD process shown in FIGS. 9 and 10, SiO2
Since RIE and HF clean are used to form the residual film 51a, it is difficult to control the thickness of the SiO2 residual film 51a on the Si substrate to a thickness of 300 to 500 Å without variation, which makes the process unstable. Become.

[0005]

[Means and effects for solving the problems] The present invention forms an SiO2 film having a predetermined thickness by thermal oxidation on the entire surface of a Si substrate having a gate, and furthermore, the SiO2 film is
A SiN film having a predetermined thickness is laminated on the O2 film, and then an oxide film for forming sidewalls is laminated on the SiN film by CVD method, and then this is formed into a SiN film by reactive ion etching method and HF clean. A sidewall is formed only on the gate sidewall, and ion implantation is performed using the two-layer film of the thermally oxidized SiO2 film and SiN film as a mask for ion implantation, and then reactive ion etching and HF are performed again. After removing the sidewalls by cleaning, and subsequently removing only the SiN film, an interlayer insulating film is laminated on the entire surface of the Si substrate including the gate via the thermally oxidized SiO2 film, and heat treatment is applied to form the interlayer insulating film. This is a method of manufacturing a semiconductor device, which comprises flattening a film.

That is, the present invention uses an S having a gate with sidewalls as a mask for ion implantation.
A two-layer film is formed by sequentially laminating a thermal oxide film and a SiN film on an i-substrate from the substrate side.

Conventionally, A was used as a mask for ion implantation.
To prevent the defect density from increasing during S ion implantation, S
Even if the iO2 film thickness is controlled within a good film thickness of 300 to 500 Å, since the film thickness is controlled by RIE (reactive ion etching) and HF clean, there will inevitably be variations in the SiO2 film thickness. This is why this occurs. Due to this variation, the Si film thickness was outside the range of the above-mentioned favorable film thickness.
For example, as shown in FIG. 7, when the O2 film portion is removed to a thickness of 300 Å or less, the defect density increases. This is because, as described above, when As ions are implanted through the SiO2 film, a large amount of oxygen atoms are implanted (knocked on) into the Si substrate, inducing crystal defects. Note that the observation in FIG. 7 was obtained when As ions were implanted at an acceleration energy of 80 Kev. Further, the dose amount was 5×10 15 cm −2 .

[0008] Therefore, the present inventors focused on a SiN film, which has a larger Si-N dissociation energy than Si-O dissociation energy, as a mask for ion implantation, and combined this film with a SiO2 film. We conducted extensive research to see if the above problems could be resolved by combining these two methods. As a result, the present inventors have found that the defect density can be reduced by forming the ion implantation mask into a two-layer film in which the SiN film and the SiO2 film have a predetermined thickness ratio [see FIG. 6].

However, if the SiN film is directly attached to the Si substrate, micro defects may be induced on the surface of the Si substrate. Preferably, it is formed as follows.

The two-layer film in this invention has a film thickness d equal to the sum of the SiN film thickness d1 and the SiO2 film thickness d2 (
d=d1+d2) and preferably has a film thickness d of 200 to 400 Å. Furthermore, taking the case where As ions are implanted as an example, the dependence of the defect density in the As ion implanted layer on d1/d2 is as shown in FIG.

In other words, if a two-layer film is formed with a thickness d such that d1/d2 is 1 or more, the defect density can be reduced regardless of the magnitude of the energy for ion implantation. I can do it. Furthermore, there is no problem in forming an ion-implanted layer having a depth corresponding to the above-mentioned implantation energy.

[0012] Furthermore, the relationship between the film thickness d1 of the SiN film and the film thickness d2 of SiO2 is such that d (=d1+d2) is 200 to 400.
A suitable combination can be selected under the following conditions. And preferably d1≧d2 and d2>50Å
Good. The point is that d is 200 to 400 Å when ions are implanted.
However, it is necessary to appropriately select d1 and d2 so that an extremely shallow ion implantation layer that does not correspond to the ion implantation energy and, conversely, an extremely deep ion implantation layer are not formed.

SiO2 of the two-layer film in this invention
The film is obtained by thermally oxidizing the surface of a Si substrate. Therefore, the film thickness can be controlled much more easily than by RIE or HF clean, and can be formed without variation. The film quality is also good.

On the other hand, the SiN film is also formed using a known method in the same manner as the thermally oxidized SiO2 film. This SiN film can also be easily controlled in film thickness, can be formed without variation, and has good film quality. This SiN film then plays the role of a stopper film when the sidewalls of the gate are formed by RIE and HF clean in a later process. Of course, the thickness of the SiN film does not change due to RIE and HF clean.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below based on embodiments shown in the drawings. Note that this invention is not limited by this.

First, as shown in FIG. 1, a layer of 0.01μ is deposited on the entire surface of the Si substrate 2 having the gate 1 by thermal oxidation.
A SiO2 film 3 having a thickness of m is formed, and the S
A SiN film 4 having a thickness of 0.01 μm is laminated on the iO2 film, and then an HTO film (SiO2 film) 5 for sidewall formation is laminated on the SiN film by CVD method.
See Figure 2]. Next, the HTO film 5 is etched using a reactive ion etching method and an HF clean until the SiN film 4 is exposed, and a sidewall 6 is formed only on the gate sidewall [see FIG. 3], and the thermally oxidized SiO2 film 3 and the SiN film are Using the two-layer film 7 of 4 as a mask for ion implantation, arsenic ions are implanted to form an ion implantation layer (not shown), and then reactive ion etching and HF clean are performed again to form the ion implantation layer (FIG. 4).
As shown in Figure 5, the sidewall 6 was removed, and then only the SiN film 4 was removed using phosphoric acid boiling [see Figure 5].
Thermal oxidation SiO2 is applied to the entire surface of the Si substrate 2 including the rear gate 1.
An interlayer insulating film such as an NSG or BPSG film is laminated via the film 3, and the interlayer insulating film is planarized by N2 annealing heat treatment. Thereafter, contact holes, wiring portions, etc. are formed using a known method to create a MOS device.

As described above, in this embodiment, conventional SiO2
When As ions were implanted through the film, a large amount of oxygen atoms were knocked into the Si substrate, inducing crystal defects. Therefore, the amount of nitrogen atoms implanted into the Si substrate is absolutely small, and the synergistic effect of the SiN film and the SiO2 film can prevent crystal defects from being induced. That is, in the above process,
It is easy to control the film thickness of the mask before injection, and no variations occur. Also, since the sidewalls are removed before annealing, stress is reduced during N2 annealing.
It will not be added to the i-substrate, and defects will occur, making it difficult.

Note that in this example, As implanted ions were used.
Although the method using ions is shown, BF2 ions and the like are also applicable.

[0019]

[Effects of the Invention] As described above, according to this invention, MOS
In the device manufacturing process, after forming the gate electrode, a two-layer film of SiO2/SiN is formed as a mask for ion implantation, and after depositing a CVD oxide film, sidewalls are formed on the gate electrode by RIE and HF clean. Si
Since ion implantation is performed through the O2/SiN two-layer film, and then the SiN is removed and annealing is performed, a defect-free diffusion layer can be formed.

[Brief explanation of the drawing]

FIG. 1 is a manufacturing process explanatory diagram showing the first step of the manufacturing process in an embodiment of the present invention.

FIG. 2 is a manufacturing process explanatory diagram showing the second step of the manufacturing process in the above embodiment.

FIG. 3 is a manufacturing process explanatory diagram showing the third step of the manufacturing process in the above embodiment.

FIG. 4 is a manufacturing process explanatory diagram showing the fourth step of the manufacturing process in the above embodiment.

FIG. 5 is a manufacturing process explanatory diagram showing the fifth step of the manufacturing process in the above embodiment.

FIG. 6 is a characteristic diagram showing the dependence of the defect density in the As ion-implanted layer in the above example on the SiN/SiO2 film thickness ratio.

FIG. 7 is a characteristic diagram showing the dependence of defect density in a conventional As ion implantation layer on the SiO2 film thickness as an implantation mask.

FIG. 8 is a configuration explanatory diagram showing defects generated in the As ion-implanted layer due to knock-on oxygen.

FIG. 9 is a manufacturing process explanatory diagram showing the first step of an example of a conventional method.

FIG. 10 is a manufacturing process explanatory diagram showing the second step of an example of a conventional method.

FIG. 11 is a manufacturing process explanatory diagram showing the first step of another example of the conventional method.

FIG. 12 is a manufacturing process explanatory diagram showing the second step of another example of the conventional method.

FIG. 13 is a manufacturing process explanatory diagram showing the third step of another example of the conventional method.

[Explanation of symbols]

1 Gate electrode 2　Si substrate 3 Thermal oxide film (SiO2 film) 4 SiN film 5 HTO film (CVD oxide film) 6 Side wall 7 Mask for As ion implantation

Claims (1)

[Claims] Claim 1: Over the entire surface of a Si substrate having a gate,
A SiO2 film having a predetermined thickness is formed by a thermal oxidation method, and then a SiO2 film having a predetermined thickness is formed on the SiO2 film.
A N film is laminated, and then an oxide film for sidewall formation is laminated on the SiN film by CVD, and then this is etched by reactive ion etching and HF clean until the SiN film is exposed, leaving only the gate sidewalls. ion implantation was performed using the two-layer film of the thermally oxidized SiO2 film and SiN film as a mask for ion implantation, and the sidewall was removed again by reactive ion etching and HF clean. After removing only the SiN film, an interlayer insulating film is laminated on the entire surface of the Si substrate including the gate via the thermally oxidized SiO2 film, and the interlayer insulating film is flattened by heat treatment. manufacturing method.