JPH04196179A - Photoelectric conversion device - Google Patents

Abstract

PURPOSE:To realize a device providing a long length and diffused thin film on a substrate and having a large light absorbing coefficient by making the light irradiating plane parallel with the electric field direction formed by P-type or N-type impurity region of a photoelectric conversion device. CONSTITUTION:A mask 4 is formed on a silicon semiconductor 3 having a semi-amorphous or semi-crystal structure and boron is added to a P-type impurity region 5. Moreover, a mask 6 of photoresist is formed and an N-type impurity region 7 is formed by adding phosphorus. An interval between these N-type and P-type impurity regions is set shorter than the diffusion distance of electron hole generated by the reexcitation in a semiconductor. After annealing these regions, an insulator 8, an electrode window 9 and a lead 10 are formed. Thereby, a photoelectric conversion device having a longer diffused area and a large light absorption coefficient can be obtained.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a photoelectric conversion device in which a P-type region serving as ten electrodes and an N-type region serving as one electrode are selectively provided on the surface side of a semiconductor provided on a substrate.

[Conventional technology]

Conventionally, for photoelectric conversion devices, solar cells or solar cells in which a PN or PIN junction is formed on a silicon substrate or an insulating substrate using a single crystal silicon semiconductor, a polycrystal silicon semiconductor, or an amorphous silicon semiconductor, or known. However, this PN or PIN junction has ten or one electrode on the front and back surfaces of a semiconductor layer stacked on a single crystal silicon substrate or an insulating substrate, and the bonding surface is on the main surface of the semiconductor layer or substrate. They were simply arranged so that they were substantially parallel and a large amount of light was irradiated onto this joint surface. These conventional photoelectric conversion devices have a bonding surface parallel to the main surface of the semiconductor layer or semiconductor substrate, so the direction of the electric field generated inside the semiconductor due to the PN or PIN junction provided in the semiconductor and the light irradiation surface are The light irradiation intensity is not uniform in the direction in which the electric field is applied, and the electrons and
It created a hole and could not be taken out. In addition, single crystal substrates have many drawbacks, such as being extremely easily cracked and expensive, difficult to process, and unable to integrate photoelectric conversion devices and arrange a plurality of them in series or parallel. In addition, in the case of a photoelectric conversion device using an amorphous semiconductor, carriers generated by light irradiation cannot be effectively extracted to the outside because the semiconductor material itself has a short diffusion length. There was a problem. On the other hand, photoelectric conversion devices using single-crystalline semiconductors or polycrystalline semiconductors have problems in terms of manufacturing time and manufacturing costs because the semiconductor layer itself has a small light absorption coefficient, so the thickness of the semiconductor layer itself must be increased. .

[Structure of the invention]

The present invention provides a photoelectric conversion device having selectively P-type or N-type impurity regions in the same semiconductor film on a substrate, and the present invention relates to a photoelectric conversion device having a P-type or N-type impurity region selectively formed in the same semiconductor film on a substrate. There is a photoelectric conversion device that is characterized by its parallel surfaces. Furthermore, since this semiconductor film is composed of a semi-amorphous or semi-crystalline semiconductor, it has a long diffusion length that cannot be obtained with an amorphous semiconductor, and a semiconductor film that has a large light absorption coefficient that cannot be obtained with a single crystal or polycrystalline semiconductor. This makes it possible to create photoelectric conversion devices that can reduce the thickness of the semiconductor film and have a long diffusion length. In the photoelectric conversion device having the above configuration, the carriers generated in the photoelectric conversion region between the P-type diffusion region and the N-type diffusion region can be efficiently extracted to the outside by using the long diffusion length of the semiconductor layer. I can do it. Furthermore, by forming a P-type region and an N-type region in the depth direction of the semiconductor from the light-irradiated surface of the same semiconductor film, the electric field between the P-type region and the N-type region is reduced. Since the light intensity remains constant, it is possible to improve photoelectric conversion efficiency. The mechanism of the semi-amorphous or semi-crystalline semiconductor used in the present invention will be briefly described. The semi-amorphous or semi-crystalline semiconductor film of the present invention can be obtained by performing a thermal crystallization treatment after film formation by an LPCVD method, a sputtering method, a PCVD method, etc., and the explanation will be given below by taking the sputtering method as an example. That is, in the sputtering method, when a single crystal silicon semiconductor is used as the target layer 1 and sputtered with a mixed gas of hydrogen and argon, heavy argon atoms are sputtered (impact).
As a result, atomic silicon also separates from the target and flies onto the substrate that has the formation surface, but at the same time, clusters of tens to hundreds of thousands of atoms separate from the target and fly onto the formation surface. I will do it. During this flight, hydrogen bonds with the dangling bonds of silicon around the outer periphery of this cluster, forming a relatively highly ordered region on the formation surface. That is, the surface on which the film is formed is a mixture of highly ordered clusters having 5i-H bonds around them and pure amorphous silicon. When this is heat-treated in a non-oxidizing gas at 450°C to 700°C, the 5i-H bonds around the outer periphery of the cluster react with other S do 11 bonds, forming 5i-3j
Make a bond. However, at the same time that these bonds are pulled together, the highly ordered clusters tend to transition to a more highly ordered state, that is, crystallization. However, between adjacent clusters, 5i-3j that are connected to each other pulls each other between each cluster. As a result, the crystal has lattice distortion, and the crystal peak in laser Raman is measured on the lower wavenumber side than 520 cm' of a single crystal. Furthermore, since the 5i-3j bonds between the clusters anchor (connect) each cluster, the energy bands in each cluster can be electrically connected to each other via this anchoring point. Therefore, it is fundamentally different from polycrystalline silicon in which grain boundaries act as carrier barriers, and carrier mobility of 10 to 200 cm2/V See can be obtained. In other words, as in the present invention, based on the definition (semi-amorphous or semi-crystalline), it can be expected that electrically there are virtually no crystal grain boundaries, although the semi-amorphous or semi-crystalline material has good quality in appearance. Of course, the annealing temperature is 45 in the case of silicon semiconductors.
Instead of medium temperature annealing of 0°C to 700°C,
When crystallization is performed with crystal growth at 00°C or higher, oxygen and the like in the film precipitate at grain boundaries due to this crystal growth, creating a barrier. This is a material with the same crystals and grain boundaries as a single crystal. Furthermore, if the degree of anchoring between clusters in this semiconductor is increased, carrier mobility will be further increased. For this purpose, the amount of oxygen in this film must be reduced to 7 x 10"
cm-3, preferably I x 1019 cm-3 or less, not only can crystallization be performed at a temperature lower than 600°C, but also high carrier mobility can be obtained. The present invention will be described below with reference to Examples. Example 1j Figure 1 is a vertical cross-sectional view showing the manufacturing process of the present invention. In Figure 1 (A), the substrate (1) can be a conductive or insulating substrate. The requirements are that it is inexpensive and has mechanical strength and heat resistance for the subsequent film forming process.For this reason, in this example, earthenware, ceramic, and
mainly used glass substrates. In Figure 1, a silicon oxide film (2) is deposited as a blocking layer on a glass such as AN glass or Pyrex glass that can withstand heat treatment at approximately 600°C using a magnetron RF (radio frequency) sputtering method. It was made thick. Process conditions are 100% oxygen atmosphere, film formation temperature 150°
C1 output was 400 to 800 W1 pressure was 0.5 Pa. The film formation rate using quartz or single crystal silicon as a target was 30 to 100 persons/min. Furthermore, a silicon film (3) was formed on this by LPCVD, sputtering, or plasma CVD. When formed by a reduced pressure vapor phase method, the temperature is 100 to
200°C lower 450-550°C1 Example is 530°C
Disilane (Si2HG) or trisilane (SiJ8
) was supplied to a CVD apparatus to form a film. The pressure inside the reactor is 3
The pressure was set at 0 to 300 Pa. The film forming rate was 50 to 250 people/min. When performing sputtering, the back pressure before sputtering is IX 10
-'Pa or less, target single crystal silicon,
The experiment was carried out in an atmosphere containing 20 to 80% hydrogen in argon. For example, 20% argon and 8096% hydrogen were used. The film forming temperature was 150° C., the frequency was 13.56 MHz, and the sputtering power was 400 to 800 W. The pressure was 0.5 Pa. When a silicon film is manufactured by plasma CVD, the temperature is, for example, 300° C., and monosilane (SiH4) or disilane (Si□H6) is used. PCV these
It was introduced into apparatus D, and a film was formed by applying high frequency power of 13.56 MHz. The coatings formed by these methods are free from oxygen or 7X
10"cm-' or less, preferably I x 10'
Preferably, the concentration is 9 cm −3 or less. This is because when the silicon film is crystallized within such a range, the degree of crystallization can be promoted. For example, the impurity concentration in SIMS (secondary ion mass spectrometry) is 8 x 10"cF" for oxygen and 3 for carbon.
x 10"cm-3, and hydrogen is 4 x 10"cm
-'', and when compared as -9 = silicon 4
μm1 For example, after manufacturing to a thickness of 1 μm, 450 to 700
Medium temperature heat treatment was carried out in a non-oxide atmosphere at a temperature of 12 to 70 hours at a temperature of °C. For example, in a nitrogen or hydrogen atmosphere
The temperature was kept at 0°C. Since an amorphous silicon oxide film is formed on the substrate surface below this silicon film, no specific nuclei are present in the silicon film during this heat treatment, and the entire silicon film is uniformly annealed. That is, when the film is formed, it has an amorphous structure, and hydrogen is simply mixed therein. By this annealing, the silicon film changes from an amorphous structure to a highly ordered state, and a part of the silicon film exhibits a crystalline state. In particular, during silicon film formation, regions with relatively high order tend to crystallize and become crystalline. However, since the silicon existing between these regions forms a bond with each other, the silicon elements attract each other. When measured by laser Raman spectroscopy as a crystal, peak 5 of single crystal silicon is observed.
A peak shifted to the lower frequency side than 22 cF' is observed. The apparent particle size above is calculated from the half-width, 5
0 to 500 microcrystals, but in reality there are many highly crystalline regions that have a cluster structure, and each cluster is a semi-amorphous region in which silicon is bonded (anchored) to each other. It was possible to form a structural film. As a result, this coating has virtually no grain boundaries (
It can be said that there is no GB). Since carriers can easily move between each cluster through the anchored locations, the carrier mobility is higher than in polycrystalline silicon where so-called GB is clearly present. That is, Hall mobility (μh) = 10 to 200 cm2/Vse
c, electron mobility (μe) = 15 to 300 cm2/Vs
ec is obtained. Similarly, the carrier diffusion length can be obtained from several μm to more than ten μm, which is equivalent to or longer than that of a polycrystalline semiconductor. On the other hand, instead of annealing at medium temperature as described above,
When the film is made polycrystalline by high-temperature annealing at a temperature of 1200°C, impurities in the film segregate due to solid phase growth from the nuclei, and impurities such as oxygen, carbon, and nitrogen increase in GB, resulting in crystallization. Although the mobility inside is high, it creates a barrier at the GB and inhibits the movement of carriers there. And the result is 10cm+2/Vsec or more.”
The reality is that it is difficult to obtain a mobility of 2. That is, in the embodiments of the present invention, as described above, a silicon semiconductor (
3) is used. Next, in FIG. 1(B), a photoresist mask (4) is formed using a photomask (■), and boron is added to the P-type impurity region (5) at I x 10" cF2.
was added by ion implantation at a dose of . Next, as shown in Figure 6(C), a photoresist mask (6
) was formed using a photomask ■. Then, for the N-type impurity region (7), phosphorus was added at I x 1015 cm-
It was added in an amount of 2 by ion implantation. The distance between the P-type impurity region and the N-type impurity region -11 is narrow (2 to 20 μm, especially 5 to 7 μm), which is shorter than the diffusion distance of electron/hole carriers generated by re-excitation in the semiconductor. 174 to 1/2 was preferable. Next, heat annealing was performed again at 600° C. for 10 to 50 hours to activate the P-type and N-type impurity regions. Thermal annealing is shown in Figure 1 ( A) and (C) were performed twice.However, the annealing shown in Fig. 1(A) may be omitted depending on the desired characteristics, and both may be combined with the annealing shown in Fig. 1(C) to shorten the manufacturing time. Next, as shown in FIG. 1(D), a silicon oxide film was formed on the insulator (8) by the above-mentioned sputtering method.The silicon oxide film was formed using the LPCVD method and the photo-CVD method. For example, it was formed to a thickness of 0.2 to 0.4 μm. Thereafter, windows (9) for electrodes for the P-type and N-type impurity regions were formed by etching using a photomask (2). Furthermore, aluminum was formed on the entire structure by sputtering, and leads α0) were formed using a photomask ■.
The photoelectric conversion device of this example was completed. As for the characteristics of such a photoelectric conversion device, a conversion efficiency of 11.5% was obtained with an area of 1.05 cnr, and the carrier diffusion length of this semiconductor film was 10.5 μm. A feature of the present invention is that unlike conventional devices, there are no electrodes sandwiching the semiconductor layer in the direction of stacking the semiconductor films, so there is no risk of short-circuiting between these two electrodes due to pinholes formed during the fabrication of the semiconductor film. Therefore, a photoelectric conversion device with a good fill factor (FF) value could be obtained. "Embodiment 2" As shown in FIG. 2(A), this embodiment has a structure almost similar to that of Embodiment 1. However, an amorphous silicon semiconductor film (11) is formed to a thickness of 3000 nm on the light irradiation surface side of the semiconductor film (3). Other forming methods and the like are almost the same as in Example 1. This amorphous silicon semiconductor film (11) has a higher light absorption coefficient than the underlying semiconductor film (3). Therefore, in this example, carriers are transferred to the semiconductor film (11) by light irradiation.
), it drifts into the semiconductor film (3), moves through the semiconductor layer (3) as a path, and is taken out from the electrodes. At the same time, carriers are generated in the semiconductor film (3) by light irradiation, but since there is wavelength dependence in the photosensitivity of the semiconductor film, it is possible to convert light in a wide wavelength range into electricity using the configuration of this embodiment. becomes possible. In addition, since the semiconductor film (11) has a wider energy band 11 than the semiconductor film (3), carriers generated in the semiconductor film (3) are prevented from drifting to the semiconductor film 01), and the semiconductor film The carriers generated by 01) move to the semiconductor film (3) along the gradient of the energy band, which makes it possible to extract the generated carriers to the outside more efficiently. This situation is shown in FIGS. 4(A) and 4(B). Figure 4 (A)
is an energy band diagram along line AA' in Figure 2(A), and Figure 4(B) is an energy band diagram along line BB' in Figure 2(A). There is. "Example 3" This example shows an example in which amorphous silicon is provided on the light irradiation side similarly to Example 2. A cross-sectional view is shown in FIG. 2(B). Unlike Example 2, the light irradiation surface is placed on the substrate side, and the extraction electrode is provided on the opposite side. In this example, we will proceed with the production of a photoelectric conversion device using the same process as in Example 1, or
The heat treatment temperature was lowered to 500°C than in Example 1, and the heat treatment was performed under conditions such that the entire semiconductor film (3) was not thermally crystallized, leaving an amorphous semiconductor film (0) on the substrate side. It was formed by leaving behind. Therefore, in FIG. 2(B), there may be a boundary (dotted line) between the semiconductor film (3) and the semiconductor film (12), but in reality there is no clear boundary, and the crystals are crystallized from the substrate side in the thickness direction. As a result, as shown in FIG. 4(C), the energy band diagram along line c-c' in FIG. (1
The carriers are continuously connected from the semiconductor film 02 to the semiconductor film (3), and the carriers generated in the semiconductor film 02 follow the gradient of the continuous energy band and are guided to the semiconductor film (3), using this as a path for the external extraction electrode. reach. When creating this continuous energy band structure, by actively adding carbon, nitrogen, etc. to the substrate side of the semiconductor film to create a wide gap, the gradient of the energy band can be made stronger, allowing carriers to form a continuous energy band structure. can be guided to the semiconductor film (3). "Example 4" FIG. 3 shows a schematic cross-sectional view of a photoelectric conversion device corresponding to this example. The manufacturing method of this example is exactly the same as that of Example 1, and has a structure in which a plurality of P-type or N-type regions are provided. Since this P-type or N-type impurity region and the electrode connected thereto are formed on one main surface of the semiconductor film, the ten and - electrodes can be arbitrarily connected according to the required power. In addition, since the light irradiation surface can be on the substrate side, the area of the photoelectric conversion region does not decrease due to connection of this electrode, and it is possible to apply any power by simply changing the mask pattern. Ta. "Effects of the Invention" By adopting the configuration of the present invention, it was possible to realize a photoelectric conversion device having a long diffusion length of a thin film on a substrate and a large light absorption coefficient. Furthermore, carriers generated by light irradiation diffuse in the plane direction of the semiconductor film, and are therefore efficiently taken out to the outside without being affected by the interface formed in the film thickness direction by forming the semiconductor film. Another feature is that the external lead-out electrode is formed on the substrate, so multiple photoelectric conversion devices can be integrated on one substrate and connected in series or parallel, and backflow prevention diodes can also be installed on the same substrate using the same semiconductor. It is possible to create one. Since the ten electrode and the minus electrode are formed only on one surface, there is no need to consider thermal stress during semiconductor manufacturing. An inexpensive substrate, especially an insulating substrate such as ceramics, glass, etc., is used, and 1 to 50 semiconductors are placed on this substrate.
Since it is formed with a thickness of μ, the material cost is low.

[Brief explanation of the drawing]

FIG. 1 is a longitudinal sectional view showing the manufacturing process of a photoelectric conversion device having a structure according to the present invention. FIGS. 2A, 2B, and 3 are longitudinal sectional views of other embodiments of the present invention. FIG. 4 is an energy band diagram corresponding to FIG. 2. 3... Semiconductor film 5... P type impurity region 7... N type impurity region 10... Electrode

Claims (1)

[Claims] 1. Selectively P-type or N-type in the same semiconductor film on the substrate
A photoelectric conversion device having an impurity region of type P
A photoelectric conversion device characterized in that the direction of an electric field formed by a type or N type impurity region is parallel to a light irradiation surface. 2. A photoelectric conversion device according to claim 1, wherein the semiconductor film is made of a semi-amorphous or semi-crystalline semiconductor. 3. A photoelectric conversion device according to claim 1, characterized in that an amorphous semiconductor film is laminated on the light irradiation surface side of the semiconductor film.