JPH04192619A - Mos semiconductor circuit for differential amplifier - Google Patents

Abstract

PURPOSE:To quicken the response to an amplifier transistor(TR) with respect to a change in an input signal and to improve the load driving speed by making the substrate potential of the amplifier TR independent of the source and the drain. CONSTITUTION:A couple of current paths comprising series connection of amplifier transistors(TRs) 1, 2 and loads 3, 4 the amplifiers in a differential amplifier semiconductor circuit 10 are connected in parallel, and a constant current is supplied to them, the substrate of the amplifier TRs 1, 2 is not connected to the source and is independent from both the source and the grain. Thus, the response of both the amplifier TRs 1, 2 is improved with respect to a timewise change in input signals S1, S2 and the drive speed to the loads is enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor circuit for differential amplification that is configured with MOS transistors and receives a pair of input signals and outputs a digitized signal.

[Prior art] Strictly speaking, output signals from sensors and input keys are analog signals whose values are influenced by various factors.
In order to convert this into a digital signal and provide it to a microcomputer, etc., a comparator or digitization circuit for converting 1-bit ADI is required, and a large number of them are built into an integrated circuit device and the required number of signal channels is set. It is convenient to be able to use only one at any time.

In order to accurately perform such two simple AD conversion operations, it is advantageous to use a differential amplifier circuit with a high gain.
The present invention relates to an MO3 semiconductor circuit for differential amplification suitable for such applications, and a conventional example thereof will be briefly explained below with reference to FIG. 2.・4
.

A pair of n-channel MOS transistors 1 and 2 are transistors for differential amplification, and input signals Sl and 32 are applied to their gates, respectively. MO3I, which constitutes the current mirror circuit on the power supply voltage V side above it, is
- Both transistors 3 and 4 are for amplification loads, and among them, reference current side transistor 3 is an amplification transistor l
The driven current side transistor 4 is connected in series with the amplifier transistor 2 to form one current shunt, and the driven current side transistor 4 is connected in series with the amplifying transistor 2 to form the other current shunt, and both types of flow shunts are connected in parallel to each other to form one current shunt in the latter. The potential at the interconnection point between the amplifying transistor 2 and the load transistor 4 is output as a digitized signal DS.

The current mirror circuit on the side of one ground potential E is for supplying constant current to the two current shunts mentioned above;
It consists of a reference current transistor 6 and a driven current transistor 7 connected in series, and in this example, both are n-channel MOS transistors and the driven current transistor 7 is connected in series.
A constant current is supplied to both types of flow shunts.

In order to digitize an analog signal output from, for example, a sensor using the differential amplifier circuit shown in FIG. A digitized signal DS is given as S2 and takes a logical value of "y" or "rH" depending on the magnitude of the analog value of the sensor signal and the reference voltage.

The differential amplifier circuit constructed in this manner has a very low operating threshold suitable for accurately digitizing analog signals, and the constant supplied by transistor 7 is used to improve the accuracy of the digitization or comparison operation. It is effective to increase the operating gain of the differential amplifier circuit by increasing the current value.

[Problems to be Solved by the Invention] 5. The above-mentioned differential amplifier circuit has a feature of high digitization precision, but this does not affect the operation of the load side of a microcomputer, etc. that receives digitized data. The speed has recently increased on the hook, and accordingly came the problem of increasing the negative, front drive speed.

In order to improve this load driving speed, the easiest and most effective way is to increase the load driving ability and shorten the time required to charge and discharge, for example, the capacitance within the load, and this is also the 21st! l
constant current transistor 7 to amplification transistors 1 and 2
It is effective to increase the constant current value supplied to the parallel current branch including
To avoid this, the transducer is made larger6.
As a result, the chip size increases, which becomes unnecessary, and the current consumption also naturally increases.

The purpose of the present invention is to eliminate such drawbacks of the conventional technology. The object of the present invention is to improve the load driving speed of a differential and amplifying MO3 semiconductor circuit without increasing the size of the transistor or increasing current consumption.

[Means for Solving the Problems] According to the present invention, in the semiconductor circuit for differential amplification constituted by the MO5I-transistor described above, a pair of current shunts in which the amplification transistor 5 and the amplification load are respectively connected in series are provided. Connect in parallel to supply a constant current, make the potential of the substrate of the amplification transistor independent from the source, drain, and potential, and apply a signal to each gate of the amplification transistor to connect the amplification transistor in one current branch and amplification. The above objective is achieved by taking and issuing a digitized signal from the load interconnection point 4.

Note that the transistor for constant current supply is an amplifying transistor, the transistor is of the same channel type, and the amplifying transistor is operated with the same potential as the substrate of the constant current transistor applied to its substrate. It is preferable to provide another amplification transistor that receives the digitized signal at its gate and another constant current transistor that supplies a constant current to it, and extract the digitized signal from the interconnection point between the two. is advantageous.

[Effect]

As shown in the above-mentioned FIG. 2, amplification transistors 1 and 2 have conventionally been used with their substrates connected to their sources, but in the present invention, as shown in the configuration in the previous section, the potential of the substrates is By making the potential independent of the source and drain potentials, a so-called substrate effect is generated in which a depletion layer spreads between the source layer and the substrate well. As a result, the potential of the well becomes intermediate between the potential of the source layer and the potential of the drain layer, and is closer to the drain layer side than before (therefore, the potential difference between the gate and the well decreases, and the effective capacitance of the gate increases. The present invention utilizes this effect to speed up the response of the amplification transistor to changes in the input signal, thereby increasing the drive speed for the load.

[Example] Hereinafter, with reference to FIG. 1, a differential amplification MOS according to the present invention will be explained.
In Figure 0, which describes an example of the semiconductor circuit, the same reference numerals are given to the parts of the differential amplifier circuit 10 shown surrounded by a dashed line that correspond to those in Figure 2, and the duplicated explanations will be omitted. In Figure 0, an example of a related circuit is added to the output side.

The difference between the differential amplifier circuit 10 in FIG. 1 and that in FIG. 2 is that the substrates of the amplifying transistors 1 and 2 are not connected to the source, and therefore, they are electrically independent from both the source and the drain. As mentioned above, the response of both amplifying transistors 1 and 2 to temporal changes in input signals Sl and S2 is improved compared to the conventional one. In addition,
The constant current value supplied from the constant current transistor 7 to the two current branches including the amplification transistors l and 2 is of course set to such an extent that the current flowing through them does not saturate, and both amplification transistors l and 2 are used for differential amplification. Therefore, each operating point is set within a range in which the current can change approximately linearly with respect to the input signals SL and S2 received by the gate.

In the embodiment shown in FIG. 1, the substrate wells of the amplification transistors 1 and 2 are shared with the substrate well of the constant current transistor 7, as shown simply by broken lines in the figure. As a result, the chip area required for incorporating the differential amplifier circuit 10 can be saved compared to the conventional circuit in which the wells for the amplification transistor and the constant current transistor need to be separated from each other as shown in FIG. According to experiments, the feature of high response speed of the amplification transistors 1 and 2 is not lost by using such a common well.

Furthermore, in the embodiment shown in FIG. 1, the digitized signal DS output from the differential amplifier circuit is amplified by one more stage in order to increase the driving ability for the load. Therefore, as shown in the figure, a low-channel type driven current transistor 8 is added to the current mirror circuit on the ground potential E side, and this is used as an amplification load, and another p-channel type amplification transistor 9 receives the digitized signal DS at its gate. If such an amplification transistor 9 is provided, the response may be delayed by the time required for charging and discharging the gate, but in the present invention, the response of the differential amplifier circuit lO is sufficient. Since it is fast, there is little risk of this happening, and the total gain of the circuit can be increased to improve the precision of digitization, and the drive capability can be increased to increase the load drive speed.

Of course, the digitized signal created as described above can be output as is, but in the embodiment shown in FIG. 1, an inverter circuit 20 is additionally provided.
A digitized signal is received at the common connection gates of a pair of complementary transistors 21 and 22, and an output signal So is taken out from the interconnection point between the two.

Note that the configuration in which the substrates of the amplification transistors 1 and 2 of the differential amplifier circuit 1O are electrically independent from their sources and drains as described above is useful in preventing saturation of their operations, and moreover, Prototype results have demonstrated that this is particularly useful in preventing an increase in current consumption by eliminating the need to increase the supply current of the constant current transistor 7 in order to speed up the response.

[Effects of the Invention] As described above, in the present invention, a pair of current shunts each having an amplification transistor and an amplification load connected in series is provided in a semiconductor circuit configured with MOS transistors that receives an analog input signal and outputs a digitized signal. Connect in parallel to supply a constant current, make the substrate potential of the amplification transistor independent from the source and drain, and apply input signals to the gates of the amplification transistors respectively.Interconnection point between the amplification transistor in one current branch and the amplification load. By extracting the digitized signal from the digitized signal, the following effects can be achieved.

(a) The substrate effect in which the depletion layer spreads between the source layer and the substrate reduces the effective capacitance and stray capacitance of the gate, speeds up the response of the amplification transistor to changes in the input signal, and increases the drive transistor etc. The load drive speed can be increased by increasing the current consumption or increasing the current consumption.

By sharing the well for the substrate of the high amplification transistor with the well for constant current transistor 7, the chip area required for incorporating the differential amplifier circuit can be saved compared to conventional circuits that require these wells to be separated from each other. can.

(C) By utilizing the high response speed of the differential amplifier circuit and amplifying the digitized signal output from it by one more stage, the total gain of the circuit can be increased, the precision of digitization can be increased, and the drive capability can be increased. It is possible to further increase the load driving speed.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of an MO3 semiconductor circuit for differential amplification according to the present invention. FIG. 2 is a circuit diagram of a differential amplifier circuit according to the prior art. In these figures, 1.2: amplification transistor, 3.4: amplification load or load transistor, 5: constant current setting resistor, 6: reference t2i
! Transistors, 7, 8: Constant current transistor or driven current transistor, 9: Another amplification transistor, 10
: Differential amplifier circuit, 20: Innotor circuit, 21, 22
: Inherder transistor, DS: Digitized signal, E: Ground potential, Si, S2: Input signal, v': tl
[pressure, is. , PA~-Representative Patent Attorney Iwao Yamaguchi 3. ! ,. -Zara)′

Claims (1)

[Claims] 1) A semiconductor circuit configured of MOS transistors that receives a pair of input signals and outputs a digitized signal, the semiconductor circuit comprising a pair of current shunts in which an amplification transistor and an amplification load are connected in series. are connected in parallel to supply a constant current, the substrate potential of the amplification transistor is made independent from the source and drain potentials, and an input signal is given to the gate of each amplification transistor to connect the amplification transistor in one current branch and the amplification load. A MOS semiconductor circuit for differential amplification, characterized in that a digitized signal is extracted from an interconnection point. 2) In the circuit according to claim 1, the constant current supply transistor is of the same channel type as the amplification transistor, and the amplification transistor is operated with the same potential applied to its substrate as that of the substrate of the constant current transistor. A MOS semiconductor circuit for differential amplification, characterized by the following. 3) In the circuit according to claim 1, there is provided another amplification transistor that receives the digitized signal at its gate and another constant current transistor that supplies a constant current to the amplification transistor, and the amplified digitized signal is obtained from the interconnection point between the two. 1. A MOS semiconductor circuit for differential amplification, characterized in that the MOS semiconductor circuit is adapted to take out.