JPH04192149A - Servo controller for recording and reproducing device - Google Patents

Abstract

PURPOSE:To allow the phase control of a capstan by frequency dividing and processing a control signal at the ratio determined by a speed at the time of variable speed reproduction and to allow the selection of a field by matching the polarities of a scanning track and a selected and instructed track at the time of 2n-times speed reproduction. CONSTITUTION:The signal d1 obtd. by detecting the difference between the frequency signal a1 proportional to the rotating speed of a motor 13 and the frequency value of the CFG signal corresponding to a speed command signal b1 by a speed control circuit 3 is supplied to an adder 4. On the other hand, the signal g1 reproduced by a head 18 is frequently divided by the double speed signal A of a speed command discriminating circuit 10 in a frequency dividing circuit 7 and the signal j1 corresponding to the phase difference from a phase reference signal i1 is formed in a phase control circuit 6 and is supplied to the adder 4. The result of the addition of the signals d1 and j1 is supplied to a motor drive amplifier 2 to drive a capstan motor 14 in the adder 4. The capstan is eventually controlled in speed and phase in this way.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a servo control device for a helical scan type recording and reproducing device, and particularly relates to a capstan that is capable of switching the polarity of a reproduction field track during high-speed reproduction. The present invention relates to a servo control device for a recording/reproducing device that performs phase control.

[Conventional technology]

In a helical scan magnetic recording/reproducing device (hereinafter referred to as a VTR) that uses a magnetic tape as a recording medium, a video signal is transmitted to a video track formed in a diagonal rectangle on the magnetic tape, and a control signal is transmitted to a control track formed in a longitudinal direction on the magnetic tape. are recorded on each magnetic tape, and when reproducing a video signal from such a magnetic tape, the phase difference between the control signal reproduced from this magnetic tape and a separately generated phase reference signal is detected, and this position is By controlling the rotational phase of the capstan motor according to the phase difference, the running of the magnetic tape is stabilized.

In addition, in recent years, VTRs using digital recording methods have attracted attention due to their high image quality and good dubbing performance, and one example is the rPr.

posed American NationaI
5 standard JV16.87-441 and “Television 57 Academic Journal J VOL, 42. No. 5 (1988
) pp. 49B-502 describes a D-2 format standard VTR for recording and reproducing composite video signals.

This VTR allows a wide variety of slow-motion playbacks and search playbacks (hereinafter referred to as variable-speed playbacks) on a beautiful screen without noise, greatly improving usability.

[Problem to be solved by the invention]

However, in the above-mentioned prior art, no consideration is given to capstan phase control during variable speed playback, and therefore there is a problem in that the variable speed playback speed differs for each VTR.

Further, during variable speed reproduction, there is a problem in that the reproduction field tracks traced by the rotary head cannot be limited to either odd-numbered field tracks or even-numbered field tracks for reproduction.

The purpose of the present invention is to solve this problem, and in particular, to drive the cab scan at an integral multiple speed, by adding capstan phase control,
Furthermore, capstan phase control at 2n (n: an integer) speed is a recording/reproducing device equipped with a capstan phase control circuit that operates so that a rotating head scans a field track of a specified polarity (odd or even number) during reproduction. Our objective is to provide a servo control device for

[Means to solve the problem]

In order to achieve the above object, the present invention provides a means for running a magnetic tape at a higher speed than the normal playback speed, in particular performing capstan phase control at n times speed (n is an integer), and a field track scanned by a rotary head. means for reading out the polarity of a field track (odd or even field track) from the above video signal; means for selectively instructing the polarity of the field track; Means is provided for shifting the phase of the reference signal for capstan phase control so that the polarity of the field track coincides with the polarity of the field track.

[Effect]

During variable speed playback, especially with integral multiple speed capstan drive,
The control signal reproduced from the magnetic tape is frequency-divided by a frequency division ratio determined in advance by the magnetic tape speed, capstan phase control is performed in the same way as for normal reproduction, and
In capstan phase control at n times speed, the polarity of the field track scanned by the rotary head matches the polarity of the reproduction field track selected in advance.
By controlling the phase of the reference signal of the capstan phase control, selective reproduction of only odd or even fields can be realized.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a servo control device for a recording/reproducing apparatus as a first embodiment of the present invention, in which 1 and 27 are frequency generators, 2 and 26 are motor drive amplifiers, and 3 is a cab scan speed control. circuit, 4.24 is an adder, 5 is a speed command signal generation circuit, 6 is a capstan phase control circuit,
7 is a frequency dividing circuit, 8 is a variable delay circuit, 9 is a reference signal generation circuit, 10 is a speed command discrimination circuit, 11 is a reproduction field polarity selection circuit, 12 is a speed command input terminal, 13 is a selection input terminal, 14 is a capacitor. Stan motor, 15 is a capstan, 16 is a pinch roller, 17 is a magnetic tape, 18 is a control head, 19.32 is an amplifier circuit, 20 is a reproduction field polarity determination circuit, 21 is a field number reading circuit, 22 is a reproduction signal 23 is a drum phase control circuit, 25 is a drum speed control circuit, 28 is a drum motor, 29 is a tack head, 30 to 31 are rotary heads, 33 is a reproduction output terminal, and 34 is a phase shift data generation circuit.

In the figure, a video signal is recorded on a diagonal video track on a magnetic tape 17, and a longitudinal force 1i1i1
(7) A control signal is recorded on the control track. The magnetic tape 17 travels by being sandwiched between a capstan shaft 15 rotated by a capstan motor 14 and a pinch roller 16.

The video signal is reproduced by the rotating heads 30, 31 rotated by the drum motor 28 alternately scanning the magnetic tape 17 in diagonal directions, and the fixed control head 18 scanning the magnetic tape 17 in the longitudinal direction of the tape. By scanning, the control signal is reproduced.

Next, the rotation control means for the capstan motor 14 will be explained.

When the capstan motor 14 rotates, the frequency generator 1 generates a signal al (CFG signal) with a frequency proportional to its rotation speed, and is supplied to the capstan speed control circuit 3. On the other hand, the speed command signal b1 manually input from the speed command input terminal 12 is supplied to the speed command signal generation circuit 5,
The cycle value of the CFG signal corresponding to the speed command signal b1 is supplied to the capsun control circuit 3.

The capstan speed control circuit 3 detects the deviation between the period value of the CFG signal corresponding to the speed command signal b1 and the period of the signal al (CFG signal) having a frequency proportional to the capstan rotation speed, and corrects the deviation. The voltage representing this is supplied to the adder 4 as the speed control signal d1.

Further, the reference signal generation circuit 9 is connected to the capstan motor 14.
Capstan phase reference signal e1 for rotational phase control of
is supplied to the variable delay circuit 8, and a drum phase reference signal f1 used for rotational phase control of the drum motor 28 is supplied to the drum phase control circuit 23, respectively. The capstan phase reference signal e1 is supplied to a variable delay circuit 8 whose delay amount is set according to the output signal E of the phase shift data generation circuit 34.
After phase adjustment, the capstan phase reference signal 11
The signal is supplied to the capstan phase control circuit 6 as a signal.

On the other hand, the control signal g1 reproduced from the control head 1st is sufficiently amplified by the amplifier circuit 19, and then
The signal is supplied to the frequency dividing circuit 7. The frequency dividing circuit 7 switches its frequency dividing ratio based on the output signal A of the speed command discrimination circuit 10. The control signal outputted from the frequency dividing circuit 7 is supplied to the capstan phase control circuit 6, and the voltage (phase control signal jl) is generated. The generated phase control signal j1 is added to the speed control signal d1 from the capstan speed control circuit 3 in an adder 4, and is supplied to the capstan motor drive amplifier 2.
The capstan motor 14 is driven.

In this way, the capstan motor 14 is controlled in one speed phase, and the magnetic tape 17 is maintained at a predetermined speed and a predetermined phase relationship between the capstan phase reference signal 11 and the playback control signal g1. Run.

Here, since the capstan phase control circuit 6 is operated only when the speed command is an integral multiple speed command (N times speed), the speed command signal c1 output from the speed command signal generation circuit 5 is The speed command discrimination circuit 10 supplies an integer multiple speed command discrimination signal A to the capstan phase control circuit 6. As a result, the capstan phase control circuit 6 operates other than when the integer multiple speed command is issued (for example,
(in the case of 1.5x speed, 2.5x speed, etc.) is a predetermined constant signal (there is a predetermined phase relationship between the reproduction control signal g1 and the capstan phase reference signal j1,
It is set to an adjustment state that outputs a signal (signal that is output when there is no phase error), and operates when an integer multiple speed command is issued.

When the drum motor 28 rotates, a signal kl (DFG signal) having a frequency proportional to the drum rotational speed is generated by the frequency generator 27 and supplied to the drum speed control circuit 25. The drum speed control circuit 25 compares the signal 1 with an internal reference signal, and sends a speed control signal P1 to the adder 24 so that the drum motor 25 rotates at a predetermined speed.

On the other hand, regarding drum phase control, as the drum motor 28 rotates, a tack signal m1 representing the rotational phase of the drum motor 28 is generated from the tack head 29.
The phase is compared with the drum phase reference signal r1 output from the drum phase reference signal r1. The phase comparison output is supplied as a voltage to the adder 24 and added to the drum speed control signal 11, and then supplied to the drum motor drive amplifier 26 to drive the drum motor 2.
Control 8.

In this way, the rotary heads 30 and 31 are rotated by the drum motor 28 whose speed is controlled in two phases, and the magnetic tape 1 is rotated.
7 are alternately scanned for reproduction, and the video signal is reproduced. These reproduced video signals from 30 and 31 are each amplified in the amplifier circuit 32 and combined using a switching signal generated from the tack signal m1 to form a series of video signals.

A series of video signals output from this amplifier circuit 32 are as follows:
After processing such as demodulation is performed in the reproduction processing circuit 22, the signal is outputted from the reproduction output terminal 33.

Next, playback during high-speed tape running according to this embodiment,
In particular, selective reproduction of even fields or odd fields at integral multiple speed (N times speed) will be explained.

The speed command determination circuit 10 determines an integral multiple speed (N times speed) from the speed command signal c1 from the speed command signal generation circuit 5, and supplies an integral multiple speed (N times speed) determination signal A to the capstan phase control circuit 6. . The capstan phase control circuit 6 is
The integer multiple speed discrimination signal A operates only at the integer multiple speed during variable speed playback, as described above.

Further, the speed command discrimination circuit 10 transmits the even number multiple speed (2N times) discrimination signal B to the reproduction field polarity selection circuit 11. It is sent to the reproduction field polarity determination circuit 20 and the phase shift data reproduction circuit 34. Reproduction field polarity selection circuit 11.
The reproduction field polarity determination circuit 20 and the phase shift data generation circuit 34 stop operating in accordance with the even multiple speed determination signal B except when the 2N times speed command is issued.

Now, taking as an example reproduction where the speed command b1 is double speed and the reproduction field polarity is an even field, the capstan phase control at that time will be explained.

An even field reproduction determination instruction signal C is sent from the reproduction field polarity selection circuit 11 to the reproduction field polarity determination circuit 2.
0. On the other hand, the field number reading circuit 21 reads out the field number recorded in advance on the diagonal track on the magnetic tape 17 during recording from the output of the reproduction signal processing circuit 22, and supplies it to the reproduction field polarity determination circuit 20. The reproduction field polarity determination circuit 20 receives the field polarity selection signal C (even field in this case) instructed during reproduction and the current rotating head 30.
．． or 31 is compared with the polarity of the field being reproduced, and the comparison result is supplied to the phase shift data generation circuit 34 as a field polarity matching signal. The phase shift data generation circuit 34 supplies phase shift data E to the variable delay circuit 8 based on the field polarity match signal,
A capstan phase reference signal 11 whose phase delay has been adjusted by the amount of phase shift data is generated by the variable delay circuit 8 and supplied to the capstan phase control circuit 6.

For example, if the phase shift data L increases by Δφ,
In response to this, the phase of the capstan phase reference signal is delayed by Δφ, the rotational phase of the capstan motor 14 is delayed, and the running phase of the magnetic tape 17 is also delayed, causing the video track on the magnetic tape 17 and the rotating head to be delayed. 30. The positional relationship with the traveling trajectory of 31 changes. This shifting operation of the running phase of the capstan corresponds to the field number of the diagonal track on the magnetic tape 17 that is currently being traced.
This continues for a preset period of time until an even field is played.

The operation of the phase shift data generation circuit 34 will be explained in more detail below with reference to FIG.

In FIG. 2, blocks corresponding to those in FIG. 1 are given the same reference numerals. 40 is an up counter, 41 to 42 are AND circuits, 43 is an exclusive OR circuit, 44
is a clock generation circuit, 45 is an input terminal for capstan speed lock-in detection signal n1, and 46 is a 2N double continuous determination signal B.
The input terminal 48 is an even field video track (
Hatching part of magnetic tape 17 diagonal track pattern)
, 49 are odd field video tracks.

The output signal of the reproduction field polarity determination port 820 is a signal that outputs a Hi level when the odd field video track 49 is being reproduced, and a Low level when the even field video track 48 is being reproduced, Reproduction field polarity selection circuit 11 output signal C (High level when odd field is selected, Low level when even field is selected)
Exclude the matching state with the signal C) that outputs the level.
It is detected by the sibu-OR circuit 43, and a high level signal is supplied to the AND circuit 41 in the non-coincidence state.

The AND circuit 41 inverts the output signal F of the clock generation circuit 44 to the up counter 40 only when the control signals C and D do not match.
The counter output signal E is output from the terminal 50 as capstan phase shift data. The phase shift data transmits the output signal F of the clock generation circuit 44 to the up counter 40 only when the capsun speed lock signal n1 from the terminal 45 is in the lock-in state (Hi level) and the speed command is 2N times the speed. Update capstan phase shift data.

By generating the capstan phase shift data after the capstan speed control is stabilized in this way, the capstan phase shift data generation time can be shortened.

In addition, if the speed command is other than 2N times the speed, the phase shift data E is
Set the output to a predetermined fixed value.

As described above, the rotational phase of the capstan motor 14 changes according to these phase shift data E, and the magnetic tape 17
By changing the running phase of the magnetic tape 17, the positional relationship between the video track on the magnetic tape 17 and the scanning locus of the rotary head 30, 31 is changed, making it possible to reproduce the desired field polarity.

Next, the operation of the frequency dividing circuit 7 in FIG. 1 will be explained using FIGS. 3 and 4.

In FIG. 3, 50 is an input terminal for the reproduction control signal a, 51 is an input terminal for the CFG signal a1, 52 is a capstan speed lock-in detection signal input terminal, 53 is a reproduction control signal separation circuit, and 54 is a first control A signal gate generation circuit, 55 is a second control signal gate generation circuit, 56.57 is an AND circuit, and 58 is a first control signal gate generation circuit.
59 is an output terminal for the second frequency division control signal.

Further, in FIG. 4', each symbol corresponds to the symbol in FIG. 3, respectively. In addition, there is a signal below.

The time axis of al, j, is the upper signal a, b, c.

The time axes of d, e, d', and e'' are shortened.

Here, for example, composite digital (D-2)
Although the operation will be explained by taking up a frequency dividing circuit for a VTR running system, it can also be implemented in a home VTR running system using the same concept, and there is no need to be limited to this embodiment. Regarding the D2VTR running system and control signals, refer to the rProposed
American National 5ta
Please refer to the description in ndardJV16, 87-441, and will not explain it here.

Now, the frequency division operation when performing double speed playback will be explained using FIGS. 3 and 4.

The control signal a input from the input terminal 50 is separated into a first control signal and a second control signal C by a control signal separation circuit 53. The first control number 48 outputs a frequency division control signal k from the gate generation circuit 55 and the AND circuit 57.

Here, the gate generation circuit 55 has a gate period (Hi level period) TR! A gate signal j of J l is output. That is, the gate generation circuit 55 outputs the gate signal j
is set to Hi level at the fall of the first control signal S, and then set to Low level after counting a predetermined value using CFG signal a1 as a reference clock.

The AND circuit 57 allows the first control signal to pass only during the period when the gate signal j is at a low level, and outputs it as a frequency-divided control signal.

On the other hand, when the second control signal C is frequency-divided by the same means as the first control, there are two types of frequency-divided control signals shown as frequency-divided control signals e and e' in FIG. In this embodiment, the gate generation circuit 54 is controlled so that only one of the frequencies is divided. Otherwise, the lock phase of the capstan will be different every time you play. Here, the gate signal is d instead of do.
The gate generation circuit 54 is controlled to output e as a frequency division control signal.

In this manner, the frequency division control signals (signal e and signal k) are outputted from the output terminals 58 and 59 as a signal periodically equal to the reproduction control signal a at 1x speed. Therefore, the capstan phase control circuit 6 can realize 2N times speed capstan phase control by performing single speed phase control even during double speed playback.

Further, since the passage timing of the first control signal C and the second control signal C is permitted only when the gate signals d and j output from the gate generation circuits 54 and 55 are at a low level, the first control signal It is also possible to remove noise from the signal C and the second control signal C, and furthermore, it is possible to realize capstan phase control that is resistant to noise in the reproduction control signal.

Next, a second embodiment will be explained using FIG. 5 and FIG. 6.

However, the same blocks as in FIG. 1 are given the same reference numerals, and the capstan and drum motor control means are the same as in FIG. 1. Here, the phase control of the capstan during 2N double speed playback will be explained.

In FIG. 5, 61 is a fixed tracking generator.

FIG. 6 shows the reproduction control signals r, t, v and reproduction fields q, s, u with respect to the reference signal p during 1x speed playback, 2x speed even field playback, and 2x speed odd field playback in this embodiment. It shows the relationship between reproduction fields q and s.

The shaded area in U is the field actually traced by the rotating head. Note that the reference signal P here refers to the reference signal e which is the output of the reference signal generation circuit 9 shown in FIG.
1, and the playback control signals r, t, and V refer to the playback control a that is the output of the amplifier circuit 19.

The VTR used in this embodiment completes one frame with, for example, four fields, and two even and odd fields are alternately formed within one period of the reference signal p.
IJl exists. In addition, the control signal (CTL-Fl
, CTL-F2) is a control signal indicating a frame unit.

In this embodiment, reproduction of either an odd field or an even field is realized during 2N times speed reproduction, and the difference from the first embodiment is that fixed phase shift data is stored in the variable delay circuit 8. The fixed phase shift data is switched depending on the polarity of the field to be reproduced.

Here, with reference to FIG. 6, for example, a VTR in which one frame is composed of four fields will be taken up, and phase control during double speed playback will be explained.

First, in 1x speed playback, a total of 4 even fields (E) and odd fields (0) are arranged alternately during the reference signal P period.
Play the field. At this time, the first control signal (CTL-Fl) and the second control signal (CTL-Fl)
-F2) is the timing shown in r. That is, the phase of the capstan is controlled so that the header point (beginning part) of the even field is located at the rising and falling edges of the reference signal p.

Next, in double-speed even field reproduction, the rotary head traces only the even field as the reproduction field by controlling the capstan phase to the phase indicated by the control signal t. The rotating head is a system that moves the head to faithfully trace the target track so that it does not deviate from the target track even when the tape speed changes (August 23, 1990, Technical Report of the Television Society of Japan, Composite Digital (D-2) Movable for VTR head system (described in detail in the head system and not explained here).

In double-speed odd field reproduction, by controlling the phase of the capstan to the phase shown in the frame control signal waveform U, the rotary head traces only the odd fields without changing the tracing operation of the rotary head.

From the above, switching between odd and even fields at 2N times speed can be achieved by switching only the value of the fixed phase delay amount of φ1 shown in FIG.

The φ1 fixed delay data is generated by the fixed tracking generator 61 shown in FIG.
A phase-adjusted reference signal for fixed delay data is output.

Further, the fixed tracking generation circuit 61 generates a predetermined delay amount φ1 based on the field reproduction determination instruction signal C from the reproduction field polarity selection circuit 11 and the even multiple speed determination signal B from the speed command determination circuit 10.

Next, an example will be described with reference to FIG. 7, in which the magnetic chip 117 in the example shown in FIG. 1 has a missing long-range control signal or no control signal is recorded.

However, the same blocks as in FIG. 1 are given the same reference numerals. In FIG. 7, 70 is a control signal detection circuit that detects the presence or absence of the reproduction control signal a, 71 is a display circuit that displays the presence or absence of the reproduction control signal, and 72 is its display output.

When the control head 18 scans an area on the magnetic tape 17 where no control signal is recorded, the control signal detection circuit 70 no longer detects the control signal a, and this non-detection period lasts for a predetermined period of time (for example, the control signal a If it continues for several to several tens of times),
Generate control signal X. Based on this control signal The adjustment state is set to output a signal (signal).

When the control signal a is no longer reproduced from the magnetic tape 17, the phase control circuit 6 is set to the above-mentioned adjustment state, and the capstan motor 14 is no longer phase-controlled, the polarity of the reproduction instruction field and the current rotation during 2N double speed reproduction. The polarity of the fields scanned by the heads 31 and 30 is no longer inconsistent, and the phase shift data output from the phase shift data generation circuit 34 is constantly updated.

Next time, when the control signal a is detected and the field of the specified polarity is to be reproduced again at 2N times the speed, phase shift data must be generated again in the phase shift data generation circuit 34, and the capstan The time until phase lock-in becomes longer by the phase shift data generation period.

Therefore, in this embodiment, the control signal detection circuit 70
When the phase shift data generation circuit 34 detects the control signal X output from the phase shift data generation circuit 34, it stops updating the phase shift data,
Next time, when the control signal a starts to be input, updating starts from the previous phase shift data value. By doing this, even if the phase control circuit 6 is set to the adjustment state, the output data of the phase shift data generation circuit 34 will maintain the previous value, and the next time the control signal a is detected, phase shift data will be generated. The time saving effect is great.

The control signal detection circuit 70 also includes a frequency dividing circuit 7.
magnetic tape 1 even at 2N double speed.
When the same number of control signals a reproduced from 7 are not detected, the control signal X is outputted. By doing this, it is possible to detect the loss of the control signal a at the same tape length, regardless of the tape speed.

〔Effect of the invention〕

According to the present invention, since capstan phase control is added to capsun drive in variable speed playback, especially integer multiple speed playback, it is possible to sufficiently control a range that cannot be controlled by capsun speed control alone.
The variable playback speeds can be made equal to each other for each VTR.

Further, according to the present invention, in variable speed playback, especially in 2n (n is an integer) speed playback, the field scanned by the rotary head can be limited to either an even field or an odd field. The usability of time has improved, and the effect is great.

Furthermore, capsun phase control when the magnetic tape running speed is an integer multiple can be realized by dividing the frequency of the reproduction control signal, and the frequency division also acts as a noise remover for the reproduction control signal, which is highly effective.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of the present invention;
The figure is a block diagram showing the configuration of the phase shift data generation circuit in Figure 1, Figure 3 is a block diagram showing the configuration of the frequency dividing circuit in Figure 1, and Figure 4 shows the timing of the main signals in Figure 3. 5 is a block diagram showing the second embodiment of the present invention. FIG. 6 is a timing diagram showing the timing relationship between the reproduction control signal and the reproduction field with respect to the reference signal in FIG. 5. FIG. is a block diagram showing a third embodiment of the present invention. Explanation of symbols 5... Speed command signal generation circuit, 6... Capstan phase control circuit, 7... Frequency dividing circuit, B... Variable delay circuit, 9... Reference signal generation circuit, 11. ...Reproduction field polarity selection circuit, 20...Reproduction field polarity determination circuit, 21...Field number reading circuit, 2
2... Reproduction signal processing circuit, 34... Phase shift data generation circuit, 40... A/P counter, 44...
Cronk generation circuit, 70... control signal detection circuit. Agent Patent Attorney Akio Namiki No. 1 Illustration 21f! ! 1 薯3Figure 14 Figure 5 Figure α σ L ψ −F〉7th
figure

Claims (1)

[Claims] 1. A capstan motor that rotates to run a recording medium in its longitudinal direction, and a frequency that detects the rotational speed of the capstan motor and outputs a frequency signal having a frequency corresponding to the rotational speed. and a speed control signal generating means that inputs a frequency signal from the frequency generating means, formed on the recording medium in diagonal directions with respect to the longitudinal direction, and arranged alternately in the longitudinal direction. When scanning odd field video tracks and even field video tracks arranged in a rotary head with a rotary head to record video signals on these video tracks or to reproduce video signals recorded on these video tracks, In the servo control device of the recording/reproducing apparatus, the speed control signal generating means generates a speed control signal based on the inputted frequency signal, and controls the rotational speed of the capstan motor using the speed control signal, wherein the recording medium A control signal reproducing means for reproducing and outputting a recorded control signal from a control track formed above, a reference signal generating means for generating and outputting a reference signal, and a reference signal from the reference signal generating means. phase control signal generation means for inputting the signal and the control signal from the control signal reproduction means, and when reproducing the video signal, the speed control signal generation means adjusts the rotational speed of the capstan motor in advance. When controlling the speed to be n times (n is an integer value) a predetermined reference speed, the phase control signal generating means generates a phase control signal based on the inputted control signal and reference signal. , the rotational phase of the capstan motor is controlled by the phase control signal, and when reproducing the video signal, the speed control signal generation means increases the rotational speed of the capstan motor by 2n times a predetermined reference speed. and the rotary head is controlled to control the odd field video track and the even field video track,
When it is instructed to scan only one of the video tracks, the phase control signal generation means generates a phase control signal based on the inputted control signal and reference signal, and uses the phase control signal to generate a phase control signal. . A servo control device for a recording/reproducing apparatus, characterized in that the rotational phase of the capstan motor is controlled so that the rotary head scans only the instructed video track. 2. The servo control device according to claim 1, wherein the reference signal generating means generates a signal having a single frequency as the reference signal, and the phase control signal generating means generates a signal having a single frequency as the reference signal, and the phase control signal generating means generates a signal having a single frequency as the reference signal. a frequency dividing means which divides and outputs the frequency, and whose frequency division ratio is switched according to the rotational speed of the capstan motor, and a frequency dividing means which divides and outputs the frequency, and whose frequency division ratio is switched based on the output signal from the frequency dividing means and the inputted reference signal. A servo control device for a recording/reproducing device, comprising: a phase control means for generating and outputting the phase control signal. 3. The servo control device according to claim 1, wherein the phase control signal generating means includes determining means for determining whether the reproduced video signal is recorded on the odd field video track or the even field video track. , a phase variable means for changing the phase of the input reference signal until the video track determined by the determining means successively matches the designated video track; and A servo control device for a recording/reproducing device, comprising: a phase control unit that generates and outputs the phase control signal based on the reference signal and the input control signal. 4. The servo control device according to claim 1, wherein the phase control signal generation means includes phase switching means for switching the phase of the inputted reference signal to a fixed phase according to the designated video track; A recording/reproducing apparatus comprising: a phase control means for generating and outputting the phase control signal based on the reference signal whose phase has been switched by the phase switching means and the input control signal. Servo control device.