JPH04181634A - Flat display panel - Google Patents
Flat display panelInfo
- Publication number
- JPH04181634A JPH04181634A JP30771290A JP30771290A JPH04181634A JP H04181634 A JPH04181634 A JP H04181634A JP 30771290 A JP30771290 A JP 30771290A JP 30771290 A JP30771290 A JP 30771290A JP H04181634 A JPH04181634 A JP H04181634A
- Authority
- JP
- Japan
- Prior art keywords
- panel
- thin film
- conductive thin
- flat display
- lead wires
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 claims abstract description 19
- 238000005401 electroluminescence Methods 0.000 claims description 2
- 230000000694 effects Effects 0.000 abstract description 7
- 239000004642 Polyimide Substances 0.000 abstract description 5
- 239000006059 cover glass Substances 0.000 abstract description 5
- 229920001721 polyimide Polymers 0.000 abstract description 5
- 239000011521 glass Substances 0.000 abstract description 4
- 239000000853 adhesive Substances 0.000 abstract description 3
- 230000001070 adhesive effect Effects 0.000 abstract description 3
- 230000005670 electromagnetic radiation Effects 0.000 abstract description 3
- 230000002093 peripheral effect Effects 0.000 abstract 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 9
- 239000000463 material Substances 0.000 description 3
- 238000005476 soldering Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 1
Landscapes
- Gas-Filled Discharge Tubes (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、フラットディスプレイパネルにおいて、パネ
ルに関し、特に、パネルのリード線から放出される電磁
波を抑制する構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a flat display panel, and particularly to a structure for suppressing electromagnetic waves emitted from lead wires of the panel.
従来、この種のフラットディスプレイパネルにおいて、
パネルでは、第４図に示すとおり、パネルを構成するカ
バーガラスらやバックガラス４の外形周辺にパネルリー
ド電極６を引出し、その電極に半田付等によってリード
線１を接続している。Conventionally, in this type of flat display panel,
In the panel, as shown in FIG. 4, a panel lead electrode 6 is drawn out around the outer shape of the cover glass or back glass 4 constituting the panel, and a lead wire 1 is connected to the electrode by soldering or the like.
これらのフラットディスプレイパネルにおいて、パネル
、例えばプラズマデイスプレィパネルにおいては、原理
的に放電発光させるために１５０〜３００■の高電圧で
数Ｋ Ｈｚ〜２ＭＨ２程度の周波数のパルス電圧を必要
とする。このパネルには、パネルを駆動するための駆動
回路かリード線を介して接続される。この駆動回路は各
種のパルス回路から構成され、そのパルス回路が発生す
るパルスは、パルスの立上りや立下がり時のスパイク現
象や回路のインピーダンスのミスマツチなどによるリン
ギング現象に起因して高調波成分の多い駆動パルスとな
り、これによって生じた電磁波がリード線や駆動回路か
ら放出される欠点を有していた。In these flat display panels, for example, plasma display panels, in principle a high voltage of 150 to 300 cm and a pulse voltage with a frequency of about several KHz to 2 MH2 are required to cause discharge and light emission. A drive circuit for driving the panel is connected to this panel via lead wires. This drive circuit consists of various pulse circuits, and the pulses generated by the pulse circuits have many harmonic components due to spike phenomena at the rise and fall of pulses and ringing phenomena caused by mismatching of circuit impedance. This has the drawback that the electromagnetic waves generated by the drive pulses are emitted from the lead wires and the drive circuit.
本発明は、放電発光や電界発光または反射・透通光を利
用したフラットディスプレイパネルにおいて、パネルに
おいて、パネルの外周から引出されている複数のリード
電極に接続されている複数のリート線の背面に絶縁層を
介して導電性薄膜を設けたことを特徴とする。The present invention provides a flat display panel that utilizes discharge light emission, electroluminescence, or reflected/transmitted light. A feature is that a conductive thin film is provided via an insulating layer.
次に、本発明について図面を参照して説明する。第１図
は本発明の第１の実施例の斜視図である。パネルを構成
するバックガラス４の外形周辺に引出されているパネル
リード電極６に接続されたリード線１には、その背面に
０．０５ｍｍの厚さのポリイミドからなる絶縁層２およ
び０．０２５ｍｍの厚さのＮｉからなる導電性薄膜３が
密着させられている。導電性薄膜３の内端部は、カバー
ガラス５の前面周辺部に接着剤（図示せず）により接着
されている。Next, the present invention will be explained with reference to the drawings. FIG. 1 is a perspective view of a first embodiment of the invention. The lead wire 1 connected to the panel lead electrode 6 drawn out around the outer shape of the back glass 4 constituting the panel has an insulating layer 2 made of polyimide with a thickness of 0.05 mm and an insulating layer 2 made of polyimide with a thickness of 0.025 mm on the back side. A conductive thin film 3 made of Ni with a certain thickness is adhered thereto. The inner end of the conductive thin film 3 is adhered to the front periphery of the cover glass 5 with an adhesive (not shown).
第２図は、本発明のフラットディスプレイパネルにおい
て、パネルの応用例を示す縦断面図である。フラットデ
ィスプレイパネルにおいて、パネルのリード線１は、駆
動回路素子１１を実装した回路基板１０のパネル駆動出
力端子（図示せず）に半田付等に接続される６一方、導
電性薄膜３の一端は、駆動回路素子１１を包含するシー
ルドケース１２と接続され、もう一端はシステム筐体１
３の内面と接続される。FIG. 2 is a longitudinal sectional view showing an example of application of the panel in the flat display panel of the present invention. In the flat display panel, the lead wire 1 of the panel is connected by soldering or the like to the panel drive output terminal (not shown) of the circuit board 10 on which the drive circuit element 11 is mounted 6, while one end of the conductive thin film 3 is , is connected to the shield case 12 containing the drive circuit element 11, and the other end is connected to the system case 1.
Connected to the inner surface of 3.
この構成により駆動回路素子およびリード線から放出さ
れる電磁放射は、このリート線の背面の導電性薄膜によ
るシールド効果によって顕著に低減することが可能とな
った。With this configuration, electromagnetic radiation emitted from the drive circuit elements and lead wires can be significantly reduced due to the shielding effect of the conductive thin film on the back surface of the lead wire.
第３図は本発明の第２の実施例の斜視図である。この実
施例では、リード線１の背面に０．０５ｍｍの厚さのポ
リイミドからなる絶縁層２を密着させ、その上面にリー
ド線１の電極各々の位置を避けて０．０５ｍｍ厚を有す
るＮｉからなる導電性薄ｌｌ１３が密着させである。そ
して導電性薄膜３の内端部は、カバーカラス５の外周辺
部に１ｍｍ厚のクツション材７を介して接着剤により接
着されている。FIG. 3 is a perspective view of a second embodiment of the invention. In this embodiment, an insulating layer 2 made of polyimide with a thickness of 0.05 mm is closely attached to the back surface of the lead wire 1, and an insulating layer 2 made of polyimide with a thickness of 0.05 mm is placed on the upper surface of the insulating layer 2, avoiding the positions of the electrodes of the lead wire 1. The conductive thin film 13 is placed in close contact with the conductive film 113. The inner end of the conductive thin film 3 is bonded to the outer periphery of the cover crow 5 with an adhesive via a cushion material 7 with a thickness of 1 mm.
この実施例では、リード線と導電性薄膜で形成される静
電容量を低減させることができ、また、クツション材に
よりシステム筐体に実装させる際、カバーガラスにかか
る圧力を軽減することができる利点がある。さらに、シ
ステム筐体との電気的接触が確実となり、導電性薄膜の
シールド効果はファラデースクリーンの作用によりリー
ド線から放出する電磁波の抑制が顕著に得られる。This embodiment has the advantage that it is possible to reduce the capacitance formed by the lead wire and the conductive thin film, and it is also possible to reduce the pressure applied to the cover glass when it is mounted on the system case using cushioning material. There is. Furthermore, electrical contact with the system case is ensured, and the shielding effect of the conductive thin film is that the electromagnetic waves emitted from the lead wires are significantly suppressed by the action of the Faraday screen.
以上説明したように本発明は、パネルリード線を導電性
薄膜でシールドすることにより、フラットディスプレイ
パネルにおいて、パネルの駆動のための高周波のパルス
によって生ずる電磁波の抑制に膠著な低減効果がある。As explained above, the present invention has the effect of significantly reducing electromagnetic waves generated by high-frequency pulses for driving the panel in a flat display panel by shielding the panel lead wires with a conductive thin film.
また、パネルリード電極と導電性薄膜によって形成され
る静電容量が多い場合は、この導電性薄膜部とリード線
と接する部分の導電性薄膜部をスリット状に分離するこ
とにより、静電容量を低減し、電磁波に対してはファラ
デー効果を有するシールドスクリーンとなる効果を有す
る。In addition, if there is a large amount of capacitance formed by the panel lead electrode and the conductive thin film, the capacitance can be reduced by separating this conductive thin film part and the part of the conductive thin film in contact with the lead wire into a slit shape. It has the effect of acting as a shielding screen that has a Faraday effect against electromagnetic waves.
第１図は本発明の第１の実施例の斜視図、第２図は本発
明の応用例を示す縦断面図、第３図は本発明の第２の実
施例を示す斜視図、第４図は従来のフラットディスプレ
イパネルにおいて、パネルの斜視図である。
１・・・リード線、２・・絶縁層、３・・・導電性薄膜
、４・・・バックガラス、５・・カバーカラス、６・パ
ネルリード電極、７・り・ソシミン材、”１０・・回路
基板、１１・・・駆動回路素子、１２・・・シールドケ
ース、１３・・・システム筐体。FIG. 1 is a perspective view of a first embodiment of the present invention, FIG. 2 is a longitudinal sectional view showing an application example of the present invention, FIG. 3 is a perspective view of a second embodiment of the present invention, and FIG. The figure is a perspective view of a conventional flat display panel. DESCRIPTION OF SYMBOLS 1... Lead wire, 2... Insulating layer, 3... Conductive thin film, 4... Back glass, 5... Cover glass, 6... Panel lead electrode, 7. Socimin material, "10. - Circuit board, 11... Drive circuit element, 12... Shield case, 13... System housing.
Claims (1)
ラットディスプレイパネルにおいて、パネルの外周から
引出されている複数のリード電極に接続されている複数
のリード線の背面に絶縁層を介して導電性薄膜を設けた
ことを特徴とするフラットディスプレイパネル。In a flat display panel that uses discharge light emission, electroluminescence, or reflected/transmitted light, a conductive thin film is placed on the back of multiple lead wires connected to multiple lead electrodes drawn out from the outer periphery of the panel via an insulating layer. A flat display panel characterized by being provided with.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30771290A JP3038897B2 (en) | 1990-11-14 | 1990-11-14 | Flat display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP30771290A JP3038897B2 (en) | 1990-11-14 | 1990-11-14 | Flat display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04181634A true JPH04181634A (en) | 1992-06-29 |
| JP3038897B2 JP3038897B2 (en) | 2000-05-08 |
Family
ID=17972332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP30771290A Expired - Fee Related JP3038897B2 (en) | 1990-11-14 | 1990-11-14 | Flat display panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3038897B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000076924A1 (en) * | 1999-06-15 | 2000-12-21 | Sung Pil Ho | Cover glass for flat panel display device and method for manufacturing the same |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100118005A1 (en) * | 2007-05-21 | 2010-05-13 | Takashi Sasaki | Plasma display panel and plasma display device |
| KR102528184B1 (en) * | 2018-08-16 | 2023-05-02 | 삼성중공업 주식회사 | Damper for controlling air volume |
| KR102640401B1 (en) * | 2019-10-31 | 2024-02-23 | 삼성중공업 주식회사 | Fluid flow control damper for syphon |
-
1990
- 1990-11-14 JP JP30771290A patent/JP3038897B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000076924A1 (en) * | 1999-06-15 | 2000-12-21 | Sung Pil Ho | Cover glass for flat panel display device and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3038897B2 (en) | 2000-05-08 |
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