JPH04176095A - Semiconductor memory device - Google Patents

Abstract

PURPOSE:To increase the backup time of a battery and reduce a charging time by providing a judging controller for determining whether it is necessary to hold the data of a semiconductor memory circuit in the time of a backup and a hold judgment control circuit for actuating a backup circuit when required. CONSTITUTION:When backup is conducted, a hold judgment control circuit CPU 8 judges the necessity of the hold of the memories A and B of a semiconductor memory circuit, when unnecessary, the memories A and B are not held and, when necessary, they are held by operating a backup circuit 6. Thus, an electric power is not dissipated for holding data which may be erased to save electric power. Especially, when the memory of a semiconductor circuit is divided into a plurality of areas A and B are every area is made judge and control the necessity, the data can be held with the less electric power. Thus, a backup time can be increased and a charging time can be reduced.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a semiconductor memory device.

(Prior art) Magnetic disk devices, magneto-optical disk devices, magnetic tape devices, etc. are mainly used as external storage devices for computers, but as the amount of information increases and the data processing ability of combinators improves, There has been an increasing demand for external storage devices that have high-speed access, high-speed data transfer, and high reliability. Therefore, the storage media such as magnetic disks, magneto-optical disks, and magnetic tapes, which are the recording parts of magnetic disk devices, magneto-optical disk devices, and magnetic tape devices, are replaced with semiconductor memories that are capable of high-speed access and high-speed data transfer. A semiconductor disk device, which is a type of memory device, has been proposed.

Semiconductor memory includes volatile RAM and non-volatile RAM.
However, in terms of cost, non-volatile RAM is more expensive, and non-volatile RAM is more expensive than volatile RAM.
The access time is slower. Currently, most of the cost of semiconductor memory devices is RAM, and even when using cheap volatile RAM, its bit cost is nearly two digits higher than the bit cost of the external storage devices of other computers mentioned above. In reality, non-volatile RAM is rarely used due to its slow access time, and volatile RAM accounts for most of the usage, but non-volatile RAM and volatile Some devices use a single-chip RAM. When using volatile RAM in the storage section, it is necessary to perform bank up with a battery to retain data during power outages and during movement. The longer this backup can be performed, the more data can be retained during long-term power outages or long-term travel.

Below is one of the backup circuits of conventional semiconductor memory devices.
Give an example. In the diagram of FIG. 2, V is the applied voltage of the backup circuit, VI is the applied voltage of the circuit that does not need to supply power during backup, and VB is the applied voltage of the circuit that needs to be supplied with power during backup. 6 is a backup battery, and E is the terminal voltage of the 4-pull-up battery 6.

1.2.5 is a diode, diode 1.2 is for reducing the voltage of V to the circuit operating range voltages Vl and VB, and diode 5 is for preventing current from flowing back into the power supply during backup. It is for the purpose of 4,
9.10 is a resistor, resistor 4 is for regulating the charging current of the backup battery, and resistor 9.10 is for overcurrent prevention. 7 is a power supply voltage monitoring circuit, 16° 17.18 is a terminal of the power supply voltage monitoring circuit 7, 16 is a voltage detection terminal, 17 is a power supply voltage monitoring circuit power supply terminal, 18
is the reset terminal. The power supply monitoring circuit 7 sets the terminal voltage of the reset terminal 18 to the same voltage as the power supply terminal 16 when the voltage applied to the voltage detection terminal 16 is higher than the minimum operating voltage of the circuit, and becomes Ov when the voltage is lower than the circuit minimum operating voltage. It is set as follows. Reference numeral 11 denotes a transistor, which serves as a switch for supplying power to the backup battery 6 or not. Here, if the operating voltage range of the circuit is 4.5 to 5.5V, the backup battery 6
For example, four 1.2V voltages connected in series are used. In this case, in order for the backup battery 6 to complete charging, a voltage of approximately 6V must be applied to E, and in order to do so, the value of V must be set in consideration of the voltage drop across the resistor 4 and diode 5. No. Therefore, if ■ is applied directly to the circuit, it will exceed the circuit operating voltage range, so diode 1 is used to reduce V to the circuit operating range, which is the voltage Vl.
The diode 2 is used to set V to vlI. In the power supply monitoring circuit 7, vl is the monitoring voltage, and the power supply terminal 17 has a backup battery voltage E.
is applied, the power supply monitoring circuit 7 can operate normally even during backup. The power supply monitoring circuit 7 here operates satisfactorily even when a voltage of about 6V is applied to the power supply terminal 17. The circuit operation will be explained below.

During normal operation, that is, when a voltage is applied to V, Vl-VB is supplied with power from V through the diode 1.2, and in parallel, the backup battery 6e
Charging is performed using a current regulated by the resistor 4. Also,
Since a voltage within the circuit operating range is applied to Vl, the terminal voltage of the reset output terminal 18 outputs the same voltage as the power supply voltage monitoring circuit power supply terminal 17, so the transistor 11 is turned off and the current is Not flowing.

During backup when the voltage (2) becomes OV, the backup current does not flow backward, so the voltage of Vl becomes Ov. That is, when the voltage of Vl becomes lower than the circuit minimum operating voltage, the reset output terminal 18 becomes Ov, and the transistor 11 turns on, so power from the backup battery 6 is supplied through the transistor 11, and the voltage of VIl decreases. will maintain the circuit operating voltage.

(Problem to be Solved by the Invention) However, in the conventional configuration described above, the entire semiconductor memory circuit is backed up regardless of whether or not there is data that needs to be held in the semiconductor memory device. There is a problem in that the backup time remains unchanged even when there is no data that needs to be saved, and backup power is not effectively utilized.

The object of the present invention is to solve these problems, save memory according to the need for data storage, reduce unnecessary power consumption to achieve low power consumption, and extend battery backup time. Furthermore, it is an object of the present invention to provide a semiconductor memory device that can shorten battery charging time.

(Means for Solving the Problems) In order to solve the above problems, the present invention includes a judgment control unit that determines whether or not it is necessary to retain data in a semiconductor memory circuit at the time of backup, and also provides backup when necessary. It is equipped with a storage judgment control circuit that operates the circuit.

Alternatively, the memory section of the semiconductor memory circuit may be divided into a plurality of areas, the necessity of data storage may be determined and controlled for each area, and a storage command may be issued to the backup circuit for each area. Some backup circuits decide whether to save or erase data by supplying or not supplying power to each area of the semiconductor memory section.

Further, the determination control section of the storage determination control circuit may be configured to perform control based on the conditions of the output signal of the central processing circuit and the reset signal of the power supply monitoring circuit that is a constituent circuit of the backup circuit.

(Function) In the present invention, when backing up, the storage judgment control circuit judges the necessity of saving the memory part of the semiconductor memory circuit,
It does not store data when it is not necessary, and operates a backup circuit to store it when it is necessary. As a result, power is not consumed for storing data that can be erased in the memory, and power can be saved. In particular, if the memory section of a semiconductor memory circuit is divided into a plurality of areas and the necessity is determined and controlled for each area, data can be stored with lower power consumption.

In addition, in the present invention, the semiconductor memory circuit is divided into a plurality of areas, and it is determined whether the area of the memory part of the semiconductor memory circuit needs to hold data at the time of backup by outputting a signal from the central processing unit and controlling the area of the backup circuit. By using a semiconductor memory device that is equipped with a function that is controlled by the reset terminal output of the power supply monitoring circuit that is the component circuit, it is effective even when there is little data that needs to be held or when there is no data that needs to be held. By using backup power, the backup time can be extended, and when recharging after canceling the backup, less backup power is used than before, so the charging time until charging is completed is shortened. This is something that can be achieved.

(Example) Hereinafter, the circuit of this example will be explained based on the drawings. FIG. 1 shows the circuit configuration of this embodiment. The same numbers in FIG. 1 and FIG. 2 indicate the same thing.

In this embodiment, the memory section of the semiconductor memory circuit is divided into two areas, which will be referred to as memory A and memory B, respectively. V■ is the applied voltage to circuits other than the RAM that need to be supplied with power during backup, Vla is the applied voltage to memory A of the memory divided into two, and vlIb is the applied voltage to memory B. The diodes 3a and 3b are
This is to reduce the normal voltage (2) to the divided memory within the circuit operating range and set it to Via-Vlb. 8
19 is the CPU that controls all the control of the semiconductor memory, and 19 is the power supply terminal of the CPU 8 connected to vII L-(
20.21i: This is the signal output terminal of the CPU8. 12a and 12b are positive OR circuits. The positive OR circuit 12a has a reset terminal 18 of the power monitoring circuit 7 and a C
The signal output 20 of the PU8 is input, and the positive OR circuit 12
b, the reset terminal 18 of the power supply monitoring circuit 7 and the CPU
8 signal outputs 21 are input. Hereinafter, the circuit operation in the present invention will be explained.

During normal operation, VI7)! If the voltage is within the circuit operating range, the reset terminal 18 of the power supply voltage monitoring circuit 7
Since the terminal voltage is the same as that of the power supply monitoring circuit power supply terminal 17, the transistors 15a and 15b are OFF and no current flows, and power is supplied to VII, Via, and Vl[b through the diodes 2.3a and 3b. It is done. Further, the backup battery 6 is also charged as in the conventional case.

During backup, VI becomes lower than the minimum operating voltage of the circuit, so the reset output 18 of the power supply monitoring circuit 7 becomes O.
V is output, the transistor 11 is turned on, and power from the backup battery 6 is supplied to vn through the transistor 11, thereby allowing the control circuit that requires power supply to operate during backup. At that time, since the input terminal connected to the reset terminal 18 is Ov, the output of the positive OR circuits 12a, 12b depends on the voltage state of the output signal terminals 20 and 21 of the CPU 8, which is the other input terminal. Voltage changes.

If the output signal terminals 20 and 21 are respectively Ov, the output voltage of the positive OR circuits 12a and 12b is OV, the transistors 15a and 15b are turned on, and the output voltage is V.
A circuit operating voltage is applied to la and Vlb, and data in memory A and memory B is held. Also, CPU
If the output signal terminals 20 and 21 of the CPU 8 are at the same potential as the power supply voltage terminal 19 of the CPU 8, the positive OR circuit 12a,
The output voltage of 12b becomes the same potential as E. That is, transistors 15a and 15b are turned off, and Vlla
, Vlb, the data in memory A and memory B will be lost. In this way, the CPU
By changing the signal outputs 20 and 21 of 8, it is possible to set whether or not to hold data in some of the divided RAMs.

Here, we will compare the backup time with the conventional example. For example, it is backed up by a 400 mAh backup battery 6. If the power consumption of the RAM is 2000 mW and the power consumption in the circuit section is 10100 O, then in the conventional example, the total power consumption is 0, and the total power consumption is 3000 mW. In this example, R
If the AM is divided into two parts and power is supplied to only one of them, the power consumption of the RAM is 10100O, and the total power consumption is 2
000mW. FIG. 3 shows the discharge voltage characteristics in the conventional and this embodiment under the above conditions. The vertical axis in Figure 3 is v
The horizontal axis of the voltage of n is the discharge time. If the minimum operating voltage of the circuit is 4.5V, the backup time that was conventionally 6.5 hours becomes 10 hours in this embodiment. Furthermore, if a backup circuit is used that regulates the charging current so that the backup battery 6 is completely charged from an empty state in 20 hours, and if the backup is performed for 6.5 hours under the above conditions after charging is completed, the conventional It takes 20 hours to complete recharging, but in the present invention, it takes 1 hour to complete recharging.
3.3 hours would be enough.

In this embodiment, the memory is divided into two parts, but it goes without saying that the same result can be obtained no matter how many parts the memory is divided into.

(Effects of the Invention) In the present invention, the semiconductor memory circuit is backed up according to the need for memory storage, so power consumption for backup can be reduced. Further, there is an advantage that the backup time can be extended and the charging time can be shortened. Also RA
A function that divides M into multiple areas and controls whether or not it is a RAM area that requires power supply using the CPU signal output and the reset terminal output of the power supply monitoring circuit that is a component of the backup circuit. As a result of this, effective backup power can be used even when there is little data that needs to be held or when there is no data that needs to be held, and the bank-up time can be further extended. In addition, when recharging after canceling the backup, less backup power is used than before, so the charging time until charging is completed can be shortened, which has a great practical effect. .

BRIEF DESCRIPTION OF THE DRAWINGS The first @ is a circuit diagram showing a semiconductor memory device according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing a conventional semiconductor memory device. FIG. 3 shows the release i! of the semiconductor memory device of the conventional example and the present invention. It is an explanatory view showing pressure characteristics. 6: Backup circuit 7: Power supply monitoring circuit 8: Central processing circuit 12a, 12b: Positive OR circuit 11.13a, 13b: ) Transistor 20.21:
Central processing circuit signal output VI: Applied voltage of circuits that do not require power supply during backup vn: Applied voltage of circuits that require power supply during backup Via: Applied voltage of memory A■2 Applied voltage of memory B■ 2 Applied voltage patent for backup circuit Applicant: Matsushita Electric Industrial Co., Ltd.

Claims (1)

[Scope of Claims] 1) A data storage semiconductor memory circuit that stores data and a backup circuit, and a judgment control unit that determines whether or not it is necessary to retain data in the semiconductor memory circuit at the time of backup. What is claimed is: 1. A semiconductor memory device comprising: a storage determination control circuit which operates a backup circuit when necessary. 2) A request for dividing the memory section of the semiconductor memory circuit into a plurality of areas, and for the storage determination control circuit to determine and control the necessity of storage for each area of the memory section of the semiconductor memory circuit, and to issue an operation command to the backup circuit. 2. The semiconductor memory device according to item 1. 3) A claim in which the backup circuit stores or non-saves data by supplying power to an area of the memory section of the semiconductor memory circuit that retains data during backup and not supplying power to an area that does not retain data. 2. The semiconductor memory device according to 2. 4) Claim 1 in which the judgment control section of the storage judgment control circuit performs control based on the conditions of the output signal of the central processing circuit and the reset signal of a power supply monitoring circuit that is a constituent circuit of the backup circuit.
3. The semiconductor memory device according to any one of 3 to 3.