JPH04168668A - Equalization control apparatus - Google Patents

Abstract

PURPOSE:To control a stable equalization operation even when the signal spectrum of a replayed signal becomes one-sided by providing the following: a gain-variable means by which an amplification degree with reference to the replayed signal is controlled; a frequency characteristic-variable means; a relative-speed detection means; and a control-signal generation circuit. CONSTITUTION:The following are provided: a gain-variable means by which an amplification degree with reference to a replayed signal is controlled by using a control signal; a frequency characteristic-variable means 8 by which a frequency characteristic with reference to the replayed signal is controlled; a relative-speed detection means 12 which detects the relative speed of a recording medium 1 and replay pickups 3; and a control-signal generation means 13 which generates a control signal which is given to the gain-variable means and the frequency characteristic-variable means according to the relative speed. The relative speed is operated 12 on the basis of the number 10 of revolutions of a drum and a control signal 4, and an equalization control operation according to an operated output signal is performed. Thereby, a stable equalization operation can be always performed without being affected by a replayed signal spectrum.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an equalization control device for receiving and reproducing digital signals in a system where the main fluctuation is distortion in the amplitude direction, such as a digital magnetic recording and reproducing device. .

BACKGROUND OF THE INVENTION In recent years, various algorithms have been proposed for automatic equalization of equalization control devices, and some of these algorithms use a pointed type as an evaluation standard. However, in both methods, the correlation between the equalized signal and the quantized or identified signal amplitude is determined for each tap of the transversal filter.

As a conventional equalization control device, for example, Japanese Patent Application Laid-Open No. 1-253
It is disclosed in Japanese Patent No. 874.

A conventional equalization control device will be explained below.

FIG. 8 is a block diagram showing a conventional equalization control device.

FIG. 9 shows the high frequency range of the equalization controller 25 shown in FIG.

FIG. 3 is a frequency spectrum diagram showing a low-frequency signal comparison band.

In the figure, the hatched portion diagonally to the left indicates the low frequency signal comparison band of the equalization controller, and the hatched portion diagonally to the right indicates the high frequency signal comparison band of the equalization controller.

In Fig. 8, 1 is a recording medium for recording data, 3 is a playback head for reproducing data from the recording medium 1, 5 is a playback amplifier that amplifies a minute playback signal, and 6 is an integral that compensates for the characteristics of the recording/playback system. 9 is an equalization unit that compensates for code amount interference of the reproduced signal generated by the recording/reproducing system; 14 is a low-pass filter (hereinafter abbreviated as LPF) that limits the band of the signal; and 15 is a quantizer for the reproduced signal. 25 is an equalization controller 17 which determines the optimum equalization amount from the reproduced signal and quantized data at the input/output points of the quantizer 15 and supplies it to the equalization section 9;
is a clock recovery P that recovers a clock from quantized data.
The LL circuit 16 is a discriminator that latches quantized data at the cycle of the clock reproduced by the clock recovery PLL circuit 17.

The operation of the equalization control device configured as above will be explained below. Data recorded on the recording medium 1 is reproduced by the reproduction head 3, amplified by the reproduction amplifier 5, compensated for the differential characteristics of the recording and reproduction system by the integrator 6, and then supplied to the equalization section 9. The equalization unit 9 performs optimal equalization under the control of the equalization controller 25 to compensate for code amount interference of the reproduced signal caused by the influence of the recording/reproducing system. Optimal equalization means maximizing the eye aperture ratio of the eye pattern of the reproduced signal. The equalization controller 25 converts the reproduced signal from the equalizer 9 and the quantized data obtained by quantizing the reproduced signal by the quantizer 15 into each signal band indicated by hatching in FIG. The signal energies are separated and compared, and the equalizer 9 is controlled so that equalization is optimized. Optimally equalized, L P F
14, the quantized data is supplied to a clock recovery PLL circuit 17 and a discriminator 16 for identification, and then supplied to a subsequent decoding circuit (not shown).

Problems to be Solved by the Invention However, in the above conventional configuration, when a signal in which the signal spectrum of the reproduced signal is concentrated at one point is reproduced, the operation of the equalization controller 25 becomes unstable, and the equalization section 9 However, there was a problem in that the control was performed incorrectly. For example, when the shortest recording cycle is fm/4, if the period of the shortest recording cycle is to be reproduced for a long time, the high frequency of the equalization controller 25 will change as shown in FIG. The signal spacing only exists in the signal comparison band, making it impossible to compare with the target value that the equalization controller 25 has in advance for equalization control, and the equalization controller 25 Since it is determined that the signal is missing and a control signal is applied to the equalizer 9 to increase the low-frequency gain, the feedback loop ends up in an oscillating state.

The present invention solves the above-mentioned conventional problems, and is an equalization control device equipped with a control means that can perform stable equalization even if the signal spectrum of the reproduced signal is biased within the signal band on the reproduction side. The purpose is to provide equipment.

Means for Solving the Problems To achieve this object, the equalization control device of the present invention includes variable gain means in which the degree of amplification for the reproduced signal is controlled by a control signal, and a frequency characteristic for the reproduced signal controlled by the control signal. A frequency characteristic variable means to be controlled, a relative speed detection means for detecting the relative speed of the recording medium and the reproduction pickup, and a control signal to be applied to the gain variable means and the frequency characteristic variable means according to the detected relative speed. and control signal generating means.

Effect of the present invention With the above-described configuration, the control signal generating means calculates and controls the gain variable means according to the relative speed from the relative speed signal detected by the relative speed detecting means to the frequency characteristic variable means. Stable equalization control can be performed without being affected by the signal spectrum.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an equalization control device in one embodiment of the present invention. FIG. 4 is a reproduced signal spectrum diagram with respect to the relative speed in part A of FIG. 1.

FIG. 5 is a reproduced signal spectrum diagram with respect to the relative speed in portion B of FIG. 1. Figure 6 shows the relative velocity calculator 1 in Figure 1.
FIG. 2 is a characteristic diagram showing the calculation output with respect to the relative speed at No. 2; FIG. 7 is a diagram showing the characteristics of the control signal applied to the equalization section 9 by the equalization controller 13 of FIG. 1 with respect to the relative speed.

In FIG. 1, 1 is a recording medium for recording data, 2 is a rotating drum that rotates at high speed, 3 is a playback head that plays back data from the recording medium 1, and 4 is a playback control signal recorded on the recording medium 1. control head, 5
6 is an integrator that compensates for the characteristics of the recording/reproducing system; 7 is an amplitude variable device that uses a control signal to control the amplitude of the playback signal; and 8 is a frequency characteristic variable device that uses a control signal. A frequency characteristic variable device 9 is an amplitude variable device 7 that compensates for the code amount interference of the reproduction signal generated by the recording and reproduction string.
and a frequency characteristic variable device 8; 10 is a drum rotation speed detector for detecting the rotation speed of the rotating drum 2;
1 is an amplifier for amplifying the playback control signal from the control head 4; 12 is the drum rotation speed detector 10 and the playback control signal from the recording medium 1 and the playback head 3;
13 is an equalization controller that controls the amplitude variable device 7 and the frequency characteristic variable device 8 for optimal equalization from the calculation results of the relative speed calculation device 12; 14; is a low-pass filter that limits the signal band; 15
17 is a quantizer that quantizes the reproduced signal; 17 is a clock recovery PLL circuit that recovers a clock from the quantized data; 16
is a discriminator that latches quantized data at the cycle of the clock reproduced by the clock reproduction PLL circuit 17.

The operation of the equalization control device of this embodiment configured as described above will be described below with reference to FIGS. 4 to 7. Data recorded on the recording medium 1 is reproduced by the reproduction head 3, amplified by the reproduction amplifier 5, compensated for the differential characteristics of the recording and reproduction system by the integrator 6, and then supplied to the equalization section 9. The equalization unit 9 performs optimal equalization under the control of the equalization controller 13 to compensate for code amount interference of the reproduced signal caused by the influence of the recording/reproducing system. Here, when the relative speed between the recording medium 1 and the reproducing head 3 changes, the reproduced signal spectrum from the reproducing head 3 changes as shown in FIG. In order to perform optimal equalization following changes in relative speed, the relative speed calculator 12 calculates the control signal reproduced by the drum rotation speed detector 10 and the control head 4, and
The relative velocity signal shown in the figure is supplied to the equalization controller 13. The equalization controller 13 uses the relative speed signal from the relative speed calculator 12 to control the equalizer 9 with each control signal characteristic shown in FIG.
The amplitude variable device 71 and the frequency characteristic variable device 8 are controlled to perform optimal equalization as shown in FIG. The optimally equalized reproduced signal is band-limited by the LPF 14 and then supplied to the quantizer 15. The quantized data quantized by the quantizer 15 is supplied to a clock recovery PLL circuit 17 and a discriminator 16 for identification, and then supplied to a subsequent decoding circuit (not shown).

As described above, according to this embodiment, by calculating the relative speed from the drum rotation speed and the control signal and performing equalization control according to the calculation output signal, it is not affected by the reproduced signal spectrum (always stable). equalization can be performed.

FIG. 2 is a block diagram showing a first embodiment of the equalization controller 13 of FIG. 1. In the figure, 18 is a first operational amplifier, R1 and R2 are resistors that together with the first operational amplifier 18 determine the degree of amplification, and VRl is the first operational amplifier 18.
19 is a variable resistor for adjusting the offset of the output of the second
R3 and R4 are the second operational amplifier 19
A resistor VH2 which also determines the degree of amplification is a variable resistor which adjusts the offset of the output of the second operational amplifier 19.

The operation of the controller configured as described above will be described below. The relative speed signal having the characteristics shown in FIG.
, the output of the first operational amplifier 18 becomes the characteristic shown by the solid line in FIG. In addition, the output of the second operational amplifier 19 is connected to resistors R3, R4 and variable resistor V.
R2 results in the characteristic shown by the dashed dotted line in FIG. 7, and controls the frequency characteristic variable device 8.

As described above, according to this embodiment, optimum equalization control characteristics can be easily achieved by using an operational amplifier, and the circuit scale can also be miniaturized.

FIG. 3 is a block diagram showing a second embodiment of the equalization controller 13 of FIG. 1. In the same figure, 20 is the input signal n
21 is an analog/digital converter (hereinafter referred to as ADC) that converts into bit digital data; and 21 is a first read-only memory (hereinafter referred to as RO) that outputs digital value control data corresponding to input n-bit digital data.
22 is a first digital/analog converter (hereinafter referred to as DAC) that converts digital data to analog.
23 is a second RO that outputs digital value control data corresponding to input n-bit digital data.
M124 is the second converter that converts digital data to analog.
This is a DAC.

The operation of the equalization controller configured as described above will be described below. The relative velocity signal having the characteristics shown in FIG. 6 is converted into n-bit digital data by the ADC 21 and stored in the first ROM 21. The data is supplied to the second ROM 23. The first ROM 21 stores digital value control data in advance so as to have the characteristics shown by the solid line in FIG. 7, and supplies the first DAC 22 with digital value control data corresponding to the input digital data. 1st DAC2
The control signal converted to analog in step 2 is supplied to an amplitude variable device 7 for control. The second ROM 23 stores digital value control data in advance so as to have the characteristics shown by the dashed line in FIG. 7, and supplies the second DAC 24 with digital value control data corresponding to the input digital data. The control signal converted into analog by the second DAC 24 is supplied to the frequency characteristic variable device 8 for control.

As described above, according to this embodiment, the control characteristic data for relative speed is stored in the ROM, and the relative speed signal is
By reading out DC digital data, even if the optimum equalization characteristic for relative speed is not linear and is complex, the digital value control data in the ROM can be stored to match the optimum equalization characteristic. Easy and fine-grained equalization control can be performed.

Effects of the Invention As described above, the present invention provides variable gain means (amplitude variable device 7) whose amplification degree for the reproduced signal is controlled by a control signal, and frequency characteristic variable means whose frequency characteristic for the reproduced signal is controlled by the control signal. (frequency characteristic variable device 8), relative speed detection means (relative speed calculator 12) that detects the relative speed of the recording medium (1) and the reproducing pickup (reproducing head "3"), and By providing the gain variable means and the control signal generating means (equivalent controller 13) that generates a control signal to be applied to the frequency characteristic variable means, the V
TR-2 - Always keep the gain variable means and frequency characteristic variable means in the optimum state even if the reproduced signal is interrupted due to bed switching or when the reproduced signal is lost due to crossing tracks during special playback or high-speed playback. Since the clock recovery PLL circuit and the discriminator in the subsequent stage can be controlled stably, it is possible to reduce the rate of misidentification, and this has a great practical effect.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an equalization control device in an embodiment of the present invention, FIG. 2 is a block diagram showing the internal configuration of the equalization controller 13 in the first embodiment of FIG. 1, and FIG. 3
The figure is a block diagram showing the internal configuration of the second embodiment of the equalization controller 13 in FIG. Figure 6 is a characteristic diagram showing the calculated output for relative velocity in the relative velocity calculator 12 in Figure 1. Figure 7 is the equalization control diagram in Figure 1. 8 is a block diagram showing the configuration of a conventional equalization control device, and FIG. 9 is the same as that in FIG. 8. 3 is a frequency spectrum diagram showing high-frequency and low-frequency signal comparison bands of the conversion controller 25. FIG. 1... Recording medium, 3... Playback head, 4...
Controller head, 7... Amplitude variable device, 8.
... Frequency characteristic variable device, 9... Equalization section, 10...
・Drum rotation speed detector, 12... Relative speed calculator, 13... Equalization controller. Name of agent: Patent attorney Akira Okaji and two others Figure 2 t Figure 3 2/ff Figure 4 Figure 6 Hatou Figure 7 Figure 8 Figure 9 j-v4

Claims (3)

[Claims] (1) Gain variable means whose amplification degree for the reproduced signal is controlled by a control signal; Frequency characteristic variable means whose frequency characteristic for the reproduced signal is controlled by the control signal; and detecting the relative speed of the recording medium and the reproduction pickup. An equalization control device comprising: relative speed detection means; and control signal generation means for generating a control signal to be applied to the gain variable means and the frequency characteristic variable means in accordance with the detected relative speed. (2) Claim 1, wherein the control signal generation means is constituted by analog calculation means that calculates the relative speed signal and generates the control signal.
Equalization control device as described. (3) The control signal generation means includes an analog/digital conversion means that converts a relative speed signal into a digital signal, and a digital value control signal that converts the digitalized relative speed signal into an equalization characteristic according to the relative speed. 2. The equalization control device according to claim 1, comprising digital value control signal converting means for converting the digital value control signal and digital/analog converting means for converting the digital value control signal into an analog value control signal.