JPH04168546A - Memory control method in computer system - Google Patents

Memory control method in computer system

Info

Publication number
JPH04168546A
JPH04168546A JP29615990A JP29615990A JPH04168546A JP H04168546 A JPH04168546 A JP H04168546A JP 29615990 A JP29615990 A JP 29615990A JP 29615990 A JP29615990 A JP 29615990A JP H04168546 A JPH04168546 A JP H04168546A
Authority
JP
Japan
Prior art keywords
address
memory
computer system
conversion
function expansion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29615990A
Other languages
Japanese (ja)
Inventor
Seiichi Kanai
誠一 金井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HOKKAIDO NIPPON DENKI SOFTWARE KK
NEC Solution Innovators Ltd
Original Assignee
HOKKAIDO NIPPON DENKI SOFTWARE KK
NEC Software Hokkaido Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HOKKAIDO NIPPON DENKI SOFTWARE KK, NEC Software Hokkaido Ltd filed Critical HOKKAIDO NIPPON DENKI SOFTWARE KK
Priority to JP29615990A priority Critical patent/JPH04168546A/en
Publication of JPH04168546A publication Critical patent/JPH04168546A/en
Pending legal-status Critical Current

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  • Storage Device Security (AREA)

Abstract

PURPOSE:To protect the memory of a computer system, and also, to avoid the deterioration of the memory use efficiency caused by a fractionalization phenomenon of the memory by referring to an address converting information store means and converting an address signal for generating a function extension board. CONSTITUTION:An address signal generated by a function extension board 1b connected to a computer system passes through an address converting means 1d and is converted to an address 1f for referring to a memory of the computer system. In this case, the address converting means 1d refers to an address converting information store means 1e, and obtains information required for the conversion. In such a way, in the case an address before conversion which is not stored in the address converting information store means 1e is designated, an address converting operation is stopped, and a fact that abnormality is generated is informed to the computer system, therefore, the memory of the computer system can be protected from a memory breakdown caused by a malfunction of the function extension board 1b. Also, deterioration of the memory use efficiency caused by a fractionalization phenomenon of the memory can be avoided.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は計算機システムのメモリ制御方式に関し、特に
機能拡張用ボードを接続する計算機システムにおいて、
機能拡張用ボードから参照できる計算機システムのメモ
リ制御方式に関するものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a memory control method for a computer system, and particularly to a computer system to which a function expansion board is connected.
This paper relates to a memory control method for a computer system that can be referenced from a function expansion board.

〔従来の技術〕[Conventional technology]

一般に、計算機システムの機能を拡張するためには、機
能拡張用ボードを接続する。このとき、機能拡張用ボー
ドは計算機システムのメモリを使用するため、計算機シ
ステムは機能拡張用ボードが使用するメモリを制限・管
理する必要がある。
Generally, in order to expand the functions of a computer system, a function expansion board is connected. At this time, since the function expansion board uses the memory of the computer system, the computer system needs to limit and manage the memory used by the function expansion board.

従来の技術では、機能拡張用ボードを接続する計算機シ
ステムにおいて、計算機システムのメモリを参照・更新
する機能拡張用ボードに対するメモリ保護手段は存在せ
ず、計算機システムのメモリが直接参照できるため、不
法なメモリ参照・更新に弱かった。
In the conventional technology, in the computer system to which the function expansion board is connected, there is no memory protection means for the function expansion board that refers to and updates the memory of the computer system, and the memory of the computer system can be directly referenced, making illegal illegal activities possible. Weak against memory references and updates.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のメモリ制御方式では、機能拡張用ボードに対して
メモリ保護方式が存在しなかった。このため、機能拡張
用ボードの誤動作による計算機システムのメモリ破壊に
対するメモリ保護手段がないという欠点がある。また、
従来のメモリ制御方式では、メモリの細分化現象により
、機能拡張用ボードが要求した連続メモリ空間の確保が
難しいという欠点がある。
In conventional memory control systems, there was no memory protection system for function expansion boards. Therefore, there is a drawback that there is no memory protection means against memory corruption in the computer system due to malfunction of the function expansion board. Also,
Conventional memory control methods have the disadvantage that it is difficult to secure the continuous memory space required by the function expansion board due to the phenomenon of memory fragmentation.

本発明の目的は、以上の欠点を解決し、機能拡張用ボー
ドの誤動作による計算機システムのメモリ破壊に対する
メモリの保護、およびメモリの細分化現象によるメモリ
使用効率低下を回避するというメモリ制御方式が得られ
る。
An object of the present invention is to solve the above-mentioned drawbacks and to provide a memory control method that protects memory from memory corruption in a computer system due to malfunction of a function expansion board and avoids a decrease in memory usage efficiency due to memory fragmentation. It will be done.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、機能拡張用ボードが発生するメモリのアドレ
スを計算機システムのメモリのアドレスに変換するアド
レス変換手段と、そのアドレス変換機構が、機能拡張用
ボードが発生するメモリのアドレスを計算機システムの
メモリのアドレスに変換する時に使用するアドレス変換
情報格納手段とを有する。
The present invention provides an address conversion means for converting a memory address generated by a function expansion board into a memory address of a computer system, and an address conversion mechanism that converts a memory address generated by a function expansion board into a memory address of a computer system. address conversion information storage means used when converting the address into an address.

〔実施例〕〔Example〕

次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図は、本発明の一実施例を示す。第1図において、
本発明の一実施例は計算機システムのメモリla、機能
拡張用ボードlb、計算機システムと機能拡張用ボード
を接続するシステムバスlc、アドレス変換手段1dお
よびアドレス変換に使用する情報を複数個格納するため
のアドレス変換情報格納手段1eを含む。
FIG. 1 shows one embodiment of the invention. In Figure 1,
One embodiment of the present invention includes a memory la of a computer system, a function expansion board lb, a system bus lc for connecting the computer system and the function expansion board, an address conversion means 1d, and a memory for storing a plurality of pieces of information used for address conversion. address translation information storage means 1e.

計算機システムに接続された機能拡張用ボード1bが発
生したアドレス信号は、アドレス変換手段1dを経由し
て計算機システム1fのメモリを参照するためのアドレ
スに変換される。このとき、アドレス変換手段1dは、
アドレス変換情報格納手段1eを参照し、変換に必要な
情報を取得する。
An address signal generated by the function expansion board 1b connected to the computer system is converted to an address for referencing the memory of the computer system 1f via the address conversion means 1d. At this time, the address conversion means 1d
The address conversion information storage means 1e is referred to and information necessary for conversion is acquired.

第2図は、第1図の一実施例の一部1hを詳細に示した
ものである。機能拡張用ボードが発生したアドレス信号
(変換前アドレス(2a))はアドレス変換機構(2b
〉により計算機システムのメモリを示すアドレス信号(
変換後アドレス(2c))に変換される。このとき、ア
ドレス変換手段(2b)はアドレス変換情報格納手段(
2d)に格納されている情報を使用してアドレスを変換
する。このアドレス情報変換方式として次のような計算
式を用いた方法をとる。
FIG. 2 shows a part 1h of the embodiment shown in FIG. 1 in detail. The address signal (pre-conversion address (2a)) generated by the function expansion board is sent to the address conversion mechanism (2b).
〉, the address signal indicating the memory of the computer system (
It is converted to the converted address (2c)). At this time, the address translation means (2b) is the address translation information storage means (
2d) Translate the address using the information stored in . As this address information conversion method, a method using the following calculation formula is used.

変換後アドレス =変換前アドレスー変換前基準アドレス+変換後基準ア
ドレス 第2図に示す例では、まず、アドレス変換手段(2b)
に変換前アドレスとして機能拡張用ボードからアドレス
信号(変換前アドレス)ooo。
Post-conversion address = pre-conversion address - pre-conversion reference address + post-conversion reference address In the example shown in FIG. 2, first, address conversion means (2b)
The address signal (pre-conversion address) ooo is sent from the function expansion board as the pre-conversion address.

11345 (2a)が渡される。アドレス変換手段(
2b)は機能拡張用ボード(1b)が発生した変換前ア
ドレス000011245 (2a)が、アドレス変換
情報格納手段(2d)が持つアドレス変換情報のどのエ
ントリに相当するかをサーチする0本例ではエントリN
IL2が変換前アドレス000012345 (2a)
に関する変換情報を格納している。
11345 (2a) is passed. Address conversion means (
2b) is a search for which entry in the address translation information held by the address translation information storage means (2d) corresponds to the pre-conversion address 000011245 (2a) generated by the function expansion board (1b). N
IL2 is address before conversion 000012345 (2a)
Stores conversion information regarding.

次にアドレス変換手段(2b)は、前述の計算式によっ
てアドレス変換を行なう、この結果、変換前アドレス0
00012345 (2a)は次のように変換される。
Next, the address conversion means (2b) performs address conversion according to the above-mentioned calculation formula, and as a result, the address before conversion is 0.
00012345 (2a) is converted as follows.

+ 200000000  =  200002345
このように、アドレス変換手段(2b)を使用して、機
能拡張用ボード(1b)が発生したアドレス信号(変換
前アドレス(2a))は変換後アドレス(2C)に変換
される。この際、アドレス変換情報格納手段(2b)に
格納されていない変換前アドレスを指定した場合は、ア
ドレス変換動作を停止し、異常が発生したことを計算機
システムに通知することにより、計算機システムのメモ
リは機能拡張用ボードの誤動作によるメモリ破壊から保
護されることになる。
+ 200000000 = 200002345
In this way, the address signal (pre-conversion address (2a)) generated by the function expansion board (1b) is converted into the post-conversion address (2C) using the address conversion means (2b). At this time, if a pre-conversion address that is not stored in the address conversion information storage means (2b) is specified, the address conversion operation is stopped and the computer system is notified that an abnormality has occurred, so that the computer system memory will be protected from memory corruption due to malfunction of the function expansion board.

またアドレス変換情報格納手段(2b)が持つアドレス
変換情報を、複数の細分化したテーブルとすることによ
り、機能拡張用ボード(1b)が必要とするメモリを、
計算機システムのメモリの任意の位置に割り当てること
ができるという柔軟性も提供する。また本発明は、複数
CPUで計算機システムを構築する場合などに大きな効
果を持つものである。
In addition, by making the address conversion information held by the address conversion information storage means (2b) into a plurality of subdivided tables, the memory required by the function expansion board (1b) can be reduced.
It also provides the flexibility of being able to be allocated to any location in the computer system's memory. Furthermore, the present invention has great effects when a computer system is constructed using multiple CPUs.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、機能拡張用ボードの誤動
作による計算機システムのメモリ破壊に対するメモリ保
護機能メモリの細分化現象によるメモリ使用効率を向上
させるという効果がある。
As described above, the present invention has the effect of improving the efficiency of memory use due to the phenomenon of fragmentation of memory with a memory protection function against memory corruption in a computer system due to malfunction of a function expansion board.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す図、第2図は第1図の
破線で囲まれた部分(1f)の詳細を示す図である。 1a・・・計算機システムのメモリ、1b・・・機能拡
張用ボード、IC・・・計算機システムのメモリと機能
拡張用ボードを接続するシステムバス、1d・・・アド
レス変換手段、1e・・・アドレス変換手段が使用する
情報を格納するアドレス変換情報格納手段、1f・・・
計算機システムのメモリを参照更新するための変換前ア
ドレス、1g・・・1fを変換した後の変換後アドレス
、lj、lk、1m・・・計算機システムのメモリ(1
a)中の細分化された一部分、2a・・・計算機システ
ムのメモリを参照更新するための変換前アドレス、2b
・・・アドレス変換手段、2c・・・2aを変換した後
の変換後アドレス、2d・・・2aを変換するための情
報を格納しているアドレス変換情報格納手段。
FIG. 1 is a diagram showing one embodiment of the present invention, and FIG. 2 is a diagram showing details of a portion (1f) surrounded by a broken line in FIG. 1. 1a...Memory of the computer system, 1b...Function expansion board, IC...System bus connecting the memory of the computer system and the function expansion board, 1d...Address conversion means, 1e...Address Address conversion information storage means for storing information used by the conversion means, 1f...
Address before conversion for referencing and updating the memory of the computer system, 1g... Address after conversion after converting 1f, lj, lk, 1m... Memory of the computer system (1
A subdivided part of a), 2a... pre-conversion address for referencing and updating the memory of the computer system, 2b
. . . address conversion means, 2c . . . converted address after converting 2a, and address conversion information storage means storing information for converting 2d . . . 2a.

Claims (1)

【特許請求の範囲】[Claims] 機能拡張用ボードを使用する計算機システムにおいて、
機能拡張用ボードが発生するメモリのアドレスを計算機
システムのメモリのアドレスに変換するアドレス変換手
段と、前記アドレスの変換手段が、機能拡張用ボードが
発生するメモリのアドレスを計算機システムのメモリの
アドレスに変換する時に使用するアドレス変換情報格納
手段とを含むことを特徴とする計算機システムにおける
メモリ制御方式。
In computer systems that use function expansion boards,
an address conversion means for converting a memory address generated by the function expansion board into a memory address of the computer system; and an address conversion means for converting a memory address generated by the function expansion board into a memory address of the computer system. 1. A memory control method in a computer system, comprising: address conversion information storage means used during conversion.
JP29615990A 1990-10-31 1990-10-31 Memory control method in computer system Pending JPH04168546A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29615990A JPH04168546A (en) 1990-10-31 1990-10-31 Memory control method in computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29615990A JPH04168546A (en) 1990-10-31 1990-10-31 Memory control method in computer system

Publications (1)

Publication Number Publication Date
JPH04168546A true JPH04168546A (en) 1992-06-16

Family

ID=17829924

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29615990A Pending JPH04168546A (en) 1990-10-31 1990-10-31 Memory control method in computer system

Country Status (1)

Country Link
JP (1) JPH04168546A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014517376A (en) * 2011-04-29 2014-07-17 北京中天安泰信息科技有限公司 Secure data storage method and device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014517376A (en) * 2011-04-29 2014-07-17 北京中天安泰信息科技有限公司 Secure data storage method and device
US9330266B2 (en) 2011-04-29 2016-05-03 Antaios (Beijing) Information Technology Co., Ltd. Safe data storage method and device

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