JPH04167014A - Power backup circuit for microcomputer - Google Patents

Abstract

PURPOSE:To secure a constant, sufficiently-long backup time regardless of whether a load is driven or not by turning on a Zener diode with the voltage of a backup capacitor for a watch dog timer circuit which is separated from the load. CONSTITUTION:A watch dog pulse transmitting circuit is connected to the backup capacitor C2 for the watch dog timer circuit IC1 to hold the Zener diode ZD1 ON. Namely, the backup capacitor C2 for the watch dog timer circuit IC1 which holds the Zener diode ZD1 in the conducting state is separated from the load, so even if a power failure occurs, its voltage drop is slow and the watch dog timer circuit IC1 outputs no reset signal, so that the microcomputer MC continues to operate. This backup state is maintained until the voltage across the backup capacitor C2 drops below the Zener voltage. Consequently, the microcomputer is given the nearly constant, sufficiently long backup time regardless of whether the load is driven or not.

Description

DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to a power hack circuit for a microcomputer equipped with a watchdog timer circuit.

<Prior Art> Figure 2 shows a conventional example of a power backup circuit for a microcomputer.

In Figure 2, 2 is a commercial power supply, 4 is a full-wave rectifier circuit composed of a diode bridge, C1 is a smoothing capacitor, ICI is a watchdog timer circuit composed of an integrated circuit, Ql is a power transistor, and C2 is a watchdog. MC is a microcomputer backup capacitor, C3 is a microcomputer backup capacitor,
RLI is a relay as an actuator (load), R1
-R6 is a resistor, Dl is a backflow prevention diode, ZDl is a Zener diode, C4 is a capacitor, and INV is an inverter. Relay RLI is used, for example, as a power switch for a gas proportional valve of a water heater.

The AC input from the commercial power supply 2 is converted to DC by the full-wave rectifier circuit 4 and the smoothing capacitor C1, and the AC input from the commercial power supply 2 is converted to DC by the DC iit source Vcc.
get. The DC power supply Vcc charges the watchdog bank-up capacitor C2 via the resistor R1 and the reverse current prevention diode D1, and also charges the power transistor Q1.
The microcontroller backup capacitor C3 is charged via the microcomputer. The charging voltage VDD of the microcomputer bank up capacitor C3 is 'r!' of the microcomputer MC. The i source voltage is set to 5 (V).

The watchdog timer circuit IC1 inputs the microcomputer's 1H1i voltage VDD from the terminal V0, compares it with the built-in reference voltage Vrefo (5 (V)), and outputs the power transistor from the terminal V CONA according to the difference. By controlling the base voltage applied to Q1, the microcomputer power supply voltage V is always equal to the reference voltage Vrefo, that is, 5 [V
] is automatically maintained. In addition, when the power supply voltage VDD for the microcomputer is divided by the resistors R3 and R4 and the voltage is input from the terminal ■5, and this divided voltage becomes lower than the built-in reference voltage Vref+, the microcomputer is Outputs a reset signal to the MC. The reference voltage VreL is the power supply voltage for the microcomputer. , (5(V)') 5% less voltage (4,
75 (v) is set as the lower limit voltage of the allowable power supply voltage range for the microcomputer MC to operate normally.

Microcomputer MC outputs an "H" signal to inverter INV when driving relay RLI as an actuator. Then, inverter IN
The output side of V becomes "L", and current from DC power supply Vcc flows to relay RLI, driving relay RLI.

When the microcomputer MC drives the relay RLI,
That is, during the period when the "H" signal is output to the inverter INV, the
Pulse width is 100μsec once every 00 m5ec
Outputs the "L" pulse signal of c. That is, during the period when the output of the inverter INV is 'L', the inverter INV outputs 100 μsec every 100 m5ec.
Outputs a watchdog pulse with a width of “H”. The above-mentioned extremely short watchdog pulse outputted from the inverter INV does not affect the driving state of the relay RLI.

By the way, the DC' caused by the smoothing capacitor C1 is connected to the source Vcc.
is higher than the Zener voltage of the Zener diode ZDI and makes the Zener diode ZDI conductive, so the watchdog pulse output from the inverter INV passes through the Zener diode ZDI and is applied to the clock terminal CK of the watchdog timer circuit ICI via the resistor R6. is input. The watchdog timer circuit ICI monitors the state of the clock terminal CK, and if the microcomputer MC malfunctions for some reason and the watchdog pulse is no longer input, it outputs a reset signal from the reset terminal RES. Output and reset the microcomputer MC.

As a result, the microcomputer MC returns to its initial state, so it outputs a 'L' signal to the inverter INV, and since the output of the inverter INV becomes 'H', the driving of the relay RLI is stopped.

The non-driving state of relay RLI, that is, the inverter IN
If the output of V is “H”, it is necessary to use commercial 1t.
If [2 is turned OFF, it is not commercially available! If a power outage occurs in j, #2, the microcomputer back amplifier capacitor C3 backs up the power for the microcomputer MC, and the wonchdog capacitor C3 provides power backup for the watchdog timer circuit ICI.

The backup capacitor C2 performs power supply bank-up. The backup time in this case is about 15 seconds.

<Problems to be Solved by the Invention> However, contrary to the above, when a power outage occurs in the commercial power supply 2 while the relay RLI is in the driving state, the smoothing capacitor is Although the voltage (Vcc) across C1 rapidly drops, the microcomputer power supply voltage v0 is supplied from the microcomputer backup capacitor C3, and attempts to back up the microcomputer MC despite the power outage of the commercial power line 1112.

Regarding relay RLI, it is attempted to maintain relay RLI in a driven state.

However, due to the rapid drop in voltage across the smoothing capacitor C1, the Zener diode ZDI cuts off approximately 2 degrees after a power outage, so the microcomputer MC
The watchdog pulse outputted from the inverter INV and applied through the inverter INV no longer passes through the Zener diode ZDI. In this case, the watchdog timer circuit ICI
Since no watchdog pulse is input to the clock terminal CK, a reset signal is output from the reset terminal RES to the microcomputer MC. Since this reset signal resets the microcomputer MC (relay RLI will also stop driving at this time), bank-up of the microcomviator MC itself at the time of a power outage of the commercial power supply 2 is meaningless. Become something.

In other words, in the case of a power outage while relay RLI is not driven, a backup of about 15 seconds is possible, whereas in the case of a power outage while relay RLI is in the driven state, the watchdog pulse is connected to the clock terminal CK. Since no input is received, the microcomputer MC itself is reset after about two degrees, and the relay RLI is switched from the driven state to the non-driven state.

Therefore, even if the commercial power supply 2 recovers from the power outage several seconds later, the relay RLI will not return to the state immediately before the power outage. In other words, even if the power outage is short, lasting only a few seconds, the microcomputer MC has already been reset, so the device must be operated from the beginning again.

This is nothing but the fact that the backup of the microcomputer MC is not properly performed.

The present invention has been devised in view of the above circumstances, and has an object to provide an almost constant backup time to a microcomputer regardless of whether the load is driven or not. With the goal.

<Means for Solving the Problems> In order to achieve the above object, the present invention has the following configuration.

That is, the present invention provides a watchdog timer circuit that monitors input of a watchdog pulse and outputs a reset signal to a microcomputer when the input is not received within a predetermined period; a backup capacitor for the microcomputer; A microcomputer comprising a bank-up capacitor for a timer circuit, and a watchdog pulse transmission circuit that supplies a watchdog pulse sent from the microcomputer at the same time as a signal for giving a drive command to a load to the watchdog timer circuit via a Zener diode. its's
In the back amplifier circuit, the Zener diode is maintained in a conductive state by connecting the watchdog pulse transmission circuit to a bank up capacitor for the watchdog timer circuit.

Effect〉 The effects of the above configuration of the present invention are as follows.

The backup capacitor for the watchdog timer circuit that keeps the Zener diode in the 7,000-dog pulse transmission circuit in a conductive state will not have its accumulated charge consumed by the load. Even if a power outage occurs while the load is being driven, the voltage drop across the backup capacitor for the watchdog timer circuit is gradual. Since the watchdog pulse sent from the microcomputer during load driving is applied to the watchdog timer circuit via the conductive Zener diode, no reset signal is output from the watchdog timer circuit to the microcomputer. That is, the microcomputer continues the current operating state including the drive command for the load.

Such TFL backup for the microcomputer continues until the voltage of the hack-up capacitor for the watchdog timer circuit drops below the Zener voltage, but since the accumulated charge of this hack-up capacitor is not consumed by the load, it is not necessary to drive or drive the load. A substantially constant and sufficiently long bank-up time can be ensured regardless of whether or not the drive is performed.

<Example> Hereinafter, an example of the present invention will be described in detail based on the drawings.

FIG. 1 shows a power bank up circuit for a microcomputer according to an embodiment of the present invention.

Full-wave rectifier circuit 4 configured with a diode bridge
has its two input terminals connected to both ends of the commercial power supply 2, and its two output terminals connected to both ends of the smoothing capacitor C1. A series circuit including a resistor R1, a backflow prevention diode D], and a watchdog backup capacitor C2 is connected to both ends of the smoothing capacitor CI. P.N.
The P-type power transistor Q1 has its emitter connected to the connection point between the backflow prevention diode Dl and the watchdog backup capacitor C2, and its collector connected to the backflow prevention diode D2. It is connected to one end of the backup capacitor C3 for the microcomputer via the resistor R7, and the base is connected to the watchdog timer circuit ICI (LA made by Sanyo Denki I9■).
5693) terminal ■. . Connected to 9A. A bias resistor R2 is connected between the emitter and base. The other end of the microcomputer hack amplifier capacitor C3 is connected to the ground line.

The cathode of the backflow prevention diode D2 is connected to the power input terminal of the microcomputer MC via a resistor R8, and the connection point P1 between the power input terminal and the resistor R8 is the microcomputer power supply voltage ■. . (5 [V]). The connection point P1, which is the microcomputer power supply voltage (2), is connected to the terminal v0 of the watchdog timer circuit ICI, and is also connected to the ground line via voltage dividing resistors R3 and R4. The connection point between the voltage dividing resistors R3 and R4 is connected to the terminal V of the watchdog timer circuit C1. Bank 7 for microcomputer Knob capacitor C
The positive terminal of No. 3 is connected to a connection point P1 between resistors R8 and R3 via a backflow prevention diode D3.

One end of the relay RLI as an actuator is connected to -@ (DC 11 fA V cc ) of the smoothing capacitor CI, and the other end is connected to the output terminal of the inverter rNV. The input terminal of the inverter INV is connected to the microcomputer MC.

A series circuit of a resistor R5, a Zener diode ZD1, a resistor R6, and a capacitor C4 is connected between both ends of the watchdog backup capacitor C2, and the connection point between the resistor R5 and the cathode of the Zener diode ZD1 is connected to the output terminal of the inverter INV. has been done. The connection point between the resistor R6 and the capacitor C4 is connected to the clock terminal CK of the watchdog timer circuit IC1, and the reset terminal RES of the watchdog timer circuit ICI is connected to the microcomputer MC. C5 is a capacitor that determines the time constant of the watchton pulse monitoring period in the watchdog timer circuit ICI, and G is a ground terminal.

Bank up capacitor C3 for microcomputer, backflow prevention diode D2. D3, resistors R7, and R8 constitute a '48 computer amplifier circuit for the microcomputer MC. Watchdog timer circuit ■C1, power transistor Q1, voltage dividing resistors R3, R4, resistors R5, R
6. Zener diode-FZDI, capacitor C4, C5
This constitutes a watchdog voltage monitoring circuit.

Further, a watchdog pulse transmission circuit is formed by the Zener diode ZDI and the resistor R6.

The main differences between this embodiment and the conventional example are as follows.

■ In the conventional example, the smoothing capacitor C1 is used as a power supply to keep the Zener diode ZDI in a conductive state.
However, in this embodiment, the voltage of the watchdog back amplifier capacitor C2 is used.

■ A backflow prevention diode D2 is connected to the collector of the power transistor Q1. Resistors R7 and R8 and a backflow prevention diode D3 are connected.

Among these, option (2) is more in line with the spirit of the present invention.

Next, the operation of the microcomputer power supply buffer subcircuit configured as described above will be explained.

When the main power switch (not shown) is turned on, the AC input from the commercial power supply 2 is converted to DC by the full-wave rectifier circuit 4 and the smoothing capacitor CI to obtain the DC power Vcc. This DC power supply Vcc charges the watchdog backup capacitor C2 via the resistor R1 and the reverse current prevention diode D1, and also makes the power transistor Q1 conductive due to the voltage drop across the resistor R2.

The collector current of the power transistor Q1 is applied to the power input terminal of the microcomputer MC via the reverse current prevention diode D2 and the resistor R8, and immediately starts and starts the microcomputer MC. On the other hand, the microcomputer back amplifier capacitor C3 is gradually charged via the backflow prevention diode D2 and the resistor R7. In this case, since the backflow prevention diode D3 is present between the points P1 and P2, the microcomputer MC can be started up immediately while gradually charging the microcomputer bank-up capacitor C3. It is. Therefore, backup capacitor C for microcontroller
3, a large-capacity one of several tens of μF can be adopted, and the backup time for the microcomputer MC can be extended.

Note that the watchdog timer circuit ICI controls the base voltage from the terminal V C0HT based on the microcomputer power supply voltage VIID input from the terminal v0.
The power supply voltage VDI for the microcomputer is held constant (5 [V]), and the voltage input from the terminal V is a voltage (4,75 [V]) that is 5% less than the power supply voltage VH (5Cv) for the microcomputer.
V) ), the reset terminal RES
This is similar to the conventional example in that a reset signal is output to the microcomputer MC.

Microcomputer MC outputs an "H" signal to inverter INV when driving relay RLI as an actuator. Then, Impark IN
The output side of V becomes "L", and current from DC power supply Vcc flows to relay RLI, driving relay RLI.

At the same time, the microcomputer MC sets the 100m5ec as a condition that does not affect the driving soft part of the relay RLI.
An "L" pulse signal with a pulse width of 100 μsec is outputted to the inverter INV once every 15 seconds. In other words, during the period when the output of the inverter INV is "L", 100 p is output from the inverter INV every 100 m5ec.
Outputs a "H" watchdog pulse with a width of sec.

By the way, watchdog backup capacitor C
The Zener diode ZD1 is made conductive by the voltage across the Zener diode ZD1, and the watchdog pulse output from the inverter INV passes through the Zener diode ZDI and is input to the clock terminal CK of the watchdog timer circuit rC1 via the resistor R6. Watched timer circuit I
CI monitors the state of clock terminal CK. If the microcomputer MC malfunctions for some reason and the watchdog pulse is no longer output, a reset signal is output from the reset terminal ``1'' to reset the microcomputer MC.

As a result, the microcomputer MC returns to its initial state and outputs an "L" signal to the inverter INV, and since the output of the inverter INV becomes ``H'', the driving of the relay RLI is stopped.

If a power outage occurs in the commercial power supply 2, the power supply to the microcomputer MC will be from the smoothing capacitor C1 → resistor R1 → backflow prevention diode D1 → power 7.
In place of the path from transistor Q1 to resistor R8, connect microcomputer backup capacitor C3 to backflow prevention diode D.
This is done in 3 routes.

During this power outage, the microcomputer MC outputs "H" to the inverter INV, and the inverter INV
Assume that the output of NV is "Ll" and the relay RLI is in the driven state.

Since the output of the inverter rNV is "L", the smoothing capacitor cl is rapidly discharged, but this does not have any effect on the conduction state of the Zener diode ZDI. This is because, unlike the example, the Zener diode ZDI is maintained in a conductive state by the voltage of the watchdog bank-up capacitor C2.
This is because no current flows from to relay RLI due to the presence of backflow prevention diode D1.

When relay RLI is in the driving state, a watchdog pulse is output from micro combinator MC to inverter INv, and this pulse is output to Zener diode ZDI.
H of 100 μsee width every 100 m5ec for
Since the watchdog pulse of 1 is input to the clock terminal CK of the watchdog timer circuit ICI, no reset signal is output to the microcomputer MC, and the microcomputer MC continues to maintain its current operating state.

Such backup of the microcomputer MC is performed until the voltage of the watchdog backup capacitor C2 drops below the Zener voltage of the Zener diode ZDI, and the bank up time is approximately 11 seconds, which is 2 seconds compared to the conventional example. It was possible to make the time longer by about 5.5 times compared to seconds.

The time it takes for the voltage of the watchdog back amplifier capacitor C2 to become equal to or lower than the Zener voltage is approximately the same whether the relay RLI is in the driven state or in the non-driven state. That is, a substantially constant backup time can be secured for the microcomputer MC regardless of whether the load is driven or not.

If the power outage of the commercial power supply 2 lasts for a few seconds, the backup for the microcomputer MC will not be a problem, and the microcomputer MC will continue to operate even after the commercial power supply 2 has recovered from the power outage. It can be carried out.

<Effect of the invention> According to the present invention, the following effects are achieved.

To keep the Zener diode conductive, which transmits the watchdog pulse sent from the microcomputer to the watchdog timer circuit when driving a load,
The Zener diode is made conductive by the voltage of the bank-up capacitor for the watchdog timer circuit, which is separated from the load, rather than by the power supply to the load, so even if a power outage occurs while the load is being driven, the Zener diode can be turned on. It is possible to reliably transmit the dog pulse to the watchdog timer circuit to avoid reset of the microcomputer and back up the power of the microcomputer. This kind of power backup continues until the voltage of the buck 7 hub capacitor for the watchdog timer circuit drops below the Zener voltage, but since the accumulated charge in this backup capacitor is not consumed by the load, it is difficult to drive or not drive the load. Regardless of the situation, a constant and sufficiently long bank-up time can be secured.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a power backup circuit for a microcomputer according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional power backup circuit for a microcomputer. ICI...Watchdog timer circuit MC...Micro combinator C2...Backup capacitor for watchdog C3...Backup capacitor for microcomputer ZDI
... Zener diode applicant (Co., Ltd.) − Ritsu agent Patent attorney Oka 1) Kazuhide

Claims (1)

[Claims] (1) A watchdog timer circuit that monitors the input of a watchdog pulse and outputs a reset signal to the microcomputer when the input is not received within a predetermined period;
A backup capacitor for the microcomputer, a backup capacitor for the watchdog timer circuit, and a watchdog pulse sent from the microcomputer at the same time as a signal giving a drive command to the load is provided to the watchdog timer circuit via a Zener diode. In a power backup circuit for a microcomputer equipped with a watchdog pulse transmission circuit, the Zener diode is maintained in a conductive state by connecting the watchdog pulse transmission circuit to a backup capacitor for the watchdog timer circuit. Features a microcontroller power backup circuit.