JPH04157548A - Information storage device - Google Patents

Information storage device

Info

Publication number
JPH04157548A
JPH04157548A JP2283894A JP28389490A JPH04157548A JP H04157548 A JPH04157548 A JP H04157548A JP 2283894 A JP2283894 A JP 2283894A JP 28389490 A JP28389490 A JP 28389490A JP H04157548 A JPH04157548 A JP H04157548A
Authority
JP
Japan
Prior art keywords
information
sram
power supply
microcomputer
prom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2283894A
Other languages
Japanese (ja)
Inventor
Katsuyuki Nishida
西田 克之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2283894A priority Critical patent/JPH04157548A/en
Publication of JPH04157548A publication Critical patent/JPH04157548A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To extend the period of replacement based upon the life of a PROM by transferring information stored in an SRAM to an electric erasable PROM and storing it when the voltage of a backup power source which powers the SRAM stored temporarily with information by a microcomputer drops below a preset reference voltage. CONSTITUTION:The SRAM 12 is stored temporarily with the information by the microcomputer 11. A power source monitor circuit 15 outputs an alarm signal when the voltage of the backup power source 14 which is supplied to the SRAM 12 drops below the preset reference voltage. A control circuit 16 transfers the backup information stored in the SRAM 12 to the E<2>PROM 13 in response to the alarm signal and stores the information. Consequently, even if the frequency of information variation resulting from the processing of the microcomputer 11 increases, such a problem that the replacement period of the E<2>PROM based upon the life becomes short is eliminated.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は情報記憶装置に関し、特に電気的消去形FRO
Mを使用する情報記憶装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information storage device, and in particular to an electrically erasable FRO.
The present invention relates to an information storage device using M.

〔従来の技術〕[Conventional technology]

第2図は従来の情報記憶装置の一例のブロック図である
FIG. 2 is a block diagram of an example of a conventional information storage device.

従来例は、マイクロコンピュータ21のバックアップ情
報を蓄えておく電気的消去形PROMく以下E2 PR
OM)22と、外部電源23からの供給電力により、充
電するバックアップ電源24とを有して構成される。マ
イクロコンピュータ21は動作時の内部情報が変化した
場合にE2PROM22に常に変化後の情報を記憶する
。外部電源23からの供給電力が一時的に停止した場合
は、電力が再供給された時にE2 PROM22から供
給停止以前の情報をマイクロコンピュータ21が読み出
して処理を再開する。なお、バックアップ電源24は、
マイクロコンピュータ21からE2 PROM22へ情
報を記憶している途中で外部電源23からの電力供給が
停止した場合には情報を全て記憶し終るまでバックアッ
プする充電型電源である。
The conventional example is an electrically erasable PROM which stores backup information for the microcomputer 21.
OM) 22 and a backup power supply 24 that is charged by power supplied from an external power supply 23. When the internal information during operation changes, the microcomputer 21 always stores the changed information in the E2PROM 22. When the power supply from the external power supply 23 is temporarily stopped, when the power is supplied again, the microcomputer 21 reads the information before the supply stop from the E2 PROM 22 and resumes processing. Note that the backup power supply 24 is
If the power supply from the external power supply 23 stops while information is being stored from the microcomputer 21 to the E2 PROM 22, this is a rechargeable power supply that backs up the information until all the information has been stored.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の情報記憶装置において、E2FROMに
よる情報のバックアップは、マイクロコンピュータの処
理による情報変化の頻度が増大すると、E2PROMは
書込み回数が限られているので、寿命によるE2 PR
OMの交換期間が短かくなるという問題点があった。
In the above-mentioned conventional information storage device, information backup by E2FROM is limited by the lifespan of E2PROM as the frequency of information changes due to microcomputer processing increases.
There was a problem that the OM replacement period was shortened.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の情報記憶装置は、マイクロコンピュータにより
情報を一時記憶するSRAMと、このSRAMに供給さ
れるバックアップ電源の電圧があらかじめ設定された基
準電圧より低下したとき警報信号を出力する電源監視回
路と、前記警報信号により前記SRAMに記憶の情報を
電気的消去形PROMに転送し記憶させる制御回路とを
有する。
The information storage device of the present invention includes an SRAM that temporarily stores information using a microcomputer, a power supply monitoring circuit that outputs an alarm signal when the voltage of a backup power supply supplied to the SRAM falls below a preset reference voltage. and a control circuit that transfers information stored in the SRAM to an electrically erasable PROM and stores it in response to the alarm signal.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。第1図
は本発明の一実施例のブロック図である。
Next, the present invention will be explained with reference to the drawings. FIG. 1 is a block diagram of one embodiment of the present invention.

本実施例は、マイクロコンピュータのバックアップ情報
を記憶する低消費電力のSRAM12とSRAM12に
供給されるバックアップ電源14の電圧があらかじめ設
定された基準電圧より低下したとき警報信号を出力する
電源監視回路15と、警報信号によりSRAM12に記
憶のバックアップ情報をE2PROM13に転送し記憶
させる制御回路16とを有して構成される。
This embodiment includes a low power consumption SRAM 12 that stores backup information of a microcomputer, and a power supply monitoring circuit 15 that outputs an alarm signal when the voltage of a backup power supply 14 supplied to the SRAM 12 falls below a preset reference voltage. , and a control circuit 16 that transfers backup information stored in the SRAM 12 to the E2PROM 13 and stores it in response to an alarm signal.

次に動作について説明すると、バックアップ電源14は
、外部電源17から電力が供給されている場合に充電し
、外部電源17がらの電力供給が停止するとバックアッ
プ電源としてSRAM12゜E2 PROM13.電圧
監視回路15および制御口Fl@16に電力を供給する
。マイクロコンピュータ11は、処理途中でバックアッ
プに必要な情報が変化するたびにSRAM12の記憶内
容を更新する。
Next, the operation will be described. The backup power supply 14 charges when power is supplied from the external power supply 17, and when the power supply from the external power supply 17 stops, the backup power supply 14 charges the SRAM 12°E2 PROM 13. Power is supplied to the voltage monitoring circuit 15 and the control port Fl@16. The microcomputer 11 updates the storage contents of the SRAM 12 every time information necessary for backup changes during processing.

外部電源17からの電力供給が停止されると、しばらく
はバックアップ電源14により、SRAM12の記憶内
容は保持されるので、外部電源17の瞬断に対しては、
SRAM12の記憶内容は保持されるが、バックアップ
電源14がらの電力供給が停止すると、SRAM12の
記憶内容は消失してしまうのでバックアップ電源14の
電圧を電圧監視回路15が監視し、基準電圧より下がる
と制御回路16がSRAM12の記憶内容をE2 PR
AMl Bに転送する。
When the power supply from the external power supply 17 is stopped, the storage contents of the SRAM 12 are retained by the backup power supply 14 for a while.
Although the memory content of the SRAM 12 is retained, if the power supply from the backup power supply 14 is stopped, the memory content of the SRAM 12 will be lost. Therefore, the voltage monitoring circuit 15 monitors the voltage of the backup power supply 14, and if it falls below the reference voltage, the memory content of the SRAM 12 will be lost. The control circuit 16 transfers the memory contents of the SRAM 12 to E2 PR.
Transfer to AMl B.

このようにすると、マイクロコンピュータ11は起動時
にまずSRAM12の記憶内容を読出し、記憶内容が消
失している場合はE2 PROM13からバックアップ
情報を読出すことができる。
In this way, the microcomputer 11 can first read out the storage contents of the SRAM 12 at startup, and if the storage contents have disappeared, can read backup information from the E2 PROM 13.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、マイクロコンピュータに
より情報を一時記憶するSRAMに供給、されるバック
アップ電源の電圧があらかじめ設定された基準電圧より
低下したとき、SRAMに記憶の情報を電気的消去形の
FROMに転送し記憶させることにより、FROMの寿
命による交換期間を延ばすことができるという効果を有
する。
As explained above, the present invention provides an electrical erasing method to erase information stored in the SRAM when the voltage of the backup power supply supplied to the SRAM that temporarily stores information by a microcomputer falls below a preset reference voltage. By transferring and storing the information in FROM, it is possible to extend the replacement period due to the life of FROM.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のブロック図、第2図は従来
の情報記憶装置の一例のブロック図である。 11.21・・・マイクロコンピュータ、12・・・S
RAM、13.22・・・E2 PROM、14゜24
・・・バックアップ電源、15・・・電圧監視回路、1
6・・・制御回路、17.23・・・外部電源。
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a conventional information storage device. 11.21...Microcomputer, 12...S
RAM, 13.22...E2 PROM, 14°24
...Backup power supply, 15...Voltage monitoring circuit, 1
6...Control circuit, 17.23...External power supply.

Claims (1)

【特許請求の範囲】[Claims] マイクロコンピュータにより情報を一時記憶するSRA
Mと、このSRAMに供給されるバックアップ電源の電
圧があらかじめ設定された基準電圧より低下したとき警
報信号を出力する電源監視回路と、前記警報信号により
前記SRAMに記憶の情報を電気的消去形PROMに転
送し記憶させる制御回路とを有することを特徴とする情
報記憶装置。
SRA that temporarily stores information using a microcomputer
M, a power supply monitoring circuit that outputs an alarm signal when the voltage of the backup power supply supplied to the SRAM falls below a preset reference voltage, and an electrically erasable PROM that outputs information stored in the SRAM according to the alarm signal. 1. An information storage device comprising: a control circuit for transferring information to and storing the information.
JP2283894A 1990-10-22 1990-10-22 Information storage device Pending JPH04157548A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2283894A JPH04157548A (en) 1990-10-22 1990-10-22 Information storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2283894A JPH04157548A (en) 1990-10-22 1990-10-22 Information storage device

Publications (1)

Publication Number Publication Date
JPH04157548A true JPH04157548A (en) 1992-05-29

Family

ID=17671563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2283894A Pending JPH04157548A (en) 1990-10-22 1990-10-22 Information storage device

Country Status (1)

Country Link
JP (1) JPH04157548A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011257912A (en) * 2010-06-08 2011-12-22 Fujitsu Semiconductor Ltd Semiconductor device and operation test method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011257912A (en) * 2010-06-08 2011-12-22 Fujitsu Semiconductor Ltd Semiconductor device and operation test method of semiconductor device

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