JPH0415620A - Controller for power source liquid crystal display unit - Google Patents

Abstract

PURPOSE:To prevent a DC bias from being applied to liquid crystal, to prolong the life of the liquid crystal, and to eliminate a feeling of physical disorder to the screen of the liquid crystal display unit by accurately controlling the ON-OFF timing of a driving power source and the ON-OFF timing of a control signal. CONSTITUTION:When the power source is turned on, a controller 2 generates +5V electric power, driving electric power, the control signal, and a reset signal to be supplied to the liquid crystal display unit 1. Then the +5V electric power is supplied to the liquid crystal display unit 1 and a reset circuit 3. The reset circuit 3, therefore, sends out a reset output a specific time later and switching circuits 5, 6, and 8 are driven with this reset output to start supplying the driving electric power from the controller to the liquid crystal display unit 1. Consequently, the liquid crystal is prevented from being applied with the DC bias and the life is prevented from becoming short to prevent lateral lines from appearing on the screen when the power source is turned on and off.

Description

[Detailed description of the invention] [Industrial application fields] The present invention relates to a control device for a power supply for a liquid crystal display.

[Prior Art] A liquid crystal display is supplied with negative drive power and control signals from a controller.

As shown in Figure 4, the power supply sequence is as shown in Figure 4. When the power is turned on, the +5V power supply first rises, which causes the controller to start operating, then a control signal is generated and supplied to the liquid crystal display, and finally the drive power supply is turned on. It is desired that it be supplied to liquid crystal displays. Further, when the power supply is cut off, it is desirable that the drive power supply is first cut off, then the control signal is stopped, and finally the +5V power supply is turned off.

However, in conventional devices, horizontal lines appear on the LCD screen when the power is turned on and off. This is a phenomenon that occurs when a DC bias is applied to the liquid crystal, and the on and off timing of the drive power supply is controlled. The on/off timing of the signal was not accurately controlled.

[Problem 8 to be solved by the invention] As described above, the conventional power supply control device for liquid crystal displays does not accurately control the on/off timing of the drive power supply and the on/off timing of the control signal, so there is no direct current bias on the liquid crystal. There was a problem that the lifespan of the liquid crystal was shortened due to the applied voltage.

In addition, when the power was turned on and off, horizontal lines appeared on the LCD screen, which could cause an unnatural feeling.

Therefore, the present invention can accurately control the on/off timing of the drive power supply and the on/off timing of the control signal, thereby preventing DC bias from being applied to the liquid crystal. The present invention aims to provide a control device for a power supply for a liquid crystal display that can prevent horizontal lines from sometimes running on the screen.

[Means for Solving the Problem] The invention corresponding to claim (1) includes a liquid crystal display device, and generation of +5V power and driving power to the liquid crystal display when power is turned on;
Generates a control signal to the liquid crystal display, generates a signal for reset, and cuts off the power to supply +5V to the liquid crystal display.
Stops the generation of power and drive power, stops the generation of control signals to the liquid crystal display, and stops the generation of reset signals, respectively.
The controller supplies display data to the liquid crystal display, and the +5V power supply from this controller starts operation, and after a predetermined period of time after the reset signal from the controller rises to a predetermined level, a reset output is sent out, and the reset signal is output. A reset circuit that stops sending out the reset output when the voltage falls below a certain level, and a switching circuit that starts supplying drive power from the controller to the liquid crystal display in response to the reset output from the reset circuit. It is something.

In addition, the invention corresponding to claim (2) generates a +5V power supply and driving power to the liquid crystal display when the power is turned on, and generates a control signal to the liquid crystal display when the power is turned on, and when the power is turned off, the invention corresponds to claim (2). A controller that stops the generation of the +5V power supply and drive power to the liquid crystal display, and stops the generation of control signals to the liquid crystal display, respectively. The operation is started by an integrator circuit that integrates shift clock pulses and a +5V power supply from the controller, and a reset output is sent out after a predetermined time after the integrator circuit output rises to a predetermined level, and the integrator circuit output falls below a predetermined level. a reset circuit that stops sending out the reset output when the voltage falls;
A switching circuit is provided for starting supply of drive power from the controller to the liquid crystal display in response to the reset output from the reset circuit.

[Operation] In the invention corresponding to claim (1), when the power is turned on, the controller generates +5V power and drive power to the liquid crystal display, generates a control signal to the liquid crystal display, and generates a reset signal. be exposed. The +5V power is then supplied to the liquid crystal display and the reset circuit. This enables the reset circuit to operate. Control signals are also supplied to the liquid crystal display.

The reset circuit, in which the reset signal is supplied to the reset circuit, sends out a reset output a predetermined time after the reset I-(a) rises to a predetermined level.The switching circuit responds to this reset output by sending a reset output from the controller. The drive power supply is started to be supplied to the liquid crystal display.The liquid crystal display becomes capable of display operation.Therefore, the liquid crystal display starts displaying data by inputting display data from the controller.

In this way, when turning on the power, the +
Drive power is supplied after the 5V power and control signals are supplied.

Further, by shutting off the power supply, the generation of the +5Vg source and drive power source, the generation of the control signal, and the generation of the reset signal from the controller are stopped. As soon as the reset signal falls below a predetermined level, the switching circuit operates to stop supplying the driving power to the liquid crystal display. In this way, first, the supply of driving power to the liquid crystal display is stopped. After that +
The 5V power supply and control signal gradually fall with a predetermined time constant. Therefore, when the power is cut off, the supply of driving power to the liquid crystal display is first stopped, and then the supply of +5V power and control signals is stopped.

In the invention corresponding to claim (2), when a control signal is generated from the controller by turning on the power, a shift clock pulse in the control signal is integrated and smoothed by an integrating circuit. This integrating circuit output is then supplied to a reset circuit, which sends out a reset output a predetermined time after the integrating circuit output rises to a predetermined level. In response to this reset output, the switching circuit starts supplying drive power from the controller to the liquid crystal display.

In addition, when the generation of +5V power and drive power from the controller and the generation of control signals are stopped due to power cutoff, the switching circuit operates immediately as soon as the output of the integrating circuit falls below a predetermined level, and the LCD display of the drive power is displayed. stop supply to.

Therefore, when turning on the power, first apply +5V to the liquid crystal display.
After the power and control signals are supplied, the drive power is supplied. Also, when the power is cut off, the drive power supply to the liquid crystal display is first stopped, and then the +5V power supply and control signal supply are stopped. It turns out.

[Example] Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

In FIG. 1] is a liquid crystal display, and 2 is a controller. When the controller 2 is powered on, it generates a +5V power supply VCC, a reset signal R1, a drive power supply (negative power supply) VER to the liquid crystal display 1, and a control signal S including a shift clock pulse, a synchronization signal, etc. There is. In terms of timing, as shown in FIG. 2(a), the +5V power supply VCC rises first.

+5V power supply V from the controller 2. C is supplied to the liquid crystal display 1 and the IC reset circuit 3, respectively. Note that the reset circuit 3 is connected to a +5V power supply V.
Operation is possible by supplying cc.

Further, the reset signal R from the controller 2 is supplied to the terminal RESI\ of the reset circuit 3, and the control signal S is supplied to the liquid crystal display 1.

ing.

As shown in FIGS. 2(b) and 2(c), the reset circuit 3 sends out a high-level reset output R6 from the terminal RESET after a predetermined time TD has elapsed since the reset signal R rises to a predetermined level L. Terminal 0LIT
Low level output S from. It is designed to send out. The delay time in this reset circuit 3 is set by a time constant capacitor 4.

An NPN type first
transistor 5 connects its emitter to the controller 2
(7) is connected to the drive power output terminal side of the first transistor (7).
A second transistor 5 of NP type is connected with its collector facing the base side of the first transistor 5.

A PNP is connected between the collector of the first transistor 6 and the emitter of the second transistor 6 via a resistor 7.
A third transistor 8 of the shape is connected with its emitter facing the emitter side of the second transistor 6.

Then, the output S0 sent from the terminal 011T of the reset circuit 3 is passed through the resistor 9 to the second transistor 6.
and the terminal RESE of the reset circuit 3
A reset output R0 sent from T is supplied to the base of the third transistor 8 via a resistor 10.

The controller 2 supplies display data D to the liquid crystal display 1 for display when the liquid crystal display 1 is in an operable state.

In this embodiment having such a configuration, when the power is turned on, the +5V power VCC is initially supplied from the controller 2 to the liquid crystal display 1 and the reset circuit 3. As a result, the reset circuit 3 becomes operable. On the other hand, the liquid crystal display 1 is not in an operable state because the driving power source 2E is not supplied thereto.

Subsequently, from the controller 2, the reset signal R1 control signal S and the drive power supply VF, S are raised. When the reset signal R rises to a predetermined level L, the reset circuit 3 outputs a high level reset output R8 and a low level output S after a predetermined time TD has elapsed from that point. Send out. This turns on the second transistor 6, which turns on the first transistor 5. Further, the third transistor 8 is turned off.

In this way, the driving power V6 from the controller 2 is supplied to the liquid crystal display 1 for the first time at this point, as shown in FIG. 2(d).

In this way, when the power is turned on, the +5V power supply V is always applied to the liquid crystal display 1. After supplying 0 and the control signal S, the drive power supply VER having a negative potential can be supplied. Therefore, a phenomenon such as horizontal lines running on the screen due to DC bias being applied to the liquid crystal when the power is turned on does not occur. Furthermore, since application of a DC bias to the liquid crystal can be prevented, reduction in the life of the liquid crystal can be prevented.

When the power is cut off, the reset signal R from the controller 2 falls as shown in FIG. The signal is inverted to low level as shown in (C) of the figure. Again, Deno JSo flips to a high level.

As a result, the third transistor 8 is turned on and the second transistor 8 is turned on.
transistor 6 is turned off. This turns off the first transistor 5. In this way, first, as shown in FIG. 2(d), the supply of drive power v8E to the liquid crystal display 1 is stopped.

Thereafter, the control signal S and reset signal R from the controller 2 fall to approximately zero potential. Finally, the +5V power supply VCC falls.

In this way, when the power is cut off, the driving power supply V is necessarily at a negative potential with respect to the liquid crystal display 1. After stopping the supply of the control signal S, the supply of the +5V power supply VCC can be stopped. Therefore, when the power is turned off, DC bias is applied to the liquid crystal, and horizontal lines do not appear on the screen. Furthermore, since application of a DC bias to the liquid crystal can be prevented, reduction in the life of the liquid crystal can be prevented.

In the embodiment described above, the reset signal R generated from the controller 2 is supplied to the reset circuit 3 to generate the reset output R.
0 is transmitted, but the invention is not necessarily limited to this. (If a type of controller that does not generate a reset signal is used, the shift in the control signal S generated from the controller instead of the reset signal is Clock pulses may also be used.

In this case, since the waveform is a pulse, a well-known integrating circuit shown in FIG. 3 is used, and after smoothing the shift clock pulse from the controller with the integrating circuit,
It is sufficient to supply it to ESIN.

Even in this case, when the power is turned on, the drive power supply VER can be supplied last, and when the power is turned off, the drive power supply Vl:
In this embodiment, the supply of E can be stopped first, and therefore the same effect as in the previous embodiment can be obtained.

[Effects of the Invention] As detailed above, according to the present invention, turning on the drive power supply,
The off timing and on/off timing of the control signal can be precisely controlled, preventing DC bias from being applied to the liquid crystal, thus preventing shortening of life, and preventing horizontal lines from running on the screen when the power is turned on and off. A control device for a power supply for a liquid crystal display device can be provided.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, FIG. 2 is a diagram showing the operation timing of each part of the same embodiment, and FIG. 3 is an integration circuit used in another embodiment of the present invention. Circuit diagram, 4th
The figure is a timing waveform diagram for explaining the sequence of power supply to the liquid crystal display. DESCRIPTION OF SYMBOLS 1...Liquid crystal display, 2...Controller, 3...Reset circuit, 5.6.8...Transistor. Applicant's agent Patent attorney Takehiko Suzue

Claims (2)

[Claims] (1) When the liquid crystal display is turned on, +5V power and driving power are generated to the liquid crystal display, a control signal is generated to the liquid crystal display, and a reset signal is generated, and when the power is turned off, the a controller that respectively stops the generation of +5V power and drive power to the liquid crystal display, stops the generation of a control signal to the liquid crystal display, and stops the generation of a reset signal, and supplies display data to the liquid crystal display; It starts operating with +5V power from the controller, sends out a reset output after a predetermined time after the reset signal from the controller rises to a predetermined level, and stops sending out the reset output when the reset signal falls below a predetermined level. Control of a power supply for a liquid crystal display device, comprising a reset circuit that stops the operation, and a switching circuit that starts supplying driving power from the controller to the liquid crystal display device in response to a reset output from the reset circuit. Device. (2) When the power is turned on, a +5V power supply and driving power are generated to the liquid crystal display, and a control signal is generated to the liquid crystal display, and when the power is turned off, a control signal is generated to the liquid crystal display. +5V power supply and drive power supply stop,
a controller that respectively stops generation of control signals to the liquid crystal display and supplies display data to the liquid crystal display; an integrating circuit that integrates shift clock pulses in the control signal generated from the controller; and the controller. It starts operating with +5V power from the integrator circuit, sends out a reset output a predetermined time after the integrator output rises to a predetermined level, and stops sending out the reset output when the integrator circuit output falls below a predetermined level. A control device for a power supply for a liquid crystal display, comprising a reset circuit and a switching circuit that starts supplying drive power from the controller to the liquid crystal display in response to a reset output from the reset circuit.