JPH04152464A - Compile processing system - Google Patents

Abstract

PURPOSE:To shorten the executing time of e program when a source program includes an arithmetic description which calculates the sum total of the effective elements forming plural arrays by providing an arithmetic pattern detecting part and a vector instruction train generating part. CONSTITUTION:An arithmetic pattern detecting part 14 detects an arithmetic description which calculates the sum total of the effective array elements forming plural arrays described in a source program 2. Then, a vector instruction train generating part 15 generates an intermediate language of a vector instruction train consisting of a vector addition instruction train which adds cumulatively the effective array elements of an array shown in an arithmetic description and a vector sum total instruction which calculates the cumulative addition value obtained from the vector addition instruction train. Thus, an intermediate language is produced for a vector instruction train which calculates the arithmetic value of the detected arithmetic description. As a result, the number of generated vector sum total instructions necessary for calculation of the arithmetic value of the arithmetic description is reduced. Then the program executing time is also shortened.

Description

[Detailed Description of the Invention] [Summary] Regarding a compilation processing method for compiling a source program into a corresponding object program, the purpose is to generate an object program that reduces execution time. An operation pattern detection unit that detects whether or not an operation description that calculates the sum of array elements is written in the source program, and when the corresponding operation description is detected, the operation pattern detection unit that detects whether the operation description that calculates the sum of array elements is written in the source program, and Detected by generating a vector instruction sequence consisting of a vector addition instruction sequence that cumulatively adds valid array elements corresponding to the array elements, and a vector summation instruction that calculates the total sum of the required cumulative addition values. and a vector instruction string generation section that generates a vector instruction string for calculating the operation value of the operation description, and compiles the source program into a corresponding object program according to the vector instruction string generated by the vector instruction string generation section. Configure it as you like.

[Industrial application field]

The present invention relates to a compilation processing method for compiling a source program into a corresponding object program, and more particularly to a compilation processing method that can generate an object program that reduces execution time.

[Conventional technology]

With conventional compilers, when a source program contains an operation description that calculates the sum of the valid array elements of multiple arrays, a vector summation instruction that calculates the sum of the valid array elements of each array is used. In addition to generating
By generating a scalar addition instruction that sequentially adds the summation value calculated by this vector summation instruction, processing is performed such that the calculation description is compiled.

For example, in the source program, as shown in Figure 4,
When array element number 1 (1 to
) ]j=1~(n+1) The array element of any one of the arrays becomes valid,
Do small loop Therefore, when an operation description is written that calculates the summation value of each array element that has become valid, in a conventional compiler, as shown in Figure 5, for each array, VSUM T, , A , 9M.

ADD s, s, TJ A vector summation instruction (VSUM) is generated to calculate the summation value of the valid array elements of each array, and the summation values calculated by this vector summation instruction are sequentially added. By generating a number of scalar instructions (ADDs), processing was performed in such a way that the arithmetic description was compiled.

FIG. 6 illustrates the instruction sequence resulting from this compilation executed by the computer.

Here, rVsUM of the vector summation instruction described above.

is an instruction that calculates the sum of the arrays of the second operand and assigns the result to the variable of the first operand, and the third operand calculates the total sum of the arrays of the second operand by a conditional branch such as an IF statement. This indicates which array element in the array of the second operand is the target of the operation when no element is the target of the operation. Further, the above-mentioned scalar addition instruction rADDJ is an instruction that adds the variable of the second operand and the variable of the third operand, and assigns the result to the variable of the first operand.

[Problem to be solved by the invention]

However, since the vector summation instruction is a special instruction, it has the property that it takes longer to execute than a normal vector instruction. For example, when the number of vector elements is 100, the execution time will be about 2.5 times longer than a normal vector addition instruction. From now on, if you follow the conventional compilation process, if the source program contains an operation description that calculates the sum of valid array elements of multiple arrays, the program execution time will increase. There was a point.

The present invention has been made in view of such circumstances, and reduces program execution time when a source program includes an operation description that calculates the sum of valid array elements of multiple arrays. The purpose of this project is to provide a new compilation processing method that enables the generation of object programs.

[Means to solve the problem]

FIG. 1 is a diagram showing the principle configuration of the present invention.

In the figure, 1 is a data processing device equipped with the present invention,
2 is a source program compiled by the data processing device l; 3 is an object program generated by the data processing device l;

The data processing device 1 includes a program input section 10 that receives and receives input of a source program 2;
a program analysis unit 11 that performs syntactic and semantic analysis of the source program 2 accepted by the program to generate a corresponding intermediate language; and an optimization unit that performs various optimization processes on the intermediate language output from the program analysis unit 11. conversion processing unit 12;
The code generation unit 13 generates and outputs an object program 3 corresponding to the intermediate language string optimized by the optimization processing unit 12.

As one of its optimization processes, the optimization processing unit 12 detects an operation pattern to detect whether or not an operation description for calculating the sum of valid array elements of a plurality of arrays is written in the source program 2. section 14, a vector addition instruction sequence for cumulatively adding valid array elements of the array described in the operation description corresponding to the array elements when the operation pattern detection section 14 detects the corresponding operation description, and this vector. It includes a vector instruction string generation unit 15 that generates an intermediate language of a vector instruction string including a vector summation instruction for calculating the sum value of cumulative addition values determined by the addition instruction string.

[Operation] In the present invention, when the operation pattern detection unit 14 detects an operation description that calculates the sum of effective array elements of a plurality of arrays described in the source program 2, the vector instruction sequence generation unit 15 performs the following operations. A vector addition instruction sequence that cumulatively adds the valid array elements of the array described in the detected operation description for each array element, and a vector summation instruction that calculates the sum of the cumulative addition values determined by this vector addition instruction sequence. By generating an intermediate language for a vector instruction sequence consisting of the following, an intermediate language for a vector instruction sequence that calculates the operation value of the detected operation description is generated.

Then, the code generation unit 13 receives the processing of the vector instruction sequence generation unit 15 and performs processing to expand the code sequence corresponding to the generated vector instruction sequence into the object program 3.

In this way, according to the invention, source program 2
If there is an operation description that calculates the sum of valid array elements of multiple arrays, as in the prior art, vector summation instructions for the number of arrays are executed to calculate the operation value of the operation description. Since it is sufficient to generate one vector summation instruction instead of generating multiple vector summation instructions, the program execution time can be significantly reduced.

〔Example〕

Hereinafter, the present invention will be explained in detail according to examples.

As explained in FIG. 1, when a compiler that implements the present invention has an operation description that calculates the sum of valid array elements of multiple arrays in the source program 2, the compiler implements the present invention. We have a configuration that executes the compilation process of this operation description by cumulatively adding the valid array elements corresponding to the array elements and calculating the sum of the calculated cumulative addition values according to the vector summation instruction. It is something to be taken.

For example, if the source program 2 has an operation description as shown in Figure 4, the compiler of the present invention uses that array as the third operand for each array, as shown in Figure 2. A variable VT that stores the cumulative addition value corresponding to the array elements of the valid array elements of the array that appeared in (however,
The initial value of the array element is set to zero) as the second
The variable VT of this second operand is the first operand.
As operands, the following vector addition instruction (
VADD) VADD VT, VT, A,,M.

By generating , the cumulative addition value corresponding to the array elements of the valid array elements of the array of arithmetic descriptions written in the source program 2 is calculated, and a vector instruction sequence to be stored in the variable VT is generated. Finally, set the array stored in this variable VT as the second operand, leave the third operand empty, set the variable T as the first operand, calculate the sum of the arrays of the second operand, and use the result as the first operand. The following vector summation instruction (V
SUM) By generating VSUM T, VT, φ, calculate the sum value of the array that has the cumulative addition values generated by the above vector instruction sequence as array elements, and then write the vector instruction to be stored in the variable T. It generates.

FIG. 3 illustrates the instruction sequence resulting from this compilation executed by the computer.

As is clear from a comparison between Figures 3 and 5, when source program 2 contains an operation description that calculates the sum of valid array elements of multiple arrays, a conventional compiler is used. , the number of arrays to be operated on is (
n+1), it would generate (n+1) vector summation instructions and (n+1) scalar addition instructions; however, with the compiler of the present invention, one vector summation instruction would be generated. It is sufficient to generate the instruction and (n+1) vector addition instructions.

In this way, by using the present invention, the number of vector summation instructions developed in the object program 3 can be greatly reduced.

[Effects of the Invention] As explained above, according to the present invention, when there is an operation description in a source program that calculates the sum of valid array elements of a plurality of arrays, it is possible to calculate the operation value of the operation description. The number of vector summation instructions required to be generated can be greatly reduced, and thus the program execution time can be significantly reduced.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the principle configuration of the present invention, Figs. 2 and 3 are explanatory diagrams of the compiling process of the present invention, Fig. 4 is an explanatory diagram of the calculation description of the source program, and Figs. 5 and 6 are diagrams of the conventional It is an explanatory diagram of compilation processing. In the figure, 1 is a data processing device, 2 is a source program, and 3 is a data processing device.
is the object program, IO is the program input section,
11 is a program analysis section, 12 is an optimization processing section, 13 is a code generation section, 14 is an operation pattern detection section, and 15 is a vector instruction string generation section.

Claims (1)

[Claims] In a compilation processing method that executes compilation processing to generate and output an object program corresponding to a source program, an operation description for calculating the sum of valid array elements of a plurality of arrays is provided in the source program. An arithmetic pattern detection unit (14) detects whether or not it is described in a program, and when the arithmetic pattern detection unit (14) detects a corresponding arithmetic description, the validity of the array described in the arithmetic description is determined. By generating a vector instruction sequence consisting of a vector addition instruction sequence that cumulatively adds array elements corresponding to the array elements, and a vector summation instruction that calculates the sum of the cumulative addition values determined by the vector addition instruction sequence. , a vector instruction string generation unit (15) that generates a vector instruction sequence for calculating the calculation value of the detected operation description, and according to the vector instruction generated by the vector instruction sequence generation unit (15), a source program is generated. A compilation processing method characterized by processing in such a way as to compile a corresponding object program into a corresponding object program.