JPH04151571A - Circuit for detecting abnormality of capacitor - Google Patents

Circuit for detecting abnormality of capacitor

Info

Publication number
JPH04151571A
JPH04151571A JP2273404A JP27340490A JPH04151571A JP H04151571 A JPH04151571 A JP H04151571A JP 2273404 A JP2273404 A JP 2273404A JP 27340490 A JP27340490 A JP 27340490A JP H04151571 A JPH04151571 A JP H04151571A
Authority
JP
Japan
Prior art keywords
capacitor
circuit
current
signal
abnormality
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2273404A
Other languages
Japanese (ja)
Inventor
Yukinori Tsuruta
幸憲 弦田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2273404A priority Critical patent/JPH04151571A/en
Publication of JPH04151571A publication Critical patent/JPH04151571A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To detect the open fault and the like of a capacitor at an early period, to stop the circuit for protection and to prevent the progress of the accident by detecting the unbalanced current of the ripple currents of the capacitor at the time of abnormality. CONSTITUTION:Up to the time tF when the open fault occurs in a capacitor 51, magnetic flux is changed in a current transformer 70 with polarities for offsetting ripple currents IR1 and IR2, and the secondary output of the current transformer 70 is zero. After the time tF, the current IR1 becomes approximately zero, and the secondary output IRDET corresponding to the current IR2 generates the abnormal voltage. The voltage becomes the abnormal signal VDET through a rectifying circuit 73. The signal is compared 22 with a voltage judging level VLEB through resistors 33 and 34. The signals becomes a wavefor-shaped signal V2 through an inverted logic gate circuit 154. After the abnormality has occurred, the sequence of 0 1 0 1 is repeated until the apparatus is stopped. The signal V2 sets a flip-flop 152 through an AND logic circuit 151 which does not accept interlocking. A fault signal FAULT is changed from 0 to 1, and the apparatus is stopped for protection.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、直流電力を交流電力へ変換し、交流系統と連
系するインバータシステム等に用いられる直流フィルタ
回路を構成するコンデンサの異常検出回路に関する。
[Detailed description of the invention] [Object of the invention] (Industrial application field) The present invention converts DC power into AC power and configures a DC filter circuit used in an inverter system etc. connected to an AC system. This invention relates to a capacitor abnormality detection circuit.

(従来の技術) サイリスタやGT○等の電力用半導体素子の普及により
電力変換装置の大容量化や高圧化に加え、最近では省エ
ネ、高効率化等運転コスト面や信頼性面でも開発研究が
行なわれている。この中にあって、変換器構成部品の信
頼性や故障時の保護検出も、装置開発にあわせて具備し
ていく必要がある。第5図は、このような電源の一代表
例の構成を示す単線結線図である1図中、1は太陽電池
、蓄電池、燃料電池、新形電池等の直流電源、3は直流
リアクトル、4は有効無効電力制御に応じ、出力電圧の
パルス幅が制御される自励式インバータで、GT○等の
自己消弧形素子で構成される。5は直流フィルタコンデ
ンサ、6はインバータ変圧器である。7は高調波フィル
タで、コンタクタ7a、高調波抑制リア゛クトル7b、
高調波フィルタコンデンサ7cより構成される。8は交
流連系用リアクトル、9は系統連系/解列用しゃ断器、
10は交流系統を示す。負荷12には変圧器11、系統
分離/連系用しゃ断器13を介して交流系統に接続され
る。このように構成した系統連系システムでは交流系統
の電力需要に応じ、直流電源より交流系統への放電運転
と交流系統から直流電源への充電運転を行なって、有効
無効電力制御される。第6図はこのように構成したシス
テムの直流フィルタ回路に使用される直流フィルタコン
デンサ5の詳細構成の一例を示す、51〜62はコンデ
ンサ4S3P接続、51a〜54aは分圧抵抗、14は
主回路P、Nrllll直流電圧を検出する絶縁アンプ
である。このような構成は、第5図の例に限らずインバ
ータ装置一般に使用されている。
(Conventional technology) Due to the spread of power semiconductor devices such as thyristors and GT○, in addition to increasing the capacity and pressure of power conversion devices, research and development has recently been conducted in terms of operating costs and reliability, such as energy saving and high efficiency. It is being done. Among these, it is necessary to provide reliability of converter components and protection and detection in the event of failure in conjunction with device development. Fig. 5 is a single line diagram showing the configuration of a typical example of such a power supply. is a self-excited inverter in which the pulse width of the output voltage is controlled according to active reactive power control, and is composed of self-extinguishing elements such as GT○. 5 is a DC filter capacitor, and 6 is an inverter transformer. 7 is a harmonic filter, which includes a contactor 7a, a harmonic suppression reactor 7b,
It is composed of a harmonic filter capacitor 7c. 8 is a reactor for AC grid connection, 9 is a breaker for grid connection/disconnection,
10 indicates an AC system. The load 12 is connected to the AC system via a transformer 11 and a system isolation/connection breaker 13. In the grid-connected system configured in this manner, active reactive power is controlled by performing discharging operation from the DC power supply to the AC system and charging operation from the AC system to the DC power supply in accordance with the power demand of the AC system. Fig. 6 shows an example of the detailed configuration of the DC filter capacitor 5 used in the DC filter circuit of the system configured as described above, 51 to 62 are capacitors 4S3P connected, 51a to 54a are voltage dividing resistors, and 14 is the main circuit. P, Nrllll This is an isolation amplifier that detects DC voltage. Such a configuration is used not only in the example shown in FIG. 5 but also in inverter devices in general.

(発明が解決しようとする課題) 1〜2個のコンデンサのオープン故障やショート故障が
発生しても複数個直並列接続構成となっているため、即
時に装置が重故障停止に至ることは少なく、異常が検出
されないまま、運転が継続し、他の健全なコンデンサに
過大なストレスが加わり、コンデンサ全数が劣化し、破
損に至るという問題が考えられる。又、さらにコンデン
サの破損時、電解液が外部へ飛散し、周辺部品の金属類
と反応し腐食が進行するという問題も考えられる。本発
明はコンデンサのオープン故障やショート故障を早期に
検出し保護停止することにより事故が拡大することを防
止するコンデンサ異常検出回路を提供することを目的と
する。
(Problem to be solved by the invention) Even if an open failure or a short failure occurs in one or two capacitors, since multiple capacitors are connected in series and parallel, it is unlikely that the equipment will immediately stop due to a major failure. A possible problem is that operation continues without any abnormality being detected, and excessive stress is applied to otherwise healthy capacitors, causing deterioration and damage to all capacitors. Further, when the capacitor is damaged, the electrolyte may be scattered outside, reacting with metals in the surrounding parts, and causing further corrosion. SUMMARY OF THE INVENTION An object of the present invention is to provide a capacitor abnormality detection circuit that detects an open failure or short circuit failure of a capacitor at an early stage and stops the protection, thereby preventing the accident from expanding.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明は前記目的を達成するために検出手段として、正
常時には、少なくとも2個以上、偶数対の同数直並列接
続構成されたコンデンサ群に対し通流するコンデンサリ
プル電流の方向が互いに相殺する極性で変流器を介して
検出するように構成する。異常時すなわちコンデンサの
ショート及びオープン故障によるアンバランス電流発生
時には前記変流器を介して異常時の電流差により得られ
た電圧信号が所定レベルを逸脱したことから無理なくコ
ンデンサの異常の検出が可能となるよう構成したことを
特徴とするコンデンサ異常検出回路である。
(Means for Solving the Problems) In order to achieve the above object, the present invention uses a capacitor ripple that conducts current to a group of at least two or more capacitors connected in series and parallel with the same number of even pairs in a normal state. The current direction is configured to be detected through a current transformer with polarity that cancels each other out. In the event of an abnormality, that is, when an unbalanced current occurs due to a short or open failure of the capacitor, the voltage signal obtained from the current difference during the abnormality via the current transformer deviates from a predetermined level, so it is possible to easily detect the abnormality of the capacitor. This is a capacitor abnormality detection circuit characterized in that it is configured so that.

(作用) 本発明によれば、前述の通り、異常時のコンデンサリプ
ル電流のアンバランス電流を検出する手段を具備するこ
とにより、複数個直並列接続構成したコンデンサ群の異
常を検出できるので、大容量化や高圧化した場合でもコ
ンデンサの構成に見合った検出回路を提供することがで
きる。
(Function) According to the present invention, as described above, by providing a means for detecting the unbalanced current of the capacitor ripple current at the time of an abnormality, it is possible to detect an abnormality in a group of capacitors in which a plurality of capacitors are connected in series and parallel. Even when the capacitance is increased or the voltage is increased, a detection circuit suitable for the configuration of the capacitor can be provided.

(実施例) 以下、本発明の実施例を図面によって説明する。第1図
は1本発明の一実施例を示すコンデンサ異常検出方式を
示すブロック図である。第6図と同一あるいは同相当部
分には同一符号を付してその説明を省略する。説明上コ
ンデンサ51〜54を第1のコンデンサ群、コンデンサ
55〜58を第2のコンデンサ群とする。 51a〜6
6aは分圧用抵抗、70゜71は変流器、 72.73
は演算増幅器で構成された整流回路、35は可変抵抗器
で、コンデンサ51〜66のいずれかの故障時に発生す
るアンバランス電流により変流器70.71を介して生
ずる電圧信号VDflTが所定レベルVLI!Bを越え
るかどうかを判別するために用いる電圧レベルVLI!
Bを作成する。31〜34は入力抵抗、 21.22は
演算増幅器、 44.45はツェナダイオード、153
,154は反転論理ゲート、150はOR論理回路、1
51は運転中以外に発生する電圧を異常検出としないた
めのインターロック用AND論理回路、152はフリッ
プフロップ回路である。第2図、第3図は、第1図の本
発明の詳細な説明するためのタイムチャートを示してい
る。第2図はコンデンサ51が運転中、オープン故障と
なった場合、第3図はコンデンサ51がショート故障し
た場合のタイムチャートを示している。第2図時刻t0
から運転を開始し、時刻1.にて、コンデンサ51が、
オープン故障したと仮定する。(a)は変流器70の2
次電流を示し、時刻t0〜1.の期間は第1のコンデン
サ群51〜54を通流するリプル電流工に、と第2のコ
ンデンサ群55〜58を通流するリプル電流IRz が
互いに相殺する極性で変流器70に対し、磁束変化を生
じるため、変流器70の2次出力は零である0時刻1.
以後は、コンデンサ51がオープン故障となるため、第
1のコンデンサ群のリプル電流IRxは、はぼ零(コン
デンサ分圧抵抗の微小電流程度)となるため、第2のコ
ンデンサ群のリプル電流IRz に対応する2水出力I
RDf!丁は第2図(a)に示すように異常電圧を発生
する。(b)は、変流器70の2次出力IRQETの発
生した異常電圧を整流回路73を介して得られる電圧信
号VDI!Tを示している。
(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a capacitor abnormality detection method showing an embodiment of the present invention. Components that are the same or equivalent to those in FIG. 6 are given the same reference numerals, and their explanation will be omitted. For purposes of explanation, capacitors 51 to 54 will be referred to as a first capacitor group, and capacitors 55 to 58 will be referred to as a second capacitor group. 51a-6
6a is voltage dividing resistor, 70°71 is current transformer, 72.73
is a rectifier circuit composed of an operational amplifier, and 35 is a variable resistor, in which the voltage signal VDflT generated through the current transformer 70.71 due to an unbalanced current generated when one of the capacitors 51 to 66 fails is set to a predetermined level VLI. ! Voltage level VLI! used to determine whether it exceeds B!
Create B. 31 to 34 are input resistors, 21.22 is an operational amplifier, 44.45 is a Zener diode, 153
, 154 is an inverting logic gate, 150 is an OR logic circuit, 1
Reference numeral 51 indicates an interlock AND logic circuit for preventing abnormality detection from voltages generated other than during operation, and 152 indicates a flip-flop circuit. FIGS. 2 and 3 show time charts for explaining the invention in FIG. 1 in detail. FIG. 2 shows a time chart when the capacitor 51 has an open failure during operation, and FIG. 3 shows a time chart when the capacitor 51 has a short circuit failure. Figure 2 Time t0
Started driving at time 1. At , the capacitor 51 is
Assume that an open failure has occurred. (a) is current transformer 70-2
The following current is shown, and the time t0 to 1. During the period of , magnetic flux is applied to the current transformer 70 with polarity such that the ripple current IRz flowing through the first capacitor group 51 to 54 and the ripple current IRz flowing through the second capacitor group 55 to 58 cancel each other out. Because of the change, the secondary output of the current transformer 70 is zero at time 1.
After that, since the capacitor 51 becomes an open failure, the ripple current IRx of the first capacitor group becomes almost zero (approximately a minute current of the capacitor voltage dividing resistor), so the ripple current IRz of the second capacitor group becomes Corresponding 2 water output I
RDf! As shown in FIG. 2(a), the terminal generates an abnormal voltage. (b) shows a voltage signal VDI! obtained from the abnormal voltage generated by the secondary output IRQET of the current transformer 70 via the rectifier circuit 73! It shows T.

得られた異常信号■D訂は、可変抵抗器35で設定され
た電圧判定レベルV Ll!Bと抵抗33.34を介し
演算増幅器22で比較され、反転論理ゲート回路154
を介し、波形整形信号v2となる。第2図(C)は、得
られた異常電圧信号v2の変化の様子を示している。
The obtained abnormal signal ■D is the voltage judgment level V Ll! set by the variable resistor 35. B is compared with the operational amplifier 22 through resistors 33 and 34, and the inverting logic gate circuit 154
The waveform shaped signal v2 is obtained through the waveform shaping signal v2. FIG. 2(C) shows how the obtained abnormal voltage signal v2 changes.

異常発生後、装置が停止するまで、「0」→「1」→r
OJ→「1」→と繰り返す、V□はOR論理回路150
、運転しているので、インターロックを受は付けないA
ND論理回路151を介し、フリップフロップ152を
セットし、故障信号FAULTが、「0」→「1」へ保
持変化する。第2図(d)は、FAULT信号の「0」
→「1」への変化の状況を示している。
After an error occurs, "0" → "1" → r until the device stops.
OJ→“1”→repeat, V□ is OR logic circuit 150
, since I am driving, I do not install the interlock switch A.
The flip-flop 152 is set via the ND logic circuit 151, and the failure signal FAULT is held and changed from "0" to "1". Figure 2(d) shows the FAULT signal “0”
→ Shows the status of change to “1”.

FAIJLT信号が、rOJ→「1」への変化し、装置
は保護停止する。第3図はコンデンサ51が時刻tFで
ショート故障した場合、51を除く第1のコンデンサ5
2〜54は、第2のコンデンサ群を含む他の健全なコン
デンサ群55〜66の充電電荷により短時間に充電され
る。この時間t、1は、計算例として例えば、配線のイ
ンダクタンス分を1μHと仮定すると、C=5600μ
Fとすると、tv=z孔C= πJl μH・5600
μF=235μs程度と考えられ、この時間tlr−t
wに変流器70の2次出力IRDII!Tは、第3図(
a)のように異常電圧が突出するようになる。tw以後
はコンデンサ51がショートした第1のコンデンサ群と
第2のコンデンサ群のリプル電流の差分のリプル電流に
対する電圧が発生する。この変化に対応し、整流回路7
3の出力IDETも同様の変化を示し、第3図(b)と
なる。VD1!τは異常検出レベルVLI!Bを越える
ため、この時点で反転ゲート回路154の出力Vよは第
3図(c)のように「0」→「1」へ変化する。異常信
号v2はOR論理回路150の入力となり、運転してい
るので、インターロックのかからないAND論理回路1
51 を介しフリップフロップ152をセットする。こ
の時点で第3図(d)に示すようにFAULT信号は、
「0」→「1」へ変化する。これにより装置は保護停止
する6以上は、第1のコンデンサ群51〜54の異常に
対して述べたが、第2のコンデンサ群55〜58に対し
ても同様である。さらに、コンデンサ群59〜62.6
3〜66に対しては、同様に別検出系、変流器71、整
流回路72、演算増幅器21、反転ゲート回路153に
より、異常検出が可能である。
The FAIJLT signal changes from rOJ to "1" and the device stops for protection. FIG. 3 shows that when capacitor 51 has a short-circuit failure at time tF, the first capacitor 5 except for capacitor 51
Capacitors 2 to 54 are charged in a short time with charges from other healthy capacitor groups 55 to 66 including the second capacitor group. As a calculation example, if we assume that the wiring inductance is 1 μH, this time t,1 is C=5600 μH.
If F, tv=z hole C= πJl μH・5600
It is thought that μF=235μs, and this time tlr-t
Secondary output IRDII of current transformer 70 to w! T is shown in Figure 3 (
Abnormal voltage becomes prominent as shown in a). After tw, a voltage is generated corresponding to the ripple current that is the difference between the ripple currents of the first capacitor group and the second capacitor group in which the capacitor 51 is short-circuited. In response to this change, the rectifier circuit 7
The output IDET of No. 3 also shows a similar change, as shown in FIG. 3(b). VD1! τ is the abnormality detection level VLI! At this point, the output V of the inverting gate circuit 154 changes from "0" to "1" as shown in FIG. 3(c). The abnormal signal v2 becomes an input to the OR logic circuit 150, and since it is operating, the AND logic circuit 1 is not interlocked.
51 to set the flip-flop 152. At this point, as shown in FIG. 3(d), the FAULT signal is
Changes from "0" to "1". This causes the device to stop protection.6 or more has been described for the abnormality of the first capacitor group 51-54, but the same applies to the second capacitor group 55-58. Furthermore, capacitor groups 59 to 62.6
3 to 66, abnormality detection can be similarly performed using a separate detection system, current transformer 71, rectifier circuit 72, operational amplifier 21, and inverting gate circuit 153.

本発明の他の実施例を第4図に示す。第1図と同一ある
いは、同相当部分には、同一符号を付して、説明は省略
する。変換器70は、コンデンサ群51〜60に対し一
括してリプル電流が互いに相殺し、正常時のバランス状
態では、磁束変化が2次誘起電力を生じないような極性
で使用している。絶対値増幅回路72以降は、第1図と
同様に動作し故障FAIJLT カ、  丁OJ→「1
」へ変化することにより装置は保護停止するよう構成し
ている0以上、本発明の実施例について説明したが、上
述の例は単に一例を示すものである6例えば、コンデン
サ484Pの場合について述べたが、多数個直並列され
るインバータシステムに対しても、本発明は適用可能で
ある。又、変流器の検出位置もN側母線側に限定せず、
P側母線側でも適用可能である。
Another embodiment of the invention is shown in FIG. Components that are the same or equivalent to those in FIG. 1 are designated by the same reference numerals, and their explanation will be omitted. The converter 70 is used with polarity such that the ripple currents of the capacitor groups 51 to 60 cancel each other out, and magnetic flux changes do not generate secondary induced electromotive force in a normal balanced state. Absolute value amplification circuit 72 and subsequent parts operate in the same manner as shown in Fig. 1.
Although the embodiments of the present invention have been described, the above example is merely an example.6 For example, the case of capacitor 484P has been described. However, the present invention is also applicable to an inverter system in which a large number of inverters are connected in series and parallel. In addition, the detection position of the current transformer is not limited to the N side bus bar side,
It is also applicable to the P side bus bar side.

〔発明の効果〕〔Effect of the invention〕

以上1本発明の実施例について説明したが。 One embodiment of the present invention has been described above.

本発明では、主回路側で電流差を検出できる構成として
いるので、制御回路側での差動増幅が省略でき、コンデ
ンサの異常を検出する手段として電流検出器や電圧検出
器を全数設けることなく、必要数に低減して設けるメリ
ットがある。多数直並列接続したコンデンサの異常検出
のため変流器を設けているので、1〜2個のコンデンサ
の故障でも早期に異常検出が可能であり、信頼性の高い
インバータシステムを達成できる。又、変流器は。
In the present invention, since the configuration is such that the current difference can be detected on the main circuit side, differential amplification on the control circuit side can be omitted, and there is no need to provide all current detectors and voltage detectors as a means of detecting capacitor abnormalities. , there is an advantage of reducing the number to the required number. Since a current transformer is provided to detect abnormalities in a large number of capacitors connected in series and parallel, it is possible to detect abnormalities at an early stage even if one or two capacitors fail, and a highly reliable inverter system can be achieved. Also, the current transformer.

コンデンサの充放電電流がバランスしている状態で、互
いに相殺し磁束変化が2次誘起電力を生じない構成とし
ているので、コンデンサの劣化による静電容量の変化に
対しても、検出レベルの調整により検出が可能であり、
定期点検の手間を省くことも考えられる。
Since the capacitor's charging and discharging currents are balanced, they cancel each other out, and changes in magnetic flux do not generate secondary electromotive force. Therefore, changes in capacitance due to capacitor deterioration can be avoided by adjusting the detection level. It is possible to detect
It is also possible to save the time and effort required for periodic inspections.

【図面の簡単な説明】[Brief explanation of the drawing]

第imlは本発明の一実施例を示す構成図、第2図は第
1図を説明するタイムチャート、第3図は第1図を説明
するタイムチャート、第4図は本発明の他の実施例を示
す構成図、第5図は本発明を適用出来るインバータシス
テム系統図、第6図は第5図のフィルタ回路のコンデン
サの構成図である。 1・・・太陽電池、蓄電池、燃料電池、新型電池等直流
電源、3・・・直流リアクトル、  4・・・インバー
タ。 5・・・直流フィルタコンデンサ、 6・・・インバータ変圧器、7・・・高周波フィルタ、
8・・・連系リアクトル、9.13・・・しゃ断器、1
1・・・変圧器、 12・・・負荷、10・・・交流系
統、51〜66・・・コンデンサ、 51a〜66a・
・・抵抗。 70.71・・・変圧器、 72.73・・・整流回路
。 31〜34・・・抵抗、 35・・・可変抵抗。 21.22・・・演算増幅器、 44.45・・・ツェ
ナダイオ−V153.154・・・反転論理回路、 150・・・OR論理回路。 151・・・AND論理回路。 152・・・フリップフロップ。
FIG. 2 is a time chart explaining FIG. 1, FIG. 3 is a time chart explaining FIG. 1, and FIG. 4 is a block diagram showing an embodiment of the present invention. FIG. 5 is an inverter system system diagram to which the present invention can be applied, and FIG. 6 is a configuration diagram of a capacitor in the filter circuit of FIG. 5. 1... DC power sources such as solar cells, storage batteries, fuel cells, new batteries, etc., 3... DC reactors, 4... Inverters. 5... DC filter capacitor, 6... Inverter transformer, 7... High frequency filter,
8... Grid connection reactor, 9.13... Breaker, 1
DESCRIPTION OF SYMBOLS 1... Transformer, 12... Load, 10... AC system, 51-66... Capacitor, 51a-66a.
··resistance. 70.71... Transformer, 72.73... Rectifier circuit. 31 to 34...Resistance, 35...Variable resistance. 21.22... Operational amplifier, 44.45... Zener diode-V153.154... Inverting logic circuit, 150... OR logic circuit. 151...AND logic circuit. 152...Flip-flop.

Claims (1)

【特許請求の範囲】[Claims] 直流回路母線に接続され、少なくとも2個以上並列接続
構成したコンデンサ群の異常を検出する回路において、
第1のコンデンサ群のリプル電流と第2のコンデンサ群
のリプル電流が正常時には互いに相殺し、磁束変化が2
次誘起電力を生じさせない方向で少なくとも1個以上の
変流器を介し検出する手段、前記変流器の2次出力にお
いて異常時の電流差による発生電圧が所定レベルを越え
たことを比較検出するコンパレータから構成され、前記
変流器の2次出力が所定レベルを越えたことで、コンデ
ンサの異常を検出することを特徴とするコンデンサ異常
検出回路。
In a circuit that detects an abnormality in a group of capacitors connected to a DC circuit bus bar and configured with at least two or more capacitors connected in parallel,
Under normal conditions, the ripple current in the first capacitor group and the ripple current in the second capacitor group cancel each other out, and the magnetic flux change is 2.
Means for detecting through at least one current transformer in a direction that does not generate secondary induced power, and comparing and detecting that the voltage generated due to the current difference at the time of abnormality exceeds a predetermined level at the secondary output of the current transformer. 1. A capacitor abnormality detection circuit comprising a comparator, and detecting a capacitor abnormality when a secondary output of the current transformer exceeds a predetermined level.
JP2273404A 1990-10-15 1990-10-15 Circuit for detecting abnormality of capacitor Pending JPH04151571A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2273404A JPH04151571A (en) 1990-10-15 1990-10-15 Circuit for detecting abnormality of capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2273404A JPH04151571A (en) 1990-10-15 1990-10-15 Circuit for detecting abnormality of capacitor

Publications (1)

Publication Number Publication Date
JPH04151571A true JPH04151571A (en) 1992-05-25

Family

ID=17527422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2273404A Pending JPH04151571A (en) 1990-10-15 1990-10-15 Circuit for detecting abnormality of capacitor

Country Status (1)

Country Link
JP (1) JPH04151571A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012518159A (en) * 2009-02-16 2012-08-09 ヴァレオ システム テルミク Method for detecting short circuit and supply module using this method
CN110174585A (en) * 2019-06-06 2019-08-27 西南交通大学 A kind of recognition methods of the high-voltage capacitor open circuit fault of double tunning alternating current filter
CN111344580A (en) * 2018-06-29 2020-06-26 株式会社Lg化学 Apparatus and method for testing circuit board included in battery management system

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012518159A (en) * 2009-02-16 2012-08-09 ヴァレオ システム テルミク Method for detecting short circuit and supply module using this method
CN111344580A (en) * 2018-06-29 2020-06-26 株式会社Lg化学 Apparatus and method for testing circuit board included in battery management system
US11262417B2 (en) 2018-06-29 2022-03-01 Lg Energy Solution, Ltd. Apparatus and method for testing circuit board included in battery management system
CN111344580B (en) * 2018-06-29 2022-06-10 株式会社Lg化学 Apparatus and method for testing circuit board included in battery management system
CN110174585A (en) * 2019-06-06 2019-08-27 西南交通大学 A kind of recognition methods of the high-voltage capacitor open circuit fault of double tunning alternating current filter
CN110174585B (en) * 2019-06-06 2020-06-05 西南交通大学 Method for identifying open circuit fault of high-voltage capacitor of double-tuned alternating current filter

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