JPH0414557B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is capable of testing the performance of a circuit that receives a binary signal transmitted in the television band, shapes the waveform, and samples it, such as a teletext receiver. The object of the present invention is to provide a device that generates a signal for the purpose of the present invention.

EMBODIMENT OF THE INVENTION Hereinafter, the present invention will be described in detail with reference to the drawings showing one embodiment thereof.

First, FIG. 1 shows an example of a display screen when a television signal generated by the apparatus according to the present invention is received by a teletext receiver.
FIG. 2 shows the waveform of the television signal generated and transmitted at that time. If the amplitude of the binary signal superimposed on part or all of the horizontal scanning period of the television video signal under normal conditions is 100%, then the amplitude can be changed to 80%, 60%, 50%, etc. The operation of the receiver is tested by superimposing and transmitting a binary signal. At this time, if the DC level of the binary signal is kept constant and only the amplitude is changed, for example, as shown in Figure 3A, when the amplitude is 100%, it becomes W ₁ , and when it is 50%, it becomes W ₂ . If the received signal is sliced and waveform shaped at the level V ₀ in the center of "0" and "1", it will be received as shown in Figure 3B.
It is possible to reproduce the pulse waveform of a regular binary signal such as W ₁ ′ and W′ ₂ .

In this case, if there is no noise in the received signal, it can be received correctly so that a predetermined image can be displayed as shown in FIG. 1 even when the amplitude is 50%.

In the display screen shown in Figure 1, the part with a red background is the part where the amplitude of the binary signal is being transmitted at 100%, and the character "100" indicating 100% amplitude is also displayed here. Is displayed. Below, in the same way, the part with a blue background color displays the text "80" where the amplitude is 80%, and the part with a green background displays the text "60" where the amplitude is 60%, and then , the part with a white background color is the part where the amplitude is 50%, and the character "50" is displayed. In Fig. 1, for convenience, the part shown in black is the binary signal "1" and the other part is transmitted as the binary signal "0". It is transmitted as a binary signal such as "111111010000001000". This signal is selected as a pulse train such that the distortion of the received waveform is large due to interference between codes.

Now, in Figure 2, fix the "0" level and set it to "1".
If only the level is reduced, assuming that the slice level of the receiver is fixed as V ₀ in Figure 3, the correct display as shown in Figure 1 will be obtained when the amplitude is 60% or 50%. It turns out you can't do it. Also,
When the amplitude is 60% and 50%, even if the DC level is the same as when the amplitude is 100% at V ₀ as shown in Figure 3A, it becomes "0" due to the noise contained in the received signal.
→"1" or "1"→"0" reception errors increase, and a white or black dot appears in the lower half of the display in FIG. 1, which is disadvantageous.

That is, by using a television signal on which binary signals with varying amplitudes and DC levels are superimposed, it is possible to easily test the performance of the input signal processing circuit of a character signal receiver.

Also, due to variations in the parts that make up the circuit,
Some character signal receivers may be able to correctly reproduce the waveform only at 80,100 in Figure 1, but at 60,50.
In some cases, the thin width part overlaps with the next part. In such a case, for example, it can be used for inspection in which only character signal receivers that can correctly reproduce waveforms up to 60 degrees are considered to be good products.

Next, regarding a television signal generation circuit of one embodiment that forms such a television signal,
This will be explained with reference to FIG. In FIG. 4, reference numeral 1 denotes a synchronization board and a normal video generating section, and the video signal may be, for example, a normal color bar signal. 2 is a field counter that counts vertical pulses;
One screen from the upper edge of red to the lower edge of white of the screen displayed by binary signal transmission as shown in the figure is 192
If the binary signal for display is superimposed one line per field, then 192 fields can be counted as 192 lines, but for example, if this signal is used for television teletext 192 when transmitting using the method (according to the report of the Radio Technology Council in March 1982).
Assuming that the lines are 12 lines x 16 rows, and one field is used to send a packet to specify the background color for each row, a total of 209 fields are counted, including one field of the page control packet. There is a need to. Therefore, field counter 2 is cleared every time it completes counting 209 fields.

Among the counting outputs of this field counter, the binary counting outputs from "1" to "208", excluding the counting output indicating the field for page control packet transmission which is "0", are used as they are or after conversion. Numeric signal generation ROM (character generator) 3
and is supplied to the amplitude modulation circuit 6. Further, the count output of the field counter 2 is directly supplied to the pattern signal generating ROM 5 and is used as an address signal for designating a vertical line on the display screen as shown in FIG. The ROM 5 outputs one line of pattern signals for displaying patterns other than numbers on the display screen shown in FIG. Furthermore, line number signals (DI ₁ , DI ₂ ) and interrupt signals (SI/DI) are added to each field's signal packet.
IN), framing code signal (FC), and clock run in signal (CRI) are ROM for code signal generation.
9 shall be read out. For pattern signal generation
When the ROM 5 is configured with a high-speed 64K bit ROM, the count output of the field counter 2 specifies the address A ₈ to A ₁₅ , and the clock output from the read clock generation circuit 4 specifies the address A ₀ to _{A 7.}
All you have to do is specify. As this read clock generating circuit 4, for example, the first clock of each field is
A circuit is used to form a total of 296 8/5 _sc clocks from the point of 56t _c (where 1/t _c =8/5 _sc , _sc is the color subcarrier frequency) from the horizontal synchronizing signal at the 20th H.

The contents of the numeric signal generation ROM 3 are such that the numbers "100", "80", "60", and "50" representing the amplitude of the binary signal to be transmitted at that time are displayed on the display screen as shown in Figure 1. It is assumed that the signal can be displayed, is clocked and read out in the same manner as the pattern signal generating ROM 5, and is combined with each signal output from the ROMs 5 and 9 to form a predetermined binary signal. Furthermore, this binary signal is amplitude-modulated by the amplitude modulation circuit 6 to a predetermined amplitude ratio as described above. The method of amplitude modulation is to input the count output of field counter 2 as an address signal to two ROMs of 256 bits each, and when the count output is between "1" and "52", the count output is "1",
1”, “1, 0” for “53” to “104”,
“0, 1” for “105” to “156”, “157” to
When the output is “208”, it outputs “0, 0”, when the output is “1, 1” it is 100%, and when it is “1, 0” it is 80%.
%, “0,1” is 60%, “0,0” is
It is sufficient to modulate the amplitudes to 50% of each other.

In this way, it is possible to generate a television signal in which a character signal as shown in FIG. 5 is superimposed on the 20th H as a binary signal.

Next, an example of the amplitude modulation circuit 6 is shown in FIG.
In the figure, 10, 11, and 12 are AND gates for selectively outputting read signals from each ROM 3, 5, and 9, and 13 is an OR gate. It is assumed that the desired gate pulse used here is also generated by the read clock generation circuit. A gate pulse x for outputting a numerical signal is supplied to the AND gate 10, which is at a high level only during the periods indicated by the numbers in FIGS. 1 and 5, and the output of the inverter 15 is Since the level becomes low, the AND gate 11 is cut off. Furthermore, the AND gate 12 is supplied with a gate pulse y for code signal output which is at a high level only during the period of the 48-bit code signal from CRI to DI ₂ in FIG.
AND gate 11 is blocked. Therefore, the OR gate 13 outputs a binary character signal from the clock run-in signal CRI to the end of the pattern signal shown in FIG. AND gate 14 is
For safety, OR is performed by a gate pulse z that is at a high level from the start of the CRI signal to the end of the pattern signal.
This is an AND gate that gates the output of gate 12.

Reference numeral 17 includes an emitter follower-connected transistor that converts the TTL level binary signal output from the AND gate 14 into an analog signal output level.

On the other hand, 25 has two 256-bit units each using the count output of field counter 2 as the address input.
Corresponding to the counting output of field counter 2 in the ROM, that is, corresponding to the display position on the display screen as shown in FIG. ”, “1,0”, “0,
1", "0, 0". This output is added to the decoder 26 and converted, and during the period corresponding to the upper 1/4 of the display screen in Fig. 1, the three outputs a, b, and c are is set to a low level, output c is set to a high level in a period equivalent to the next 1/4, output b is set to a high level in a period equivalent to the next 1/4, and output peak is set to a high level in a period equivalent to the lower 1/4. Then, the transistors 22, 23, 24 are connected to the respective outputs a, b, and c.
The resistance value of the emitter resistor of the transistor 17 is switched by making each of them conductive. At this time, the values of resistors 18, 19, 20, and 21 are respectively: Resistor 18 + Resistor 19 + Resistor 20 / Resistor 18 + Resistor 19 + Resistor 20 +
Resistor 21 = 0.5 Resistor 18 + Resistor 19 / Resistor 18 + Resistor 19 + Resistor 20 + Resistor 21 =
0.6 Resistor 18/Resistor 18 + Resistor 19 + Resistor 20 + Resistor 21 = 0.8 If you set it to satisfy the following, transistor 17
output from the emitter and supply it to the mixing circuit 7 2
The amplitude ratio of the value signal can be switched from the top of the display screen to 100%, 80%, 80%, and 50% in 1/4 section increments. However, since the maximum value of the output voltage at the emitter of the transistor 17 is close to the TTL level, it goes without saying that it is necessary to convert it to an appropriate level in order to mix it with the television video signal in the mixing circuit 7.

With the above configuration, a pattern signal for displaying a number (number signal) indicating a numerical value corresponding to a change in the output amplitude of a binary signal superimposed on a television video signal can be generated together with a pattern signal of the display figure shown in FIG. Can be sent. Therefore, the receiving device of the receiver can be tested by observing the displayed graphics for each amplitude portion. Note that the number indicating the amplitude of this binary signal may be expressed as a single digit such as "10", "9", "8", etc., or may be expressed as a symbol such as "A", "B", "C"... But that's fine. In this case, as shown in Figure 1, if the width of the vertical pattern in the part of the number or symbol representing the amplitude is made narrower than the width of the part of the cover, there will be a large portion left unaffected by the display of the number or symbol. , so as not to interfere with the original test function.

Note that to change the background color, for example, the sixth
In the figure, another set of ROMs 25 for conversion is provided to make four 256-bit ROMs, and the output thereof is converted into an error correction code and sent as a color control packet (particularly a bucket packet for background color control). .

The above explanation is based on the television text multiplex broadcasting system of the pattern transmission system in the March 1983 report of the Radio Technology Council, but it is applicable to foreign systems such as the CEEFAX system. The present invention can be applied in exactly the same way to teletext broadcasting systems using code transmission. For example, in the case of the code transmission method, only the vertical striped figures in the display figure shown in Figure 1 change to characters;
It is easy to display numerical values on some of them.

Furthermore, in the above explanation, only the case where the amplitude of the binary signal to be superimposed is changed is described, but it is also possible to change the DC level of the binary signal to be superimposed and insert a display signal indicating the DC level. Needless to say, it is okay.

As described above, according to the present invention, when a binary signal is superimposed on a television video signal, a display signal that changes the amplitude or DC level and displays a display corresponding to the amount of change is also inserted. Since a binary signal multiplexed television signal is generated by using a binary signal, when testing a receiver that receives the binary signal, it is possible to check how the reception condition changes with respect to changes in the amplitude or DC level of the binary signal. Therefore, it is possible to obtain a useful signal generating device that allows the user to observe whether the signal changes while referring to the display of the amount of change, and allows the test to be performed clearly and easily.

[Brief explanation of drawings]

FIG. 1 is a front view of a display figure displayed after receiving a television signal generated by a television signal generator according to an embodiment of the present invention; FIG.
FIG. 3 is a waveform diagram of the television signal, FIG. 4 is a block diagram of the apparatus, FIG. 5 is a waveform diagram of the television signal, and FIG. 6 is a specific circuit diagram of a portion of the apparatus. 1... Synchronous board and video generation section, 2... Field counter, 3... ROM for numeric signal generation, 4... Read clock generation circuit, 5... For pattern signal generation
ROM, 6...amplitude modulation circuit, 7...mixed rotation, 8...
RF modulation circuit, 9...ROM for code signal generation, 1
0, 11, 12, 14...AND gate, 13...OR
gate, 15...conversion ROM, 16...decoder,
17...Transistor, 18, 19, 20, 21...
Resistor, 22, 23, 24...transistor.

Claims (1)

[Scope of Claims] 1. A receiving device that receives a television multiplexed information signal transmitted as a binary signal, performs waveform shaping to reproduce the binary signal, and displays information represented by the binary signal on a screen. A television signal generation device that superimposes a test binary signal for testing on part or all of the horizontal scanning period of a television video signal and transmits the same, wherein the superimposed test binary signal transmits a horizontal scanning line. A circuit that changes the amplitude or DC level of a signal with the same waveform in units at different locations within one screen, and numbers or symbols representing the amount of change at each location, together with the pattern displayed by the binary test signal. A television signal generating device comprising: a circuit for inserting a display signal to be displayed on the screen into a part of the test binary signal at each location and transmitting the signal. 2. The color of the pattern displayed by the test signal and the color of the numbers or symbols displayed by the display signal at each stage of change in the amplitude or DC level of the test binary signal, or the pattern, number or symbol. 2. The television signal generating device according to claim 1, wherein the background color of the television signal is changed.