JPH04139743A - Liquid growing method for insulating film - Google Patents

Liquid growing method for insulating film

Info

Publication number
JPH04139743A
JPH04139743A JP26285590A JP26285590A JPH04139743A JP H04139743 A JPH04139743 A JP H04139743A JP 26285590 A JP26285590 A JP 26285590A JP 26285590 A JP26285590 A JP 26285590A JP H04139743 A JPH04139743 A JP H04139743A
Authority
JP
Japan
Prior art keywords
wafer
insulating film
ions
solution
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26285590A
Other languages
Japanese (ja)
Inventor
Masakazu Muroyama
雅和 室山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP26285590A priority Critical patent/JPH04139743A/en
Publication of JPH04139743A publication Critical patent/JPH04139743A/en
Pending legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To increase the deposition rate of an SiO2 to be precipitated on a wafer by adding boric acid by charging the surface of a wafer to positive charge by applying a voltage, moving SiO3<2-> ions having negative charge toward the wafer, and enhancing concentration of the ions near the wafer. CONSTITUTION:Hexafluorosilicic acid solution 3 is put in a solution tank 1, SiO2 particles are dissolved in the solution, SiO3<2-> ions are produced and held in an equilibrated state. Then, boric acid (H3BO3) solution is added to precipitate SiO2 on the surface of a wafer 3, and a voltage of several volts several tens of volts is applied from a DC power source 4 to the wafer 2 so that positive charge is particularly accumulated. Reference numeral 5 denotes a negative electrode for storing negative charge, which is formed, for example, of carbon, silicon carbide, etc., and connected to a negative electrode wiring 6 of the source 4. Thus, an insulating film (SiO2 film) can be formed not only with flatness on the wafer but also at a greater deposition rate.

Description

【発明の詳細な説明】 し産業上の利用分野] 本発明は、絶縁膜の液相成長方法に関する。[Detailed description of the invention] [Industrial application fields] The present invention relates to a method for liquid phase growth of an insulating film.

[発明の概要] 本発明は、珪弗化水素酸溶液中に、5iOzを溶解させ
てSiO32−イオンを生成し、次にホウ酸溶液を添加
してウェハ上に5iOzを堆積させる絶縁膜の液相成長
方法において、 前記ウェハの表面に正電荷が帯電し得るように電圧を印
加し、該ウェハ近傍のSiO32−イオンの濃度を高め
たことにより、 ウェハ上に析出して堆積する絶縁膜の成長速度を高める
と共に、この絶縁膜の膜質を向上することが可能となる
[Summary of the Invention] The present invention provides an insulating film solution in which 5iOz is dissolved in a hydrosilicofluoric acid solution to generate SiO32- ions, and then a boric acid solution is added to deposit 5iOz on a wafer. In the phase growth method, a voltage is applied so that the surface of the wafer can be positively charged, and the concentration of SiO32- ions near the wafer is increased, whereby an insulating film is deposited and deposited on the wafer. It becomes possible to increase the speed and improve the film quality of this insulating film.

[従来の技術] 超LSIの高密度・高集積化に伴い配線の微細化、多層
化が必須となっており、微細な多層配線構造を形成する
場合や高アスペクト比の段差の平坦化には層間絶縁膜の
平坦化が増々重要になってきている。
[Conventional technology] As the density and integration of VLSI increases, the miniaturization and multilayering of wiring have become essential. Planarization of interlayer insulating films is becoming increasingly important.

斯る層間絶縁膜の平坦化方法としては、近年、バイアX
−ECR−CVD法と、液相CVD法と、液相成長法が
特に有効であると考えられている。
In recent years, as a method for planarizing such an interlayer insulating film, via
-ECR-CVD method, liquid phase CVD method, and liquid phase growth method are considered to be particularly effective.

ここで、バイアス・ECR−CVD法とは、バイアス・
ECR−CVDにおいて堆積とエツチングを同時に行い
得るように条件を設定した平坦化方法である。
Here, the bias/ECR-CVD method refers to the bias/ECR-CVD method.
This is a planarization method in which conditions are set so that deposition and etching can be performed simultaneously in ECR-CVD.

また、液相CVD法は、テトラエトキシシラン(TEO
S)をウェハ表面で液化し、これを0゜プラズマに晒す
ことにより酸化する方法である。
In addition, the liquid phase CVD method uses tetraethoxysilane (TEO
This method liquefies S) on the wafer surface and oxidizes it by exposing it to 0° plasma.

さらに、液相成長方法は、第4図に示すように、溶液槽
l内に珪弗化水素酸(HtS i pa)溶液を入れ、
この溶液に5iOzを溶解して5iOi’−イオンを電
離させ、溶液中にウェハ2を浸漬する。
Furthermore, in the liquid phase growth method, as shown in FIG.
5iOz is dissolved in this solution to ionize 5iOi'- ions, and the wafer 2 is immersed in the solution.

次に、ホウ酸(Hs B O3)溶液を加えることによ
りS’rOtをウェハ2表面に析出させて堆積させるこ
とにより絶縁膜を形成する。
Next, an insulating film is formed by precipitating and depositing S'rOt on the surface of the wafer 2 by adding a boric acid (Hs B O3) solution.

特に、上記した方法の中で液相成長方法は、低温条件(
〜40℃)での絶縁膜形成が可能であること、装置自体
が簡単であること、及びウェハ表面にレジストを付けた
ままで絶縁膜の成長が可能であることなどの点で利点を
有している(「月刊Sem1conductor  W
orld1990.7月号第85頁」参照) 「発明が解決しようとする課題] 上記した液相成長方法にあっては、以下の(A)(B)
の化学反応式に示すように、ホウ酸(83BO8)を加
えることにより、式(B)の化学反応が右方向に進行し
、弗化水素酸(HP)が消費され、ル・シャトリエの法
則に従って、式(A)で示す化学反応が右方向に進行し
5iOyがウェハ上に自然析出する反応機構を有してい
る。
In particular, among the above-mentioned methods, the liquid phase growth method uses low-temperature conditions (
This method has advantages in that it is possible to form an insulating film at a temperature of ~40°C), the equipment itself is simple, and the insulating film can be grown with the resist attached to the wafer surface. (“Monthly Sem1conductor W
(See page 85 of July 1990 issue) "Problems to be Solved by the Invention" In the above liquid phase growth method, the following (A) and (B)
As shown in the chemical reaction formula, by adding boric acid (83BO8), the chemical reaction of formula (B) proceeds to the right, hydrofluoric acid (HP) is consumed, and according to Le Chatelier's law, , has a reaction mechanism in which the chemical reaction shown by formula (A) proceeds in the right direction and 5iOy is spontaneously deposited on the wafer.

HtS i F a”2 HtO→6 HF4S i 
OtJ・・・・(A) HsBOs+4 HF →BF、+H,0°+2H,O
+e・ ・ ・ ・ (B) ここで、溶解したS 10 mは、溶液内では5i03
”−イオンとなって存在すると考えられ、ウェハ近傍の
このSin、トイオンが5iftとして自然析出してい
る。
HtS i F a”2 HtO→6 HF4S i
OtJ・・・(A) HsBOs+4 HF →BF, +H,0°+2H,O
+e・・・・・(B) Here, the dissolved S 10 m is 5i03 in the solution
It is thought that these ions exist as "- ions," and these Sin and To ions are naturally precipitated as 5ifts near the wafer.

このように、液相成長法は、5iOpの自然析出により
成膜を行うため、絶縁膜の成長速度が数100人〜数1
000人/hr’、と遅く、実用上大きな問題点となっ
ていた。
In this way, in the liquid phase growth method, since the film is formed by spontaneous precipitation of 5iOp, the growth rate of the insulating film is from several 100 to several 1
000 people/hr', which was a big problem in practice.

本発明は、このような従来の問題点に着目して創案され
たものであって、高速成膜を可能にし、膜質の向上も期
し得る絶縁膜の液相成長方法を得んとするものである。
The present invention was devised by focusing on these conventional problems, and aims to provide a liquid phase growth method for insulating films that enables high-speed film formation and is also expected to improve film quality. be.

[課題を解決するための手段] そこで、本発明は、珪弗化水素酸溶液中に、5iOyを
溶解させてSiO32−イオンを生成し、次にホウ酸溶
液を添加してウェハ上に5iOyを堆積させる絶縁膜の
液相成長方法において、前記ウェハの表面に正電荷が帯
電し得るように電圧を印加し、該ウェハ近傍のSiO+
”−イオンの濃度を高めたことを、その解決方法として
いる。
[Means for Solving the Problem] Therefore, the present invention dissolves 5iOy in a hydrosilicofluoric acid solution to generate SiO32- ions, and then adds a boric acid solution to form 5iOy on a wafer. In the liquid phase growth method of the insulating film to be deposited, a voltage is applied so that the surface of the wafer can be positively charged, and SiO+ near the wafer is
``The solution is to increase the concentration of ions.

[作用] 電圧を印加してウェハ表面に正電荷が帯電すると、負の
電荷を有するS i Os”−イオンはウェハに向かっ
て移動し、ウェハ近傍でのSfO,”−イオン濃度は高
くなる。このため、ホウ酸添加によりウェハ上に析出す
るSiOxの成長速度は増加する。
[Operation] When a voltage is applied and the wafer surface is positively charged, the negatively charged SiOs"- ions move toward the wafer, and the SfO,"- ion concentration near the wafer increases. Therefore, the growth rate of SiOx deposited on the wafer increases by adding boric acid.

[実施例] 以下、本発明に係る絶縁膜の液相成長方法の詳細を図面
に示す実施例に基づいて説明する。
[Example] Hereinafter, details of the liquid phase growth method of an insulating film according to the present invention will be described based on an example shown in the drawings.

(第1実施例) 本実施例は、第1図に示すように、溶液槽I内に、珪弗
化水素酸溶液3を入れ、この溶液にS iOv粒子を溶
解させ、SiO32−イオンを生成し平衡状態に保つ。
(First Example) In this example, as shown in FIG. 1, a hydrosilicic acid solution 3 is placed in a solution tank I, SiOv particles are dissolved in this solution, and SiO32- ions are generated. and maintain equilibrium.

次に、ホウ酸(Hs B Os )溶液を添加し、Si
n、をウェハ2表面に析出させるものであるが、ウェハ
2には、特に正電荷がたまるように直流1ac4により
数V〜数10Vの電圧が印加されている。なお、図中は
、負電荷をためる負電極5であり、例えば炭素、炭化ケ
イ素などで形成され直流電源4の負電極配線6に接続さ
れている。
Next, a boric acid (HsBOs) solution is added and the Si
n, is deposited on the surface of the wafer 2, and a voltage of several volts to several tens of volts is applied to the wafer 2 by direct current 1ac4 so as to accumulate particularly positive charges. The figure shows a negative electrode 5 that stores negative charges, is made of carbon, silicon carbide, etc., and is connected to a negative electrode wiring 6 of the DC power source 4.

なお、本実施例においては、溶液槽lに基づく装置をバ
ッチ式としたため、直流電源4からの正電極配線7は、
複数のウェハ2に接続されるように、その端末7aは複
数に分けられている。また、これら正電極配線7の端末
7aは、図示しないがウェハ2に対してクランプ又はサ
セプタで支持している。このように、ウェハ2に正電荷
をためることによって、5in3”−イオンは静電気的
作用を受けてウェハ2の近傍に引きつけられる。このた
め、ウェハ2近傍の5iOa”−イオンの濃度は高くな
っている。この状態で、ホウ酸(H−B O3)溶液を
添加することにより、上記した式(A)の平衡を右方向
に移動させると、5i03’−イオンはウェハ2の近傍
で濃度が高いためウェハ2表面に速やかに析出する。
In addition, in this example, since the apparatus based on the solution tank I was a batch type, the positive electrode wiring 7 from the DC power supply 4 was
The terminal 7a is divided into a plurality of parts so as to be connected to a plurality of wafers 2. Further, the terminals 7a of these positive electrode wirings 7 are supported by clamps or susceptors relative to the wafer 2, although not shown. In this way, by accumulating positive charges on the wafer 2, the 5in3"-ions are attracted to the vicinity of the wafer 2 due to electrostatic action. Therefore, the concentration of 5iOa"-ions near the wafer 2 becomes high. There is. In this state, by adding a boric acid (H-B O3) solution, the equilibrium of the above equation (A) is shifted to the right. Since the concentration of 5i03'- ions is high near the wafer 2, the 5i03'- ions are 2. Rapidly deposits on the surface.

即ち、本実施例は、ウェハ表面上に、平坦性を有するこ
とは勿論のこと、絶縁膜(S i Oを膜)を成長速度
が速く形成することが可能となる。また、ウェハ近傍に
析出して成長種となる5in3’−イオンが多数存在す
るため、初期の膜種の形成も良好となり膜質を良好にす
る利点がある。
That is, in this embodiment, it is possible to form an insulating film (SiO film) at a high growth rate on the wafer surface, as well as having flatness. Furthermore, since there are a large number of 5in3'-ions that precipitate near the wafer and become growth seeds, there is an advantage that the initial film seeds are formed well and the film quality is improved.

次に、ウェハ上に絶縁膜を形成する工程を、第2図A〜
第2図りに基づいて説パ−゛する。
Next, the process of forming an insulating film on the wafer is shown in FIGS.
Explain based on the second diagram.

第2図Aに示すように、例えばSin、で形成されてい
る下履絶縁膜8上に、アルミニウム配線層9をスパッタ
法などにより堆積させた後、リソグラフィー技術を用い
てレジストパターン10を形成する。
As shown in FIG. 2A, after an aluminum wiring layer 9 is deposited by sputtering or the like on an insulating film 8 made of, for example, Sin, a resist pattern 10 is formed using a lithography technique. .

次に、第2図Bに示すように、レジストパターンIOを
マスクとしてアルミニウム配線層9を異方性エツチング
し、下層絶縁膜8を露出させる。
Next, as shown in FIG. 2B, the aluminum wiring layer 9 is anisotropically etched using the resist pattern IO as a mask to expose the lower insulating film 8.

そして、この状態で、第1図に示した溶液槽l内に浸漬
し、上記した方法に基づいて液相成長方法を行い、第2
図Cに示すような、S i Oを絶縁膜11を液相成長
させる。この場合、同図Cに示すように、S j Oを
絶縁膜11をアルミニウム配線層9の厚さと略同じく形
成する。
Then, in this state, it is immersed in the solution bath l shown in FIG. 1, and the liquid phase growth method is performed based on the method described above.
An insulating film 11 of SiO is grown in a liquid phase as shown in FIG. In this case, as shown in FIG. 3C, the S j O insulating film 11 is formed to have substantially the same thickness as the aluminum wiring layer 9 .

次に、ウェハを溶液槽lより取り出し、レジストパター
ンIOを例えばアッシングなどの技術を用いて除去した
後、段着被覆性のよいプラズマCVD法によりSid!
膜12膜形2する。
Next, the wafer is taken out from the solution bath 1, the resist pattern IO is removed using a technique such as ashing, and then Sid!
Membrane 12 membrane type 2.

本実施例は、5int絶縁膜11とS i Ov膜12
で層間絶縁膜が形成できるが、Sin、絶縁膜11を液
相成長方法で形成することにより、CVD法で絶縁膜を
堆積させる方法に比べて、平坦性を著しく向上すること
が可能となる。
In this example, a 5-inch insulating film 11 and a S i Ov film 12 are used.
However, by forming the Sin insulating film 11 using the liquid phase growth method, it is possible to significantly improve the flatness compared to the method of depositing the insulating film using the CVD method.

(第2実施例) 第3図A〜第3図Eは、本発明をトレンチの形成に適用
した第2実施例を示している。
(Second Embodiment) FIGS. 3A to 3E show a second embodiment in which the present invention is applied to trench formation.

先ず、本実施例においては、シリコン基板I3上に、レ
ジストを塗布し、リソグラフィー技術を用いてレジスト
パターン14を形成しく第3図A)、これをマスクとし
てシリコン基板13をエツチングしてトレンチ溝I5を
形成する(第3図B)。
First, in this embodiment, a resist is applied onto the silicon substrate I3, and a resist pattern 14 is formed using lithography technology (FIG. 3A). Using this as a mask, the silicon substrate 13 is etched to form a trench groove I5. (Figure 3B).

次に、シリコン基板13(ウェハ)を第1実施例と同様
の液相成長方法により、第1図に示す溶液槽lに浸漬し
、5iOyを上記トレンチ溝15内に析出させてトレン
チ16を形成させる(第3図C)。このとき、トレンチ
I6の上面は、シリコン基板13の表面よりやや突出す
る程度まで成長させる。
Next, the silicon substrate 13 (wafer) is immersed in the solution bath l shown in FIG. 1 by the same liquid phase growth method as in the first embodiment, and 5iOy is deposited in the trench groove 15 to form the trench 16. (Figure 3C). At this time, the upper surface of the trench I6 is grown to such an extent that it slightly protrudes from the surface of the silicon substrate 13.

次に、レジストパターン14を除去した後、第3図りに
示すように、プラズマCVD法にて例えばS i Oを
膜17を堆積させ、第3図Eに示すようになるまでエツ
チングして上面の平坦なトレンチ16が形成される。
Next, after removing the resist pattern 14, as shown in Figure 3, a film 17 of SiO, for example, is deposited by plasma CVD and etched until it becomes as shown in Figure 3E. A flat trench 16 is formed.

以上、第1.第2実施例について説明したが、本発明は
これらの実施例に限定されるものではなく、その構成の
要旨に付随する各種の設計変更が可能であり、例えば、
上記実施例においては、溶液槽lをバッチ式としたが、
枚葉式であっても勿論よい。
Above is the first part. Although the second embodiment has been described, the present invention is not limited to these embodiments, and various design changes can be made in accordance with the gist of the configuration. For example,
In the above embodiment, the solution tank L was a batch type, but
Of course, a single-wafer type may also be used.

また、上記両実施例においては、レジストを付した状態
で絶縁膜の液相成長を行ったが、レジストを除去した後
に行っても良い。
Furthermore, in both of the above embodiments, the liquid phase growth of the insulating film was performed with the resist applied, but the growth may be performed after the resist is removed.

さらに、本発明においては、溶液槽内の溶液を循環させ
、フィルターを用いてパーティクルを除去するようにし
てもよい。
Furthermore, in the present invention, the solution in the solution tank may be circulated and particles may be removed using a filter.

[発明の効果コ 本発明に係る絶縁膜の形成方法にあっては、ウェハに正
電荷をためるようにしたため、析出して5iOyとなる
s + O3”−イオンの濃度がウェハ近傍で高くなり
、絶縁膜の成長速度(成長率)を高める効果がある。
[Effects of the Invention] In the method for forming an insulating film according to the present invention, since positive charges are stored in the wafer, the concentration of s + O3''- ions that precipitate to become 5iOy becomes high near the wafer. This has the effect of increasing the growth rate (growth rate) of the insulating film.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の絶縁膜の液相成長方法の第1実施例の
説明図、第2図A〜第2図りは第1実施例の工程を示す
断面図、第3図A〜第3図Eは第2実施例の工程を示す
断面図、第4図は従来例の説明図である。 2・・・ウェハ、3・・・珪弗化水素酸溶液、4・・・
直流電源、11・・・5top絶縁膜、I6・・・トレ
ンチ。 %1 慣=万乞1り’lのMs八へ 第1図 第2図A 第2図B (−一一1*Jt啼夕11) 第2図D 第8図E
FIG. 1 is an explanatory diagram of the first embodiment of the liquid phase growth method for an insulating film of the present invention, FIGS. FIG. E is a sectional view showing the process of the second embodiment, and FIG. 4 is an explanatory diagram of the conventional example. 2...Wafer, 3...Hydrosilicic acid solution, 4...
DC power supply, 11...5 top insulating film, I6...trench. %1 Hajime=10000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D

Claims (1)

【特許請求の範囲】[Claims] (1)珪弗化水素酸溶液中に、SiO_2を溶解させて
SiO_3^2^−イオンを生成し、次にホウ酸溶液を
添加してウェハ上にSiO_2を堆積させる絶縁膜の液
相成長方法において、 前記ウェハの表面に正電荷が帯電し得るように電圧を印
加し、該ウェハ近傍のSiO_3^2^−イオンの濃度
を高めたことを特徴とする絶縁膜の液相成長方法。
(1) A method of liquid phase growth of an insulating film in which SiO_2 is dissolved in a hydrosilicofluoric acid solution to generate SiO_3^2^- ions, and then a boric acid solution is added to deposit SiO_2 on the wafer. A method for liquid phase growth of an insulating film, characterized in that a voltage is applied so that the surface of the wafer can be positively charged to increase the concentration of SiO_3^2^- ions in the vicinity of the wafer.
JP26285590A 1990-09-28 1990-09-28 Liquid growing method for insulating film Pending JPH04139743A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26285590A JPH04139743A (en) 1990-09-28 1990-09-28 Liquid growing method for insulating film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26285590A JPH04139743A (en) 1990-09-28 1990-09-28 Liquid growing method for insulating film

Publications (1)

Publication Number Publication Date
JPH04139743A true JPH04139743A (en) 1992-05-13

Family

ID=17381566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26285590A Pending JPH04139743A (en) 1990-09-28 1990-09-28 Liquid growing method for insulating film

Country Status (1)

Country Link
JP (1) JPH04139743A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07153755A (en) * 1993-10-15 1995-06-16 Nec Corp Manufacture of semiconductor device
JP2013161910A (en) * 2012-02-03 2013-08-19 Osaka Prefecture Univ Semiconductor device manufacturing method, semiconductor device, infrared sensor manufacturing method and infrared sensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07153755A (en) * 1993-10-15 1995-06-16 Nec Corp Manufacture of semiconductor device
JP2013161910A (en) * 2012-02-03 2013-08-19 Osaka Prefecture Univ Semiconductor device manufacturing method, semiconductor device, infrared sensor manufacturing method and infrared sensor

Similar Documents

Publication Publication Date Title
US20200331762A1 (en) Diamond-Like Carbon Film
TWI384545B (en) Focusing ring, plasma etch device and plasma etching method
TW202044375A (en) Formation of bottom isolation
JPH04348557A (en) Production of semiconductor device
CN109979829A (en) Silicon carbide activates method for annealing
JPH08222569A (en) Copper wiring manufacture, semiconductor device, and copper wiring manufacture device
JPH04139743A (en) Liquid growing method for insulating film
JP2003234412A (en) Method of manufacturing electronic component incorporated with guidance micro component
US20200135466A1 (en) High density carbon films for patterning applications
JPH10270434A (en) Semiconductor wafer cleaning method for oxide film forming method
JPH0813165A (en) Method for etching silicon
US11495454B2 (en) Deposition of low-stress boron-containing layers
US11791155B2 (en) Diffusion barriers for germanium
CN114761519B (en) Micromachining agent and micromachining method
US11404263B2 (en) Deposition of low-stress carbon-containing layers
JPH0432228A (en) Dry etching method and manufacture of semiconductor device using it
US20240030010A1 (en) Etching method and plasma processing apparatus
US20230036572A1 (en) Structure formation in a semiconductor device
JPH10223556A (en) Manufacturing method of semiconductor device
JPH0963955A (en) Film-forming device, film formation and manufacture of single crystal film
US5714406A (en) Method for forming film on semiconductor substrate by thermal CVD method
Kroll et al. Formation of silica films on silicon using silane and carbon dioxide
KR100348313B1 (en) Method for fabricating semiconductor device
JPH11214386A (en) Semiconductor and method for forming insulating film on semiconductor substrate surface
JPH0536645A (en) Dry etching method