JPH04138745A - State information transmission system - Google Patents

Abstract

PURPOSE:To send state information through one signal line by converting plural sets of state information into an internal clock, a high level signal and a low level signal in a package and sending the converted signals. CONSTITUTION:A state detection circuit 12 of a package 1 outputs state information A, B or C. The sets of the state information are made correspondent to an internal clock, a high level (H) and a low level (L) used in the inside of the package 1, a selection control circuit 4 controls a selection circuit 5 according to the correspondence to send the selected state information signal to a package 2 through one signal line.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a state information transmission system, and particularly to a state information transmission system for transferring a plurality of types of state information.

[Conventional technology]

In the conventional status information transmission system of this type, as shown in FIG.
When transferring each state information, a dedicated signal line is used to transmit it.

[Problem to be solved by the invention]

This conventional status information transmission system has a problem in that as the types of status information increase, the number of signal lines for transfer increases accordingly, occupying space within the device.

[Means to solve the problem]

The status information transmission system of the present invention selects one of the internal clock, high, and low signals according to the generation of three types of status information, and transmits the selected signal as a status information signal to one signal line. a second package that receives the status information signal and detects whether it is the internal clock, high or low, and determines the status information generated in the first package. ing.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. The state detection circuit 12 of the package 1 outputs state information A, B, or C. These status information are associated with the internal clock, high (H), low (L) used inside the package 1, as shown in Table 1, and the selection control circuit 4 selects the selection circuit according to this association. 5 to transmit the selected status information signal to the package 2 through one signal line.

Table 1 Package 2 uses a clock detection circuit 6, a high (H) detection circuit 7, and a low (L) detection circuit 8 to detect the received status information signal, and uses the detection result to determine the status. 9 can determine the state of package 1 according to the correspondence in Table 1.

〔Effect of the invention〕

As explained above, the present invention has the effect that state information can be transmitted through a single signal line by replacing multiple pieces of state information with the clock, high, and low signals inside the package. have

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional system. 1.2, 10.11... Package, 4... Selection control circuit, 5... Selection circuit, 6... 2-clock detection circuit, 7... High (H) detection circuit, 8...・Low (L)
Detection circuit, 9... State determination circuit, 12... State detection circuit.

Claims (1)

[Claims] Internal clock, high,
and a first package that selects one of the high and low signals and transmits it as a status information signal to one signal line; and a second package for detecting whether the state information is present and determining the state information generated in the first package.