JPH0413790Y2 - - Google Patents
Info
- Publication number
- JPH0413790Y2 JPH0413790Y2 JP1983091941U JP9194183U JPH0413790Y2 JP H0413790 Y2 JPH0413790 Y2 JP H0413790Y2 JP 1983091941 U JP1983091941 U JP 1983091941U JP 9194183 U JP9194183 U JP 9194183U JP H0413790 Y2 JPH0413790 Y2 JP H0413790Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- level
- image quality
- output
- quality improvement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000001629 suppression Effects 0.000 claims description 2
- 238000001514 detection method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
- Television Signal Processing For Recording (AREA)
Description
【考案の詳細な説明】
(イ) 産業上の利用分野
本考案は、ビデオテープレコーダの再生特性切
換回路に関する。[Detailed description of the invention] (a) Industrial application field The present invention relates to a playback characteristic switching circuit for a video tape recorder.
(ロ) 従来技術
ビデオテープレコーダは、標準録画モードの他
に、録画時間の長時間化を狙つて、長時間録画モ
ードを設定可能にしている。また、ビデオテープ
に付いても、標準テープの他に高画質テープが市
販されている。よつて、ビデオテープレコーダの
再生出力レベルや再生信号のSN比は、録画モー
ドやテープにより様々となる。しかし、ビデオテ
ープレコーダとしては最悪の記録条件下に於て
も、安定な再生画像を得る必要があり、視覚的に
画質を改善する回路が設けられている。これらの
画質改善回路は、再生信号のSN比に関係なく作
動する。しかし、ノイズキヤンセル回路やデイエ
ンフアシス回路等を含む画質改善回路は、ノイズ
を視覚的に軽減するために信号の高域成分を抑圧
しており、再生画像の解像度を落している。よつ
て、高画質テープを用いて標準録画モードで記録
したテープを再生する場合には、前述する様な画
質改善回路は、適正な解像度を失する原因とな
る。(b) Prior Art In addition to the standard recording mode, video tape recorders are capable of setting a long-time recording mode in order to extend the recording time. In addition to standard video tapes, high-definition video tapes are also commercially available. Therefore, the playback output level of the video tape recorder and the SN ratio of the playback signal vary depending on the recording mode and tape. However, as a video tape recorder, it is necessary to obtain stable reproduced images even under the worst recording conditions, and therefore a circuit is provided to visually improve the image quality. These image quality improvement circuits operate regardless of the SN ratio of the reproduced signal. However, image quality improvement circuits including noise canceling circuits, de-emphasis circuits, and the like suppress high-frequency components of signals in order to visually reduce noise, reducing the resolution of reproduced images. Therefore, when reproducing a tape recorded in standard recording mode using a high-quality tape, the above-described image quality improvement circuit causes loss of proper resolution.
(ハ) 考案の目的
そこで、本考案は、再生出力レベルに応じて画
質改善回路の動作を制御して、再生特性を切換え
る新規且有効な再生特性切換回路を提案するもの
である。(c) Purpose of the invention Therefore, the present invention proposes a new and effective reproduction characteristic switching circuit that controls the operation of the image quality improvement circuit according to the reproduction output level and switches the reproduction characteristics.
(ニ) 考案の構成
本考案は、所定レベル以上の再生出力レベルを
判別してデイエンフアシス量又はノイズキヤンセ
ル量を軽減することを特徴とするものである。(d) Structure of the invention The present invention is characterized in that the reproduction output level is determined to be equal to or higher than a predetermined level and the amount of de-emphasis or noise cancellation is reduced.
(ホ) 実施例
以下、本考案を図示せる一実施例に従い説明す
る。図は、本考案の一実施例を示す回路ブロツク
図である。この図より明らかな様に、通常、再生
出力は再生アンプ１にて増幅されAGCアンプ２
入力される。このAGCアンプ２は、増幅出力を
入力とするAGC検波回路３の検波出力を制御入
力としており、出力レベルを一定にしている。
AGCアンプ出力はFM復調回路４に入力され、輝
度信号が復調導出される。輝度信号は、デイエン
フアシス回路５及びノイズキヤンセル回路６を介
して高域を抑圧されて導出され、図示省略したカ
ラー信号処理回路の出力と共に、RF変換されて
テレビジヨン受像機のアンテナ端子に入力され
る。本実施例のデイエンフアシス回路５はエンフ
アシス特性と逆の特性を持つのではなく画質改善
のため2MHzの高域でレベルが6dBダウンする様
に高域成分抑圧している。またノイズキヤンセル
回路６は、ハイパスフイルタを介して得られる高
域成分をリミツタ６ａによつて制限した上で減算
回路６ｂに入力しており、低レベルの高域成分を
キヤンセルしている。(E) Embodiment The present invention will be described below with reference to an illustrative embodiment. The figure is a circuit block diagram showing one embodiment of the present invention. As is clear from this figure, normally the playback output is amplified by the playback amplifier 1 and the AGC amplifier 2
is input. This AGC amplifier 2 uses as a control input the detection output of the AGC detection circuit 3 which receives the amplified output as an input, and keeps the output level constant.
The AGC amplifier output is input to the FM demodulation circuit 4, and a luminance signal is demodulated and derived. The luminance signal is derived with high frequencies suppressed through a de-emphasis circuit 5 and a noise cancel circuit 6, and together with the output of a color signal processing circuit (not shown), is RF converted and input to the antenna terminal of the television receiver. . The de-emphasis circuit 5 of this embodiment does not have a characteristic opposite to the emphasis characteristic, but instead suppresses high frequency components so that the level in the high frequency range of 2 MHz is reduced by 6 dB in order to improve image quality. Further, the noise cancel circuit 6 limits the high-frequency components obtained through the high-pass filter with a limiter 6a and inputs them to the subtraction circuit 6b, thereby canceling low-level high-frequency components.
そこで、本実施例では、再生出力レベルが十分
得られるとき、デイエンフアシス特性とノイズキ
ヤンセル量を軽減している。AGC検波出力を入
力するレベル判別回路７は、入力が所定レベルを
越えたとき、ハイレベルの判別出力を発する。 Therefore, in this embodiment, when a sufficient reproduction output level is obtained, the de-emphasis characteristic and the amount of noise cancellation are reduced. The level discrimination circuit 7 which receives the AGC detection output outputs a high level discrimination output when the input exceeds a predetermined level.
この判別出力は、第１制御回路８に入力され
る。第１制御回路はコンデンサ・コイル・抵抗及
び第１スイツチングトランジスタQ1を直列接続
して成り、デイエンフアシス回路５中の増幅トラ
ンジスタＱのエミツタに接続されている。従つ
て、第１スイツチングトランジスタQ1の導通に
より、増幅トランジスタＱのコレクタ出力は高域
強調されることになる。 This determination output is input to the first control circuit 8. The first control circuit consists of a capacitor, a coil, a resistor, and a first switching transistor Q1 connected in series, and is connected to the emitter of the amplifying transistor Q in the de-emphasis circuit 5. Therefore, due to the conduction of the first switching transistor Q1 , the high frequency range of the collector output of the amplification transistor Q is emphasized.
また判別出力は、第２制御回路９に入力され
る。第２制御回路９は、第２スイツチングトラン
ジスタQ2と分岐用の抵抗とを直列接続して成り、
ノイズキヤンセル回路６中のリミツタ６ａの入力
に接続されている。従つて、第２スイツチングト
ランジスタQ2の導通によつて、リミツタ入力は
レベルダウンされるによつて、ノイズキヤンセル
量が軽減されることによつて高域の抑圧量も減じ
られる。 Further, the determination output is input to the second control circuit 9. The second control circuit 9 is formed by connecting a second switching transistor Q2 and a branching resistor in series,
It is connected to the input of the limiter 6a in the noise cancel circuit 6. Therefore, when the second switching transistor Q2 becomes conductive, the level of the limiter input is lowered, and the amount of noise canceling is reduced, thereby reducing the amount of high frequency suppression.
尚、上述する本実施例では、デイエンフアシス
回路とノイズキヤンセル回路の周波数特性を切換
えたが、その他、視覚的な画質改善のため高域を
抑圧する回路が他にあれば、それらの画質改善回
路の周波数特性を切換えても良いことは云う迄も
なく、切換える回路は必ずしも複数である必要は
なく、必要に応じ適宜選択しても良い。 In addition, in this embodiment described above, the frequency characteristics of the de-emphasis circuit and the noise cancel circuit were switched, but if there are other circuits that suppress high frequencies to improve visual image quality, those image quality improvement circuits may be changed. It goes without saying that the frequency characteristics may be switched, and the number of circuits to be switched does not necessarily have to be plural, and may be appropriately selected as necessary.
(ヘ) 考案の効果
よつて、本考案によれば、画質改善回路の周波
数特性を再生出力レベルに応じて切換えるため、
SN比の優れた記録テープを再生する場合には、
より高画質の再生画像が得られその効果は大であ
る。(f) Effects of the invention Therefore, according to the invention, in order to switch the frequency characteristics of the image quality improvement circuit according to the reproduction output level,
When playing a recorded tape with an excellent S/N ratio,
A reproduced image of higher quality can be obtained, and the effect is great.
図は、本考案の一実施例に係る再生特性切換回
路の回路ブロツク図である。
主な図番の説明、７……レベル判別回路、８，
９……第１・第２制御回路。
The figure is a circuit block diagram of a reproduction characteristic switching circuit according to an embodiment of the present invention. Explanation of main figure numbers, 7...Level discrimination circuit, 8,
9...First and second control circuits.
Claims (1)
圧して視覚的に画質を改善する画質改善回路を備
えるビデオテープレコーダに於て、 再生FM輝度信号のレベルが所定レベル以上と
なつたとき判別出力を発するレベル判別回路と、 該判別出力を受けて前記画質改善回路の高域抑
圧特性を軽減する制御回路とを、 それぞれ配して成る再生特性切換回路。[Claim for Utility Model Registration] In a video tape recorder equipped with an image quality improvement circuit that visually improves image quality by suppressing high-frequency components in the demodulated output of the reproduced FM luminance signal, the level of the reproduced FM luminance signal is A reproduction characteristic switching circuit comprising: a level discrimination circuit that issues a discrimination output when the level exceeds a predetermined level; and a control circuit that receives the discrimination output and reduces high frequency suppression characteristics of the image quality improvement circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9194183U JPS60705U (en) | 1983-06-14 | 1983-06-14 | Reproduction characteristic switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9194183U JPS60705U (en) | 1983-06-14 | 1983-06-14 | Reproduction characteristic switching circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60705U JPS60705U (en) | 1985-01-07 |
| JPH0413790Y2 true JPH0413790Y2 (en) | 1992-03-30 |
Family
ID=30222062
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9194183U Granted JPS60705U (en) | 1983-06-14 | 1983-06-14 | Reproduction characteristic switching circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60705U (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0771259B2 (en) * | 1989-08-18 | 1995-07-31 | 三菱電機株式会社 | Magnetic reproducing device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5880107A (en) * | 1981-11-04 | 1983-05-14 | Hitachi Ltd | Preephasizing circuit of video tape recorder |
-
1983
- 1983-06-14 JP JP9194183U patent/JPS60705U/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5880107A (en) * | 1981-11-04 | 1983-05-14 | Hitachi Ltd | Preephasizing circuit of video tape recorder |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60705U (en) | 1985-01-07 |
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