JPH04135305A - Differential amplifier circuit - Google Patents
Differential amplifier circuitInfo
- Publication number
- JPH04135305A JPH04135305A JP2258397A JP25839790A JPH04135305A JP H04135305 A JPH04135305 A JP H04135305A JP 2258397 A JP2258397 A JP 2258397A JP 25839790 A JP25839790 A JP 25839790A JP H04135305 A JPH04135305 A JP H04135305A
- Authority
- JP
- Japan
- Prior art keywords
- differential
- potential
- differential amplifier
- output
- constant current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims description 12
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、差動増幅回路に関し、特に、同相出力電圧を
一定の基準電位に制御することに関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a differential amplifier circuit, and more particularly to controlling a common mode output voltage to a constant reference potential.
従来の技術
従来、差動増幅回路に於ける差動出力信号の同相出力電
圧、つまり直流出力電圧をある一定の電位に保とうとす
ると、第３図に示すように、差動増幅回路の出力端子か
ら各々コンデンサＣ１，Ｃ２を介して終端抵抗Ｒ１，Ｒ
２により基準電位Ｖｒｅｆにバイアスすると言う方法が
採られていた。2. Description of the Related Art Conventionally, when trying to maintain the common-mode output voltage of differential output signals in a differential amplifier circuit, that is, the DC output voltage, at a certain constant potential, the output terminal of the differential amplifier circuit as shown in FIG. terminating resistors R1 and R via capacitors C1 and C2, respectively.
2, a method has been adopted in which the voltage is biased to the reference potential Vref.
発明が解決しようとする課題
しかしながら、従来の差動増幅回路には以下に示す第一
から第四の課題があった。Problems to be Solved by the Invention However, the conventional differential amplifier circuit has had the following first to fourth problems.
従来の差動増幅回路では、第一に、扱う周波数つまり差
動増幅回路に於ける差動信号成分の周波数が低い場合に
は、バイアス設定回路であるコンデンサと終端抵抗の積
、ＣＩ Ｘ Ｒ１、Ｃ２ＸＲ２で決定される力・・ｌト
オフ周波数を扱う周波数よりも充分に低くする必要があ
り、コンデンサ及び終端抵抗か大きな値とする必要があ
る。例えば、扱う最低周波数がＩＨｚであると、コンデ
サＣ１、Ｃ２の値を１μＦとすると終端抵抗Ｒ１，Ｒ２
の値は数百にΩ以上である必要がある。In a conventional differential amplifier circuit, firstly, when the frequency to be handled, that is, the frequency of the differential signal component in the differential amplifier circuit is low, the product of the capacitor that is the bias setting circuit and the terminating resistor, CI X R1, The power determined by C2XR2 needs to be sufficiently lower than the frequency that handles the off frequency, and the capacitor and terminating resistor need to have large values. For example, if the lowest frequency to be handled is IHz, and the values of capacitors C1 and C2 are 1 μF, the terminating resistors R1 and R2
The value of should be several hundred ohms or more.
第二に、回路の出力インピーダンスは高周波域、つまり
コンデンサと終端抵抗との積で決定される周波数以上で
は出力段、つまりエミ・ツタ ホロワ回路の出力インピ
ーダンスとなるが、低周波域、つまりコンデンサと終端
抵抗との積で決定される周波数以下では終端抵抗Ｒ１，
Ｒ２の値となり後段にくる回路の入力インピーダンスに
対して大きな制限となることが考えられる。Second, the output impedance of the circuit is the output impedance of the output stage, that is, the emitter follower circuit, in the high frequency range, that is, the frequency determined by the product of the capacitor and the terminating resistor, but in the low frequency range, that is, the output impedance of the capacitor and the Below the frequency determined by the product with the terminating resistance, the terminating resistance R1,
It is conceivable that this becomes the value of R2 and becomes a major restriction on the input impedance of the circuit that comes after.
第三に、出力段、つまりエミッタ・ホロワ段の出力同相
信号成分が変動する時、この場合には電源電圧の変動等
が考えられるが、前述のコンデンサと終端抵抗との積と
で決定される周波数以上の変動成分は除去することが出
来ない。この事は、第一の問題点に述べた出来る限り周
波数を低くする必要性に矛盾する。Thirdly, when the output common mode signal component of the output stage, that is, the emitter follower stage fluctuates, in this case it may be due to fluctuations in the power supply voltage, etc., but it is determined by the product of the capacitor and the terminating resistor mentioned above. It is not possible to remove fluctuation components with a frequency higher than that. This contradicts the need to lower the frequency as much as possible, as stated in the first problem.
第四に、半導体集積回路で従来回路を実現しようとする
と、半導体集積回路内に大きな値のコンデンサを実現す
ることは困難かつ非経済的であり、結果としてコンデン
サを半導体集積回路の外部に持つこととなり、半導体集
積回路の端子数の増加、必要部品の増加を招く。Fourth, when trying to implement a conventional circuit using a semiconductor integrated circuit, it is difficult and uneconomical to implement a large-value capacitor within the semiconductor integrated circuit, and as a result, it is necessary to have the capacitor outside the semiconductor integrated circuit. This results in an increase in the number of terminals of the semiconductor integrated circuit and an increase in the number of required components.
本発明は従来の上記実情に鑑みてなされたものであり、
従って本発明の目的は、従来の技術に内在する上記第一
から第四の課題を解決することな可能とした新規な差動
増幅回路を提供することにある。The present invention has been made in view of the above-mentioned conventional situation,
Accordingly, an object of the present invention is to provide a novel differential amplifier circuit that is capable of solving the first to fourth problems inherent in the conventional technology.
課題を解決するための手段
上記目的を達成する為に、本発明に係る差動増幅回路は
、従来の回路が信号の周波数成分に頼って出力信号の同
相信号成分を一定の値に保とうとしていたのに対し、真
の同相信号成分を検出し、それを基準電位との間で比較
することで差動出力信号の同相信号成分を一定値に保と
うとするものであり、
（１）、差動出力信号の中点電位と基準電位とを比較増
幅し差動増幅段の定電流源に帰還をかけるか、または
（２）、差動出力信号の中点電位と基準電位とを比較増
幅し差動段と出力段との間に設けたレベルシフト回路に
帰還をかける、
ように構成される。Means for Solving the Problems In order to achieve the above object, the differential amplifier circuit according to the present invention is different from conventional circuits, which rely on the frequency components of the signal to maintain the common-mode signal component of the output signal at a constant value. In contrast, this method attempts to maintain the common-mode signal component of the differential output signal at a constant value by detecting the true common-mode signal component and comparing it with a reference potential. ), compare and amplify the midpoint potential of the differential output signal and the reference potential and apply feedback to the constant current source of the differential amplification stage, or (2) compare and amplify the midpoint potential of the differential output signal and the reference potential. It is configured to perform comparison amplification and apply feedback to the level shift circuit provided between the differential stage and the output stage.
実施例
次に本発明をその好ましい各実施例について図面を参照
して具体的に説明する。EXAMPLES Next, preferred embodiments of the present invention will be specifically explained with reference to the drawings.
第１図は第一の発明の一実施例を示す回路構成図である
。FIG. 1 is a circuit configuration diagram showing an embodiment of the first invention.
第１図を参照するに、抵抗Ｒ１１、Ｒ１２、Ｒ２１、Ｒ
２２、及びトランジスタＴｌｌ 、Ｔ１２より構成され
る差動増幅段と、Ｔ２１ 、Ｔ２２及び定電流源ＩＥ２
１、ＩＥ２２より構成される出力段より成る差動増幅回
路に於いて、差動出力信号０ＵＴＩ、０ＵＴ２の中点電
位、つまり抵抗Ｒ３１、Ｒ３２により分圧することで同
相信号電位Ｖｃを得ることが出来る。この同相信号電位
Ｖｃと基準電圧Ｖｒｅｆとを電圧比較回路ＣＭＰで比較
増幅し、トランジスタＴ３０、抵抗Ｒ４０より構成され
る差動増幅段の定電流源に帰還をかけている。Referring to FIG. 1, resistors R11, R12, R21, R
22, and a differential amplification stage composed of transistors Tll and T12, T21, T22, and a constant current source IE2.
1. In a differential amplifier circuit consisting of an output stage composed of IE22, the common-mode signal potential Vc can be obtained by dividing the midpoint potential of differential output signals 0UTI and 0UT2, that is, resistors R31 and R32. I can do it. This common-mode signal potential Vc and reference voltage Vref are compared and amplified by a voltage comparison circuit CMP, and feedback is applied to a constant current source of a differential amplification stage composed of a transistor T30 and a resistor R40.
次に本発明に係る回路の動作を説明する。Next, the operation of the circuit according to the present invention will be explained.
入力差動信号ＩＮＩ 、ＩＮ２間の同相信号成分は差動
増幅段において除去され、出力差動信号０ＵＴＩ、０Ｕ
Ｔ２間の同相信号成分は差動増幅段の定電流源の電流値
、コレクタ抵抗Ｒ１１、Ｒ１２及び出力段トランジスタ
Ｔ２１ 、Ｔ２２のベース−エミッタ間の電位ドロップ
により決まる。ここで、差動出力信号の中点電位Ｖｃと
基準電位Ｖｒｅｆとを電圧比較回路ＣＭＰにより比較増
幅し差動増幅段の定電流源に帰還をかけてやることによ
り、差動出力信号の同相信号成分が基準電位Ｖｒｅｆよ
りも高い時には電圧比較回路ＣＭＰの出力電位が上がり
定電流源トランジスタＴ３０のコレクタ電流つまり定電
流源の電流値を増加させ、抵抗Ｒ１１−Ｒ１２による電
位ドロップが増加して差動出力信号の電位を低下させ、
結果として差動出力信号の同相信号成分が低下して基準
電位Ｖｒｅｆに等しくなる。又、差動出力信号の同相信
号成分が基準電位Ｖｒｅｆよりも低い時には、全く逆の
動作をする訳であり、この場合にも差動出力信号の同相
成分は基準電位Ｖｒｅｆに等しくなる。The common mode signal component between the input differential signals INI and IN2 is removed in the differential amplification stage, and the output differential signals 0UTI and 0U are
The common mode signal component between T2 is determined by the current value of the constant current source of the differential amplifier stage, the collector resistors R11 and R12, and the potential drop between the bases and emitters of the output stage transistors T21 and T22. Here, by comparing and amplifying the midpoint potential Vc of the differential output signal and the reference potential Vref by the voltage comparator circuit CMP and applying feedback to the constant current source of the differential amplification stage, the common phase of the differential output signal is When the signal component is higher than the reference potential Vref, the output potential of the voltage comparison circuit CMP rises, increasing the collector current of the constant current source transistor T30, that is, the current value of the constant current source, increasing the potential drop due to the resistors R11 and R12, and reducing the difference. lowers the potential of the dynamic output signal,
As a result, the common-mode signal component of the differential output signal decreases and becomes equal to the reference potential Vref. Furthermore, when the common-mode signal component of the differential output signal is lower than the reference potential Vref, the operation is completely reversed, and in this case as well, the common-mode component of the differential output signal becomes equal to the reference potential Vref.
第２図は第二の発明の一実施例を示す回路構成図である
。FIG. 2 is a circuit configuration diagram showing an embodiment of the second invention.
第２図を参照するに、上記した第一の発明の実施例では
差動増幅段の定電流源の電流値を変化させているために
差動増幅率が多少変動する。本第二の発明の一実施例で
は、差動増幅段と出力段との間にトランジスタＴ３１
、Ｔ３２ 、Ｔ４１ 、Ｔ４２及び抵抗Ｒ４１、Ｒ４２
、Ｒ５１、Ｒ５２より構成されるレベ−６＝
ル シフト回路を挿入し、電圧比較回路ＣＭＰの出力電
位をレベル・シフト回路の定電流源トランジスタＴ４１
、Ｔ４２のベースに帰還をかけ、定電流源の電流値を
変化させてやることによって、抵抗Ｒ４１、Ｒ４２にお
ける電位ドロップを制御し、結果として差動出力信号の
同相信号成分を基準電位Ｖｒｅｆに等しくするものであ
る。本実施例では差動増幅段の電流値は固定であるため
に、差動増幅率も安定している。Referring to FIG. 2, in the embodiment of the first invention described above, since the current value of the constant current source of the differential amplification stage is changed, the differential amplification factor fluctuates somewhat. In one embodiment of the second invention, a transistor T31 is provided between the differential amplification stage and the output stage.
, T32 , T41 , T42 and resistors R41, R42
, R51, and R52 is inserted, and the output potential of the voltage comparator circuit CMP is transferred to the constant current source transistor T41 of the level shift circuit.
, by applying feedback to the base of T42 and changing the current value of the constant current source, the potential drop in the resistors R41 and R42 is controlled, and as a result, the common mode signal component of the differential output signal is brought to the reference potential Vref. It is to make them equal. In this embodiment, since the current value of the differential amplification stage is fixed, the differential amplification factor is also stable.
発明の詳細
な説明したように、本発明によれは、極めて精度良く、
電源変動に影響されることなく、周波数に無関係な出力
インピーダンスを有し、かつ半導体集積回路で実現困難
なコンデンサを必要とせずに、差動増幅回路の差動出力
信号の同相信号成分を基準電位に制御することが可能と
なる。As described in detail, the present invention allows extremely accurate
It is not affected by power supply fluctuations, has an output impedance that is independent of frequency, and does not require a capacitor, which is difficult to realize with semiconductor integrated circuits, and is based on the common-mode signal component of the differential output signal of a differential amplifier circuit. It becomes possible to control the potential.
第１図は第一の発明の一実施例を示す回路構成図、第２
図は第二の発明の一実施例を示す回路構成図、第３図は
従来の回路例を示す回路図である。
Ｔｌｌ 、Ｔ１２ 、Ｔ２１ 、Ｔ２２ 、Ｔ３０Ｔ４
１ 、Ｔ４２ ・・トランジスタ、Ｒ１１Ｒ２２＋
Ｒ３１、Ｒ３２、Ｒ４，Ｏ、Ｒ４１Ｒ５２・・抵抗、Ｉ
ＥＩＯ５ＩＥ２１、ＩＥ２２・・・・・電圧比較回路、
ＩＮＩ 、ＩＮ２・・０ＵＴＩ、０ＵＴ２・・・差動出
力信号、Ｔ３１ 、Ｔ３２ １
、Ｒ１２、Ｒ２１
−Ｒ４２、Ｒぢ１
定電流源、ＣＭＰ
差動入力信号、
特許出願人 日本電気株式会社
代 理 人 弁理士熊谷雄太部Fig. 1 is a circuit configuration diagram showing an embodiment of the first invention;
The figure is a circuit diagram showing an embodiment of the second invention, and FIG. 3 is a circuit diagram showing an example of a conventional circuit. Tll, T12, T21, T22, T30T4
1, T42...transistor, R11R22+
R31, R32, R4, O, R41R52...Resistance, I
EIO5IE21, IE22...Voltage comparison circuit,
INI, IN2...0UTI, 0UT2...Differential output signal, T31, T32 1, R12, R21 -R42, Rji1 Constant current source, CMP differential input signal, Patent applicant NEC Corporation Agent Patent attorney Yutabe Kumagai
Claims (2)
幅し差動増幅段の定電流源に帰還をかけることを特徴と
する差動増幅回路。(1) A differential amplifier circuit characterized in that a midpoint potential of a differential output signal and a reference potential are compared and amplified, and feedback is applied to a constant current source of a differential amplification stage.
幅し差動段と出力段との間に設けたレベルシフト回路に
帰還をかけることを特徴とする差動増幅回路。(2) A differential amplifier circuit characterized in that a midpoint potential of a differential output signal and a reference potential are compared and amplified, and feedback is applied to a level shift circuit provided between a differential stage and an output stage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2258397A JPH04135305A (en) | 1990-09-27 | 1990-09-27 | Differential amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2258397A JPH04135305A (en) | 1990-09-27 | 1990-09-27 | Differential amplifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04135305A true JPH04135305A (en) | 1992-05-08 |
Family
ID=17319671
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2258397A Pending JPH04135305A (en) | 1990-09-27 | 1990-09-27 | Differential amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04135305A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5742204A (en) * | 1996-02-29 | 1998-04-21 | Harris Corporation | Digitally programmable differential attenuator with tracking common mode reference |
| US6803820B1 (en) * | 2003-03-26 | 2004-10-12 | Intel Corporation | Apparatus and method for reducing common-mode current in differential link |
| JP2006287819A (en) * | 2005-04-04 | 2006-10-19 | Toyota Industries Corp | Offset regulation circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63117503A (en) * | 1986-11-05 | 1988-05-21 | Toshiba Corp | Differential amplifier circuit |
-
1990
- 1990-09-27 JP JP2258397A patent/JPH04135305A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63117503A (en) * | 1986-11-05 | 1988-05-21 | Toshiba Corp | Differential amplifier circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5742204A (en) * | 1996-02-29 | 1998-04-21 | Harris Corporation | Digitally programmable differential attenuator with tracking common mode reference |
| US6803820B1 (en) * | 2003-03-26 | 2004-10-12 | Intel Corporation | Apparatus and method for reducing common-mode current in differential link |
| JP2006287819A (en) * | 2005-04-04 | 2006-10-19 | Toyota Industries Corp | Offset regulation circuit |
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