JPH04135023U - delay circuit - Google Patents

delay circuit

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Publication number
JPH04135023U
JPH04135023U JP5189991U JP5189991U JPH04135023U JP H04135023 U JPH04135023 U JP H04135023U JP 5189991 U JP5189991 U JP 5189991U JP 5189991 U JP5189991 U JP 5189991U JP H04135023 U JPH04135023 U JP H04135023U
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JP
Japan
Prior art keywords
signal
delay
frequency
delayed
delay circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5189991U
Other languages
Japanese (ja)
Inventor
健二 徳江
裕幸 照井
俊昭 今井
Original Assignee
日立電子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電子株式会社 filed Critical 日立電子株式会社
Priority to JP5189991U priority Critical patent/JPH04135023U/en
Publication of JPH04135023U publication Critical patent/JPH04135023U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】 【目的】 本考案は,低価格の狭帯域の遅延器を用いて
広帯域の遅延回路を実現し,経済的に有利にすることを
目的とする。 【構成】 周波数帯域幅約5MHzの遅延器9−1,9
−2を並列接続し,このそれぞれの遅延器に入力した被
遅延入力信号を180°位相の異なった搬送波信号で変
調し,所定遅延したそれぞれの出力信号を合成器10で
合成することによって,2倍の周波数の搬送波信号の遅
延器と同等の遅延回路が構成される。
(57) [Summary] [Purpose] The purpose of the present invention is to realize a wideband delay circuit using a low-cost narrowband delay device and make it economically advantageous. [Configuration] Delay device 9-1, 9 with a frequency bandwidth of approximately 5 MHz
-2 are connected in parallel, the delayed input signals input to the respective delay devices are modulated with carrier signals having a phase difference of 180 degrees, and the respective output signals delayed by a predetermined amount are synthesized by the synthesizer 10. A delay circuit equivalent to a delay device for a carrier wave signal of twice the frequency is constructed.

Description

【考案の詳細な説明】[Detailed explanation of the idea]

【0001】0001

【産業上の利用分野】[Industrial application field]

本考案は,テレビジョンカメラ又はモニタ等に用いる遅延回路の改善に関する ものである。 This invention relates to the improvement of delay circuits used in television cameras, monitors, etc. It is something.

【0002】0002

【従来の技術】[Conventional technology]

搬送波信号を用いる遅延回路において,例えば0〜10MHzの周波数帯域幅 の信号を得る場合には,標本化の定理(変調の定理)から搬送波信号の周波数と して周波数帯域幅の2倍の20MHz以上の信号を用いる必要がある。NTSC 方式のテレビジョン装置においては,副搬送波信号の8倍の周波数の約28.6 MHzが一般的に用いられる。ここで従来,周波数帯域幅が0〜10MHz,搬 送波周波数が28.6MHzの遅延回路を構成する場合,ガラス遅延線を用いて いたが,装置が大きくなり高価であり経済的に大変不利であった。 In a delay circuit using a carrier signal, for example, a frequency bandwidth of 0 to 10 MHz When obtaining a signal, the frequency of the carrier signal and Therefore, it is necessary to use a signal of 20 MHz or more, which is twice the frequency bandwidth. NTSC system television equipment, the frequency is approximately 28.6 times the frequency of the subcarrier signal. MHz is commonly used. Conventionally, the frequency bandwidth is 0 to 10 MHz, and the carrier When configuring a delay circuit with a transmission frequency of 28.6MHz, use a glass delay line. However, the equipment was large and expensive, which was economically disadvantageous.

【0003】 図2は従来の遅延回路の構成を示すブロック図である。1は被遅延信号入力端 子,2,4,6,8,11,13はバッファ,3はローパスフィルタ(以下LP F),5は基準搬送波入力端子,15は2逓倍器,16は遅延器,14は被遅延 信号出力端子である。次にこの動作をNTSC方式のテレビジョン信号(日本の 標準カラーテレビジョン方式)の1H(63.5μsec)遅延回路として実施 した場合について説明する。被遅延信号入力端子1にNTSC方式のテレビジョ ン信号(以下テレビジョン信号と略す)を入力し,バッファ2を通してLPF3 へ接続する。0003 FIG. 2 is a block diagram showing the configuration of a conventional delay circuit. 1 is the delayed signal input terminal Children 2, 4, 6, 8, 11, and 13 are buffers, and 3 is a low-pass filter (hereinafter LP F), 5 is the reference carrier wave input terminal, 15 is the doubler, 16 is the delay device, 14 is the delayed This is a signal output terminal. Next, this operation is applied to an NTSC television signal (Japanese Implemented as a 1H (63.5 μsec) delay circuit for standard color television system Let's explain the case. NTSC television is connected to delayed signal input terminal 1. input a television signal (hereinafter abbreviated as television signal) and pass it through buffer 2 to LPF 3. Connect to.

【0004】 LPF3は変調の定理から後述する遅延器16の搬送波信号周波数の1/2の 周波数の帯域幅であり,この出力は遅延器16の被遅延信号入力端子へ接続する 。次に基準搬送波入力端子5に入力した基準搬送波信号,一般にはNTSC方式 のカラーテレビジョン信号の副搬送波信号の4倍の周波数,すなわち3.579 545Hzの4倍の約14.3MHzが用いられる。この基準搬送波信号はバッ ファ6を通して2逓倍器15で28.6MHzとなり,バッファ8を通して遅延 器16の搬送波入力端子へ接続される。遅延器16は,被遅延信号入力端子に入 力した被遅延信号を,搬送波入力端子に入力した搬送波信号で変調を加え,所定 の遅延した被遅延信号をバッファ11へ出力する。0004 Based on the modulation theorem, the LPF 3 has a frequency of 1/2 of the carrier signal frequency of the delay device 16, which will be described later. This is the frequency bandwidth, and this output is connected to the delayed signal input terminal of the delay device 16. . Next, the reference carrier signal input to the reference carrier input terminal 5, generally in the NTSC format. 4 times the frequency of the subcarrier signal of the color television signal, that is, 3.579 Approximately 14.3 MHz, which is four times 545 Hz, is used. This reference carrier signal The frequency becomes 28.6MHz through the doubler 15 through the buffer 6, and is delayed through the buffer 8. It is connected to the carrier wave input terminal of the device 16. The delay device 16 is connected to the delayed signal input terminal. The input delayed signal is modulated by the carrier wave signal input to the carrier wave input terminal, and The delayed signal is outputted to the buffer 11.

【0005】 該遅延器16の搬送波信号として28.6MHzの信号を用いるのは,テレビ ジョン信号の周波数帯域幅を0〜約10MHz確保するためである。 次にバッファ11を通した信号はLPF12で被遅延信号の搬送波成分を除去 し,バッファ13を通して被遅延信号出力端子14へ出力される。 以上説明したごとく被遅延信号入力端子1に入力したテレビジョン信号は所定の (例えば1H)遅延を得て被遅延信号出力端子14へ出力される。[0005] The reason why a 28.6 MHz signal is used as the carrier wave signal of the delay device 16 is because the television This is to ensure a frequency bandwidth of 0 to about 10 MHz for the John signal. Next, the signal passed through the buffer 11 is sent to the LPF 12, which removes the carrier wave component of the delayed signal. The signal is then output to the delayed signal output terminal 14 through the buffer 13. As explained above, the television signal input to the delayed signal input terminal 1 is The signal is delayed (for example, by 1H) and is output to the delayed signal output terminal 14.

【0006】[0006]

【考案が解決しようとする課題】[Problem that the idea aims to solve]

従来,遅延器16としてガラス遅延線を用いた回路が一般的であるが,周波数 帯域幅が0〜約10MHzと広いため,該ガラス遅延線の価格が高価となり経済 的に不利になるという欠点がある。また,遅延器16の搬送波信号として周波数 が28.6MHzとテレビジョン信号としては高い周波数の信号を用いるため, ノイズ処理等の高度の技術を必要とする欠点もある。本考案はこれらの欠点を除 去し,0〜約5MHzの周波数帯域幅の低価格のCCD遅延素子またはガラス遅 延線で,0〜約10MHzの周波数帯域幅の遅延回路を実現し,経済的に有利に することを目的とする。 Conventionally, a circuit using a glass delay line as the delay device 16 is common, but the frequency Since the bandwidth is wide from 0 to about 10 MHz, the glass delay line is expensive and economical. It has the disadvantage of being at a disadvantage. In addition, the frequency is 28.6MHz, which is a high frequency signal for television signals. It also has the disadvantage of requiring advanced techniques such as noise processing. The present invention eliminates these drawbacks. low-cost CCD delay elements or glass delay elements with a frequency bandwidth of 0 to about 5 MHz. A delay circuit with a frequency bandwidth of 0 to approximately 10 MHz can be realized by extending the line, making it economically advantageous. The purpose is to

【0007】[0007]

【課題を解決するための手段】[Means to solve the problem]

本考案は上記の目的を達成するため,例えば0〜約5MHzの周波数帯域幅の 低価格のCCD遅延素子またはガラス遅延線等の遅延器を2個並列接続し,この 変調用搬送波信号として180°位相の異ったものを用い,この2個の遅延器の 出力信号を合成することで,該遅延器単体の特性の2倍の周波数帯域幅(0〜1 0MHz)の遅延回路を構成するものである。 In order to achieve the above-mentioned purpose, the present invention has a frequency bandwidth of, for example, 0 to about 5 MHz. Two low-cost delay devices such as CCD delay elements or glass delay lines are connected in parallel, and this Using carrier signals with a 180° phase difference as modulation carrier signals, these two delay devices By combining the output signals, the frequency bandwidth (0 to 1 This constitutes a delay circuit (0MHz).

【0008】[0008]

【作用】[Effect]

その結果,例えば2個の遅延器を並列に接続し,1個の遅延器には0°,もう 一方の遅延器には180°位相の異なった搬送波信号を用いることで,実質的に 2倍の周波数の搬送波信号を用いた遅延回路が構成される。 このため,遅延器単体の周波数帯域幅が例えば0〜5MHzのものを使用して, 0〜10MHzの周波数帯域幅の遅延回路が実現できる。 As a result, for example, if two delay devices are connected in parallel, one delay device has 0° and the other By using carrier signals with a 180° phase difference in one delay device, it is possible to effectively A delay circuit using a carrier wave signal of twice the frequency is constructed. Therefore, by using a delay device with a frequency bandwidth of, for example, 0 to 5 MHz, A delay circuit with a frequency bandwidth of 0 to 10 MHz can be realized.

【0009】[0009]

【実施例】【Example】

図1は本考案の一実施例の遅延回路の構成を示すブロック図である。 1は被遅延信号の入力端子,2,4,6,8,11,13はバッファ,3,12 はLPF,5は基準搬送波入力端子,7は位相器,9−1,9−2は遅延器,1 0は合成器,14は被遅延信号出力端子である。次に,この動作をNTSC方式 のテレビジョン信号の1H(63.5μsec)遅延回路として実施した場合に ついて説明する。 FIG. 1 is a block diagram showing the configuration of a delay circuit according to an embodiment of the present invention. 1 is an input terminal for the delayed signal, 2, 4, 6, 8, 11, 13 are buffers, 3, 12 is an LPF, 5 is a reference carrier wave input terminal, 7 is a phase shifter, 9-1 and 9-2 are delay devices, 1 0 is a synthesizer, and 14 is a delayed signal output terminal. Next, we will convert this operation to the NTSC system. When implemented as a 1H (63.5μsec) delay circuit for a television signal of explain about.

【0010】 被遅延信号入力端子1にテレビジョン信号を入力し,バッファ2を通してLP F3へ供給する。ここでLPF3は,変調の定理から後述する遅延器9−1,9 −2の搬送波信号の1/2の周波数帯域幅であり,この出力は遅延器9−1,9 −2の被遅延信号の入力端子へ供給される。次に,基準信号入力端子5に入力し た基準搬送波信号,一般にはNTSC方式のカラーテレビジョン信号の副搬送波 信号の4倍の周波数,すなわち3.579545MHzの4倍の約14.3MH zが用いられる。この基準搬送波信号はバッファ6を通して遅延器9−2の搬送 波入力端子と位相器7に供給される。位相器7は基準搬送波信号を180°位相 を変換し,この信号はバッファ8を通して遅延器9−1の搬送波入力端子へ供給 される。0010 Input a television signal to delayed signal input terminal 1, pass through buffer 2 to LP Supply to F3. Here, the LPF 3 is defined by delay devices 9-1 and 9, which will be described later, based on the modulation theorem. -2 carrier wave signal, and this output is the delay device 9-1, 9 -2 is supplied to the input terminal of the delayed signal. Next, input it to the reference signal input terminal 5. reference carrier signal, typically a subcarrier of an NTSC color television signal Approximately 14.3MHz, which is four times the frequency of the signal, that is, four times 3.579545MHz. z is used. This reference carrier signal is transmitted through the buffer 6 to the delay device 9-2. The signal is supplied to the wave input terminal and the phase shifter 7. The phase shifter 7 sets the reference carrier signal in 180° phase. This signal is supplied to the carrier wave input terminal of delay device 9-1 through buffer 8. be done.

【0011】 ここで,遅延器9−1と9−2の搬送波信号は,同一周波数で位相が180° 異った信号である。遅延器9−1と9−2は電気的特性が同一であって,それぞ れの被遅延信号入力端子に入力した被遅延信号を,それぞれの搬送波入力端子に 入力した搬送波信号で変調を加え,所定の遅延した2系統の被遅延信号を合成器 10で合成する。ここで,この合成器10の出力信号は,遅延器9−1,9−2 の搬送波信号の位相が180°異なっているため,搬送波信号の周波数の2倍の 周波数,すなわち28.6MHzで変調されたものと同一となる。そして,バッ ファ11を通しLPF12で被遅延信号の搬送波成分を除去されたLPF12の 出力信号は,バッファ13を通して被遅延信号出力端子14に出力される。[0011] Here, the carrier signals of delay devices 9-1 and 9-2 have the same frequency and a phase of 180°. It's a different signal. Delay devices 9-1 and 9-2 have the same electrical characteristics, and each The delayed signal input to each delayed signal input terminal is input to each carrier wave input terminal. A synthesizer modulates the input carrier wave signal and synthesizes two delayed signals with a specified delay. Synthesize in 10. Here, the output signal of this synthesizer 10 is Since the phases of the carrier wave signals differ by 180°, the frequency of the carrier wave signal The frequency is the same as that modulated at 28.6 MHz. And the bag The carrier wave component of the delayed signal is removed by the LPF 12 through the filter 11. The output signal is outputted to the delayed signal output terminal 14 through the buffer 13.

【0012】0012

【考案の効果】[Effect of the idea]

以上説明したごとく本考案によれば,遅延素子単体の周波数帯域幅が0〜5M Hzとすれば0〜10MHzと2倍の周波数帯域幅の遅延回路を簡単な構成で実 現できる。又,遅延素子単体の周波数帯域幅が10MHzの遅延素子に比べ5M Hzの遅延素子の価格は約1/10と低価格であるため経済的にも有利となる。 本考案の遅延回路はテレビジョンモニタのくし形フィルタ,テレビジョンカメ ラやモニタの垂直輪郭補正回路等に利用できる。 As explained above, according to the present invention, the frequency bandwidth of a single delay element is 0 to 5M. Hz, it is possible to implement a delay circuit with twice the frequency bandwidth of 0 to 10 MHz with a simple configuration. can be expressed. In addition, the frequency bandwidth of a single delay element is 5M compared to a delay element of 10MHz. Since the cost of a Hz delay element is about 1/10th of the price, it is economically advantageous. The delay circuit of this invention is used in comb filters for television monitors and television cameras. It can be used in vertical contour correction circuits for cameras and monitors.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本考案の一実施例の構成を示すブロック図。FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

【図2】従来の構成を示すブロック図。FIG. 2 is a block diagram showing a conventional configuration.

【符号の説明】[Explanation of symbols]

1 被遅延信号入力端子 5 搬送波信号入力端子 7 位相器 9−1,9−2 遅延器 10 合成器 14 被遅延信号出力端子 1 Delayed signal input terminal 5 Carrier signal input terminal 7 Phaser 9-1, 9-2 Delay device 10 Synthesizer 14 Delayed signal output terminal

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 搬送波信号を用いる遅延回路において,
同一電気的特性の遅延器を複数個並列に接続し,該複数
個の遅延器にそれぞれ位相の異った搬送波信号を供給
し,該複数個の遅延器の出力信号を合成する構成で被遅
延信号の周波数広帯域化を図ることを特徴とする遅延回
路。
[Claim 1] In a delay circuit using a carrier wave signal,
A delayed device has a configuration in which multiple delay devices with the same electrical characteristics are connected in parallel, carrier signals with different phases are supplied to each of the multiple delay devices, and the output signals of the multiple delay devices are combined. A delay circuit characterized by widening the frequency band of a signal.
JP5189991U 1991-06-10 1991-06-10 delay circuit Pending JPH04135023U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5189991U JPH04135023U (en) 1991-06-10 1991-06-10 delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5189991U JPH04135023U (en) 1991-06-10 1991-06-10 delay circuit

Publications (1)

Publication Number Publication Date
JPH04135023U true JPH04135023U (en) 1992-12-16

Family

ID=31928553

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5189991U Pending JPH04135023U (en) 1991-06-10 1991-06-10 delay circuit

Country Status (1)

Country Link
JP (1) JPH04135023U (en)

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