JPH0413396A - Burst gate pulse changeover device - Google Patents

Burst gate pulse changeover device

Info

Publication number
JPH0413396A
JPH0413396A JP2116199A JP11619990A JPH0413396A JP H0413396 A JPH0413396 A JP H0413396A JP 2116199 A JP2116199 A JP 2116199A JP 11619990 A JP11619990 A JP 11619990A JP H0413396 A JPH0413396 A JP H0413396A
Authority
JP
Japan
Prior art keywords
circuit
bgp
selector
bgps
plural
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2116199A
Other languages
Japanese (ja)
Inventor
Kenkichi Oura
大浦 研吉
Yoshio Higashida
東田 吉夫
Hiroshi Miyamoto
博史 宮本
Tomohiro Kitajima
北嶋 智浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2116199A priority Critical patent/JPH0413396A/en
Publication of JPH0413396A publication Critical patent/JPH0413396A/en
Pending legal-status Critical Current

Links

Landscapes

  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To make the timing of a burst signal in matching with that of a BGP burst gate pulse and to make recording and reproducing picture quality stable by connecting each output of generated plural BGPs to each of plural input terminals of a changeover circuit comprising analog components directly so as to switch the plural BGPs. CONSTITUTION:Plural generated BGPs 1, 2 are connected directly to each of plural input terminals of a changeover circuit 7 comprising analog components and also connected to each of plural input terminals of a selector 4 in a digital circuit 8 directly, a control signal being an output of the selector 4 selects the changeover circuit 7 thereby connecting either of the plural generated BGPs 1, 2 to a BGP control circuit 6 and switching the BGPs 1, 2. Thus, only the switching control signal from the selector is connected to the BGP changeover circuit via the digital circuit whose delay is caused only by the time delay of the switching control signal from the selector and it is possible to almost make the timing of a burst signal in matching with that of the BGP (in several ns or below).

Description

【発明の詳細な説明】 産業上の利用分野 本発明はVTRにおける色信号処理において目的に応じ
作成された複数のバーストゲートパルス(以下BGPと
記す)を切換える方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a system for switching a plurality of burst gate pulses (hereinafter referred to as BGP) created according to a purpose in color signal processing in a VTR.

従来の技術 現在VTRの色信号処理では位相比較回路やカラーキラ
ー回路等に用いるBGPを目的に応じて複数のBGPを
作成し、タイムリーに切換える方法が実施されている。
2. Description of the Related Art Currently, in the color signal processing of a VTR, a method is implemented in which a plurality of BGPs are created depending on the purpose for use in a phase comparator circuit, a color killer circuit, etc., and the BGPs are switched in a timely manner.

第2図は従来のバーストゲートパルス切換え回路の回路
図である。その構成としては、作成された複数のBGP
I、2を一旦、ディジタル回路部3へ入力し、ディジタ
ル回路で構成される選択器〈以下、セレクタと記す)4
へ入力されると共に同じくディジタル回路で構成される
切換え回路5へ入力された後、セレクタ4の出力である
制御信号によって必要なりGPがディジタル回路で構成
される切換え回路5から出力され、位相比較回路やカラ
ーキラー回路等のBGP制御回路6へ接続されている。
FIG. 2 is a circuit diagram of a conventional burst gate pulse switching circuit. Its configuration consists of multiple BGP
I, 2 are once input to the digital circuit section 3, and a selector (hereinafter referred to as selector) 4 consisting of a digital circuit is input.
After being input to the switching circuit 5 which is also made up of a digital circuit, the GP required by the control signal which is the output of the selector 4 is outputted from the switching circuit 5 which is made up of a digital circuit, and is then input to the switching circuit 5 which is also made up of a digital circuit. and a BGP control circuit 6 such as a color killer circuit.

VTRの色信号処理ではBGP制御による回路としてA
CC(自動クロマレベル制御)回路、バーストエンファ
シス回路、バーストデイエンファシス回路9泣相比較回
路、カラーキラー回路等があるが、パーストゲートの作
成方法として、−数的にディジタル回路が使用されてい
る。
In VTR color signal processing, A is used as a circuit under BGP control.
There are CC (automatic chroma level control) circuits, burst emphasis circuits, burst de-emphasis circuits, phase comparison circuits, color killer circuits, etc., but numerically digital circuits are used as a method for creating burst gates.

発明が解決しようとする課題 この方法の問題点として、BGP制御回路6におけるB
GPとバースト信号のタイミングずれやクロックジッタ
によるBGPの、パルス幅変動等があげられる。
Problems to be Solved by the Invention The problem with this method is that the BGP control circuit 6
Examples of such problems include pulse width fluctuations in BGP due to timing differences between GP and burst signals and clock jitter.

この問題を解決するために最近ではバースト信号でBG
Pを作成することでバースト信号に全く同期したゲート
を実現し、上記問題を解決しているが、この方法の問題
点として一般的にバースト信号から作成するBGPは振
幅検波方式がとられているためバースト信号の振幅が小
さくなった時BGPが作成できないという欠点がある。
To solve this problem, recently burst signals have been used to
By creating P, a gate that is completely synchronized with the burst signal is realized and the above problem is solved, but the problem with this method is that BGP that is created from the burst signal generally uses an amplitude detection method. Therefore, there is a drawback that BGP cannot be created when the amplitude of the burst signal becomes small.

このためバースト信号の振幅が大きい時は、バースト信
号で作成されたBGPを使用し、振幅が小さくなりBG
P作成が不可能になった時、この状態をディジタル的に
検出(セレクト)し、先のディジタル回路で作成された
BGPに切換える方法が使用されている。この一連の動
作つまり、複数のBGPをディジタル回路でセレクトし
、セレクトされた制御信号で、複数のBGPをディジタ
ル回路内で切換えた後、前述の各々の回路へ接続される
ため、複数のBGPのタイミングがディジタル回路を通
過する際(特にIIL回路使用時)介するゲート数(I
IL)に比例して通過時間が加算され、バースト信号に
対して、遅れるという問題がある。
Therefore, when the amplitude of the burst signal is large, the BGP created by the burst signal is used, and the amplitude becomes small and the BG
When P creation becomes impossible, a method is used in which this state is digitally detected (selected) and switched to BGP created by the previous digital circuit. This series of operations involves selecting multiple BGPs in a digital circuit, switching the multiple BGPs within the digital circuit using the selected control signal, and then connecting to each of the aforementioned circuits. When timing passes through a digital circuit (especially when using an IIL circuit), the number of gates (I
There is a problem in that the transit time is added in proportion to IL) and there is a delay with respect to the burst signal.

課題を解決するための手段 本発明は作成された複数のBGPのそれぞれのBGP出
力をディジタル回路構成の選択器の複数の入力端子に接
続し、さらに前記それぞれのBGP出力をアナログ素子
で構成する切換え回路の複数の入力端子に直接接続し、
前記選択器で得られる制御信号によって前記切換え回路
の出力である前記複数のBGPを切換えることを特徴と
する。
Means for Solving the Problems The present invention connects the respective BGP outputs of a plurality of created BGPs to a plurality of input terminals of a selector having a digital circuit configuration, and further provides a switching system in which each of the BGP outputs is configured with an analog element. Connect directly to multiple input terminals of the circuit,
The present invention is characterized in that the plurality of BGPs, which are the outputs of the switching circuit, are switched by a control signal obtained by the selector.

作用 従って選択器(以下、セレクタと記す〉からの切換え制
御信号のみが時間遅れの原因となるディジタル回路を介
してBGP切換え回路へ接続されることになる。
Therefore, only the switching control signal from the selector (hereinafter referred to as selector) is connected to the BGP switching circuit via a digital circuit that causes a time delay.

実施例 第1図は本発明のバーストゲートパルス切換え方式を示
す回路図である。第1図において、作成された複数のB
GPI、2をアナログ素子で構成された切換え回路7の
複数の入力端子に直接接続すると共に、ディジタル回路
8であるセレクタ4の複数の入力端子に接続し、セレク
タ4の出力である制御信号により、切換え回路7を切換
え動作させ、複数のBGPI、2のいずれかをBGP制
御回路6に接続する構成で、BGPI、2を切換えるも
のである。
Embodiment FIG. 1 is a circuit diagram showing the burst gate pulse switching method of the present invention. In Figure 1, the created multiple B
The GPI, 2 is directly connected to a plurality of input terminals of a switching circuit 7 made up of analog elements, and also connected to a plurality of input terminals of a selector 4, which is a digital circuit 8. The configuration is such that the switching circuit 7 is operated to switch and one of the plurality of BGPIs 2 is connected to the BGP control circuit 6, and the BGPIs 2 are switched.

一般的に、IILで構成されるディジタル回路の場合そ
の回路を通過する時間は使用するIILゲート数に比例
し、1ゲート当り数十ナノ秒から数百ナノ秒にも及ぶ。
Generally, in the case of a digital circuit composed of IIL, the time taken to pass through the circuit is proportional to the number of IIL gates used, and ranges from several tens of nanoseconds to several hundred nanoseconds per gate.

VTRの色信号処理では、バースト制御回路のバースト
信号とBGPのタイミングが数百ナノ秒ずれると画質劣
化要因の1つになるため、そのタイミングは全く合致さ
せることが重要である。本発明のように複数のBGPを
直接BGP切換え回路に接続すると共にその出力をBG
P制御回路の直前に接続するか、もしくはBGPの切換
えをBGP制御回路内で行なうことにより、バースト信
号とBGPのタイミングをほぼ合致(数ナノ秒以下)さ
せることが可能になる。
In VTR color signal processing, if the timing of the burst signal of the burst control circuit and the BGP differ by several hundred nanoseconds, this is one of the causes of image quality deterioration, so it is important that the timings match exactly. As in the present invention, a plurality of BGPs are directly connected to a BGP switching circuit, and the output is connected to a BG switching circuit.
By connecting it immediately before the P control circuit or by switching BGP within the BGP control circuit, it is possible to make the timings of the burst signal and BGP almost coincide (within several nanoseconds).

発明の効果 本発明により、VTRの色信号処理におけるBGP制御
回路(位相比較回路、カラーキラー回路等)でのバース
ト信号とBGPのタイミングかほぼ合致でき記録、再生
画質の安定化が図れる利点が実現可能となる。
Effects of the Invention The present invention has the advantage that the timing of the burst signal in the BGP control circuit (phase comparator circuit, color killer circuit, etc.) in the VTR color signal processing can almost match the BGP timing, thereby stabilizing recording and playback image quality. It becomes possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例であるバーストゲートパルス
切換え方式を示す回路図、第2図は従来のバーストゲー
トパルス切換え方式を示す回路図である。 1.2・・・・・・BGP、3,8・・・・・・ディジ
タル回路部、4・・・・・・セレクタ、5,7・・・・
・・切換え回路、6・・・・・・BGP制御回路。
FIG. 1 is a circuit diagram showing a burst gate pulse switching method according to an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional burst gate pulse switching method. 1.2...BGP, 3,8...Digital circuit section, 4...Selector, 5,7...
...Switching circuit, 6...BGP control circuit.

Claims (1)

【特許請求の範囲】[Claims] 複数のバーストゲートパルス信号のそれぞれをディジタ
ル回路構成の選択器の複数の入力端子に入力し、さらに
前記それぞれのバーストゲートパルスをアナログ素子で
構成する切換え回路の複数の入力端子に直接入力し、前
記選択器で得られる制御信号によって前記切換え回路の
出力である前記複数のバーストゲートパルスを切換える
ことを特徴とするバーストゲートパルス切換え装置。
inputting each of the plurality of burst gate pulse signals to a plurality of input terminals of a selector having a digital circuit configuration; further inputting each of the burst gate pulses directly to a plurality of input terminals of a switching circuit constituted by analog elements; A burst gate pulse switching device characterized in that the plurality of burst gate pulses, which are outputs of the switching circuit, are switched by a control signal obtained from a selector.
JP2116199A 1990-05-02 1990-05-02 Burst gate pulse changeover device Pending JPH0413396A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2116199A JPH0413396A (en) 1990-05-02 1990-05-02 Burst gate pulse changeover device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2116199A JPH0413396A (en) 1990-05-02 1990-05-02 Burst gate pulse changeover device

Publications (1)

Publication Number Publication Date
JPH0413396A true JPH0413396A (en) 1992-01-17

Family

ID=14681290

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2116199A Pending JPH0413396A (en) 1990-05-02 1990-05-02 Burst gate pulse changeover device

Country Status (1)

Country Link
JP (1) JPH0413396A (en)

Similar Documents

Publication Publication Date Title
US3580991A (en) Automatic time correction circuit for color tv signals
JPS62130092A (en) Circuit arrangement for improvement of preciseness of color outline
US4127865A (en) System and method for decoding time-division-multiplexed color T.V. signals
JPH0413396A (en) Burst gate pulse changeover device
JPS6268381A (en) Video signal reproducing device
JPS63296471A (en) Synchronizing signal generating circuit
JP2627331B2 (en) Microcomputer input / output circuit
EP0290183B1 (en) Pal video signal processing device
JPS61150590A (en) Coinciding pulse generating circuit of electronic still camera
JPS5816289Y2 (en) Image signal processing circuit
JPH05328401A (en) Carrier changeover signal compensation circuit for color difference signal in electronic still video device
JPH0275289A (en) Dropout correction circuit
JP2881788B2 (en) Video signal switching device
JPS59193680A (en) Automatic discriminating system of television broadcast system
EP0469241B1 (en) Circuit for controlling delay time between luminance and chrominance signals
JPH0323746Y2 (en)
JPS6366118B2 (en)
JPS6128269B2 (en)
JPH0369293A (en) Device for regenerating video signal
JPS63302684A (en) Magnetic recording and reproducing device
JPS59167191A (en) Rotary head type magnetic video recording and reproducing device
JPS59111377U (en) Video signal reproducing device
GB1019811A (en) Improvements in and relating to the conversion of television signals from one standard to another
JPS62224188A (en) Dropout compensating device for line sequential color signal of magnetic disk reproducing device
JPH0380694A (en) Magnetic reproducing device