JPH04131950A - Non-volatile memory control circuit - Google Patents

Abstract

PURPOSE:To evade the loss of function of a last memory even though a specific address of a nonvolatile memory is destroyed by judging that a relevant memory address is destroyed in terms of hardware as long as the data has an error and performing an access to the memory by means of a stand-by memory address. CONSTITUTION:A channel selection microcomputer 1 decides an address to be used based on the data on an address OFCH address. When an OFDH address is used, the data on this address is read out. Then a fact whether the read-out data has a parity error or not. If so, a flag showing a fact that the sound volume data is stored in an OFEH address is set to a RAM of the microcomputer 1. At the same time, this information is also written into the OFCH address of a nonvolatile memory. As a result, the OFEH address can substitute for the OFDH address even if this address is destroyed in terms of hardware.

Description

[Detailed description of the invention] Industrial applications The present invention relates to a nonvolatile memory control circuit.

Conventional technologyNon-volatile memory is used in many devices, but
It is usually controlled by a microcomputer. Now, in conventional non-volatile memory control circuits using microcomputers, in order to reduce errors during read and write operations, a parity bit is provided in the data word and the parity bit is checked when reading data. If there was, this was handled by using the default value as microcomputer data. Also, in some circuits,
Data errors are handled by writing the same data to two addresses and checking the match between the two data at each address when reading.

Problems to be Solved by the Invention In the conventional circuit described above, if the memory address to be accessed has been destroyed by hardware, the data operated by the microcomputer will always be at the default value, and the user will be unable to access the data at that address. It has the disadvantage that it becomes the last memory and becomes unusable.

The present invention solves the above problem, and aims to provide a nonvolatile memory control circuit that does not lose the last memory function even if a specific address of the nonvolatile memory is destroyed.

Means for Solving the Problems In order to solve the above problems, the present invention prepares a plurality of memory addresses for storing specific information, and the ones currently used are Hamming bits and parity bits ( Stores data with added parity (odd parity, even parity, etc.). Then, when the microcomputer starts power-on reset, the data of the memory address currently being used is read out, and the data is checked for parity errors. If there is a data error, the address is written too many times, etc. This system determines that the memory is corrupted and sets a flag to instruct the use of an alternative address, thereby ensuring memory operation using another memory address.

For functions that require last memory even though they are frequently accessed by the user, such as the volume setting of a television device, the memory address that stores the data has a higher probability of being damaged in terms of hardware than other memory addresses. is high (damage due to excessive number of IF readings, etc.).

Therefore, in order to store a function such as setting the volume of a television set, two memory addresses are prepared, one for normal use and one for backup. When data is stored, a parity pit is added to the data so that it has odd parity. (can be easily added to memory). Also, a specific address in the nonvolatile memory has a flag bit that indicates which address to use.

At the start of a power-on reset of the microcomputer, address data with a flag indicating which address to use is read, and which address to use is determined. If the address normally used is specified, the data at that address is read and a parity error check is performed. If there is an error in odd parity, it determines that the address is corrupt and writes a flag to non-volatile memory instructing it to use a spare memory address. At this time, the volume data cannot use the last memory value, so it starts from the default value. If a spare address is specified, volume data is stored at the spare address.

In this way, even if the normally used memory address is destroyed, it is possible to guarantee the functionality of the last memory by using the spare memory address.

Embodiment FIG. 1 shows a system block diagram of a nonvolatile memory control circuit according to an embodiment of the present invention. FIG. 1 is a block diagram of a voltage synthesizer (hereinafter referred to as "■S") channel selection system, centering on a microcomputer. In Figure 1, 1 is a tuning microcomputer, 2 is a tuner, and 3 is a non-volatile memory (EEPRO).
M), 4 indicates a remote control preamplifier, 5 indicates a volume control circuit, and 6 indicates an on-screen display circuit. In this embodiment, the microcomputer used is a M N +870 series product manufactured by Matsushita Electronics Corporation, which incorporates an on-screen circuit 6, a D/A converter, an A/D converter, and the like. Also,
The non-volatile memory 3 is 8 bits x 256 words.

In the vS channel selection system composed of the system described above, the present invention provides reliability of the volume last memory function by performing the operation shown in the flowchart of FIG. 2 at the start of power-on reset using microcomputer software. It enhances sexuality. In addition,
FIG. 3 shows a memory map of the nonvolatile memory 3.

As shown in FIG. 2, after initializing the board and RAM, the tuning microcomputer 1 stores the volume data in the non-volatile memory 3 at addresses 0FDH and 0FEH (see FIG. 3). To decide which one to use, read the address 0FCH where data (flag) indicating it is stored. Here, address 0FDH is originally an address for storing volume data,
The 0FEH address is a spare address to be used when the 0FDH address is destroyed. Further, it is assumed that the volume data is stored in the nonvolatile memory 3 in a form with odd parity.

The channel selection microcomputer 1 determines which address to use from the data at address 0FCH, and selects 0FCH.
If it is an EH address (spare address), a flag is set in the RAM in the microcomputer and the process proceeds to the next step. If 0F
When using the DH address, read the data at the 0FDH address. Then, the read data is checked for parity errors (odd parity check).

If there is no parity error, channel selection microcomputer 1
A flag indicating that address 0FDH is to be used in the internal RAM is set and the process proceeds to the next step. If there is a parity error, a flag indicating that volume data is to be stored at address 0FEH is set in the RAM of the tuning microcomputer 1, and the information is also written to address 0FCH in the nonvolatile memory.

In this case, the default value of the volume data is set in the RAM of the channel selection microcomputer 1, and the process proceeds to the next step.

As a result of the above, even if the 0FDH address is damaged in terms of hardware, the 0FEH address can be used instead.

In the above embodiments, the case where parity pits are added is described, but it goes without saying that the invention can also be applied to cases where humming bits are added.

Effects of the Invention In recent years, non-volatile memory has been widely used in AV equipment such as television sets, but memory operation is no longer guaranteed when the number of writes to non-volatile memory is exceeded. However, if the nonvolatile memory control circuit of the present invention is applied to functions that are expected to be used frequently by users,
The reliability of the memory operation of that function has been dramatically improved,
Along with this, the reliability of AV equipment also improves.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a voltage synthesizer tuning system according to an embodiment of the present invention, FIG. 2 is a flowchart of the operation of the tuning microcomputer of the voltage synthesizer tuning system, and FIG. 3 is a block diagram of the voltage synthesizer tuning system. A memory map of the system's non-volatile memory. 1... Tuning microcomputer, 3... Non-volatile memory, 5... Volume control circuit. Agent Yoshihiro Morimoto 1st Prisoner 5 --- Old issue Kuntrol Circuit No. 21 3rd cause

Claims (1)

[Claims] 1. Non-volatile memory in which multiple memory addresses for storing specific information are prepared in non-volatile memory and stored in advance with humming bits and parity bits added at the start of a power-on reset of the microcomputer. The data word at the specific memory address in the memory is read and the data is checked. If there is an error in the data, it is determined that the memory address is corrupted in terms of hardware, and a spare memory is prepared. Non-volatile memory control circuit that accesses by substituting addresses.