JPH04111579A - Noise reduction device - Google Patents

Abstract

PURPOSE:To obtain both S/N improvement effect and a picture quality deterioration prevention measure by performing interfield noise reduction processing when the output of a standard detector indicates a non-standard mode. CONSTITUTION:An inter-frame noise reduction device 104 and the output of inter-field noise reduction device are inputted to a mixer 106, and the mixing ratio of both input signals is adjusted according to a control signal. A synchronizing separator circuit 201 separates and leads out horizontal/vertical synchronizing signals, and a standard detector 202 detects whether or not the horizontal/ vertical synchronizing signals are in a prescribed relation. When there is the movement of the picture of a regenerative signal, a logic synthesis circuit 203 stops interframe processing output or increases the mixing ratio of the inter-field processing output when the horizontal/vertical frequency of the regenerative signal is not in the prescribed relation. Thus, the deterioration of the picture quality generated to perform the noise reduction processing can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a noise reduction device used in a magnetic recording/reproducing device or the like.

(Prior Art) In recent years, various studies have been conducted on digitally processing video signals in order to improve the quality of television images. This is because digital signal processing can perform processing in the time direction using memory, which is convenient for processing to improve image quality.

An example of this is noise reduction processing that uses correlation between image frames. For still images, video signals have a correlation between frames, so the signal amplitude does not change even if addition is performed between frames, but random noise is reduced because there is no correlation between frames. Noise reduction utilizes this principle. However, since there is no correlation between frames in a moving image, there is a problem in that when the frames are added, a double image is generated, which deteriorates the image quality.

FIG. 4 shows the overall configuration of a recording/reproducing apparatus equipped with a noise reduction circuit. Block 100 in FIG. 1 is a recording system;
200 indicates a reproduction system.

The video signal of the input terminal 10 is luminance color separated (Y/C separated)
A circuit 11 separates the signal into a luminance signal and a color signal. The luminance signal is gain controlled in an automatic gain control circuit 12, subjected to emphasis processing in a pre-emphasis circuit 13, and FM modulated in an FM modulation circuit 14. The FM luminance signal subjected to FM modulation is input to the adder 25 via the high-pass filter 15.

On the other hand, the separated color signal has unnecessary components removed through a bandpass filter 21, and is subjected to gain control in an ACC circuit 22. The color signal amplified to a constant amplitude is input to a frequency converter 23, frequency-converted to a low frequency band, and input to an adder 25 via a low-pass filter 24.

An FM luminance signal and a low frequency converted color signal are obtained from the adder 25 and input to the recording amplifier 16. This recording amplifier 1
The output of 6 is supplied to the magnetic head via a rotary transformer 17.

Next, the recycled yarn 200 will be explained.

The signal reproduced from the magnetic head 18 is transmitted to the rotary transformer 3
1 to the regenerative amplifier 32.

The output of the regenerative amplifier 32 is input to a high pass filter 33 and a low pass filter 41. High pass filter 33
The FM luminance signal derived from
The M signal is demodulated and input to the de-emphasis circuit 35. The luminance signal that has undergone emphasis processing in the de-emphasis circuit 35 is input to a noise reduction circuit 37 via a dropout compensation circuit 36, undergoes noise reduction processing, and is output to an output terminal 38.

On the other hand, the low-pass converted color signal derived from the low-pass filter 41 is input to a noise reduction circuit 42 and subjected to noise reduction processing, and then input to an ACC circuit 43 where the amplitude is adjusted to a constant level. .

The output of the ACC circuit 43 is input to a frequency converter 44, where it is converted into a color signal in the original band and is output to an output terminal 45.

FIG. 5 shows a specific example of the configuration of the noise reduction circuit.

For example, a luminance signal input to the input terminal 51 is converted into a digital signal by an analog-to-digital (A/D) converter 52, and then sent to a motion detector 53, an interframe noise reducer 54, and an intrafield noise reducer 55. is input. The interframe noise reducer 54 is a circuit that reduces noise components by performing addition processing between frames,
The intra-field noise reducer 55 is a circuit that reduces noise components by performing line addition processing within the field. A motion detector 53 detects the motion of the image, and in the case of a complete moving image, a mixer 56 and an intra-field noise reducer 55
In the case of a completely still image, the mixer 56 is controlled to select the output of the interframe noise reducer 54. The digital signal output from the mixer 56 is input to a digital-to-analog (D/A) converter 57, where it is converted into an analog video signal and output to an output terminal 58.

FIG. 6(a) shows a specific example of the configuration of the motion detector 53.

The input signal of the input terminal 61 has a delay amount of one frame (5
25HSH (horizontal period)) and is input to a subtracter 63. The subtracter 63 performs subtraction processing between the output signal of the frame memory 62 and the signal on the input terminal 61 side to obtain a difference signal. This is because if there is no correlation between frames, they are considered to be moving images. The output of the subtracter 63 is input to an absolute value circuit 65 via a low-pass filter 64. The output of the absolute value circuit 65 is input to a coring circuit 66, where it is converted into a motion detection signal and output.

The characteristics of the coring circuit 66 are as shown in FIG.
In the above cases, it is considered a complete video.

When the absolute value output is between a and b, the mixer 56
The mixing ratio of the outputs of the interframe noise reducer 54 and the intrafield noise reducer 55 is varied.

FIG. 7 shows a specific example of the configuration of the interframe noise reducer 54.

The signal at the input terminal 71 is input to a one-frame delay device 72 and also to an adder 73.

The adder 73 adds the output of the one-frame delay device 72 and the input signal to reduce uncorrelated noise between frames, and outputs the output signal to the output terminal 74.

FIG. 8(a) shows a specific example of the configuration of the intra-field noise reducer 55.

The signal at the input terminal 81 is input to a one-line delay device 82 and also to a subtracter 83 . The subtracter 83 is 1
Subtraction processing is performed on the input and output signals of the line delay device 82 to extract vertical high frequency components.

This vertical high-frequency component is amplitude-limited by a limiter 84 and input to a subtracter 85 . The subtracter 85 performs subtraction processing between the output of the 1-line memory 82 and the output of the limiter 84, and outputs the noise-reduced output to the output terminal 86.

The characteristics of the limiter 84 are as shown in FIG. 4(b). When the amplitude of the input exceeds a certain value b8, the output becomes zero.

When there is no line correlation, the amplitude of the vertical high frequency component becomes large and is limited by the limiter 84, and the output of the one line memory 82 is derived from the subtracter 85. In other words, the output of the 1-line memory 82 is derived at the edge portion of the moving image.

On the other hand, if there is a line correlation, an output (which can be considered as noise in a still image) is obtained from the limiter 84 and subtracted from the output of the 1-line memory 82 in a subtracter 85 . As a result, an output with reduced noise is obtained at the output terminal 86.

However, in the output of this in-field noise reducer 55,
Since vertical high-frequency components with minute amplitudes are lost, the image quality obtained from the interframe noise reducer 54 is good in terms of image quality.

(Problems to be Solved by the Invention) According to the above-described noise reduction circuit, it can be seen that image quality is better if motion detection is performed and adaptively moreover, more output of the interframe noise reducer is used.

However, the problem here is the function of the motion detection circuit 53.

The motion detection circuit 53 is configured as shown in FIG. 6(a), and uses a difference signal between frames. If the absolute value exceeds a predetermined threshold value of the coring circuit 66, it is determined that the image is a moving image. If it is determined that the image is a moving image, the output of the intra-field noise reducer 55 is selected, and as described above, a high quality S/N ratio is not guaranteed. In particular, if a moving image is determined due to noise etc. even though a still image is input, the image quality will deteriorate.

Therefore, the characteristics of the coring circuit 66, as shown by the dotted line in FIG.
It is possible to prevent the deterioration of N. In this way, even if the inter-frame difference signal has a minute amplitude, it will be determined to be a still image, and the output of the inter-frame noise reduction circuit 54 will often be used.

However, doing so causes inconvenience when an actual video is input. In other words, when an actual video is input and the inter-frame sum is calculated, a double image is created, resulting in deterioration of image quality.

Furthermore, such a circuit causes the following problem in a magnetic recording/reproducing device.

That is, in a magnetic recording/reproducing device, fast forwarding,
Functions such as rewind and static playback are utilized, but during such special playback, there is no correlation between signals between frames. Therefore, an inter-frame difference signal can be obtained regardless of whether it is a still image or a moving image. Therefore, if the characteristics of the coring circuit 65 were set as shown in the dotted line above,
Even if the image is a moving image, it will be judged as a still image, so the edges and edges of the image may become duplicated. Furthermore, in the case of still images, the edge portions become furi-tsuka.

Furthermore, when skew or jitter increases during normal playback, still image processing is performed even though there is no correlation between signals between frames, resulting in the same image quality deterioration as above. .

As described above, in the conventional circuit, if the sensitivity of the motion detection function is adjusted based only on the S/H improvement effect, image quality may deteriorate when an actual moving image is input. Furthermore, during special playback, conventional circuits have problems such as not being able to prevent image quality deterioration even if noise countermeasures are taken.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a noise reduction device that can both improve the S/N ratio and prevent image quality deterioration.

[Structure of the Invention (Means for Solving the Problems) This invention provides a method for performing predetermined processing on luminance signals and color signals and recording them on a recording medium, and performing the predetermined processing on signals reproduced from the recording medium. A noise reduction device for a recording/playback device that obtains the original signal by performing processing opposite to that of the playback signal includes a motion detection circuit that generates a high-frequency component in the time direction of the playback signal and detects image movement, and a motion detection circuit that detects image movement by generating a high frequency component in the time direction of the playback signal, frequency relationship detection means for detecting whether a frequency and vertical frequency have a predetermined relationship; and a time axis band for controlling a temporal band of the reproduced signal based on an output signal of the motion detection circuit or the frequency relationship detection means. and a control circuit.

(Operation) If there is movement in the image of the reproduced signal by the above means,
If the horizontal frequency and vertical frequency of the reproduced signal do not have a predetermined relationship, the deterioration in image quality caused by noise reduction processing can be avoided by stopping the interframe processing output or increasing the mixing ratio of the intrafield processing output. In the case of still images, good noise reduction can be obtained.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. An input video signal is supplied to the input terminal 101, and the analog-to-digital converter 1
02 and is introduced into the synchronous separation circuit 201. The output of the analog-to-digital converter 102 is transmitted to a motion detector 103, an interframe noise reducer 104, and an intrafield noise reducer 1.
05 is input. The outputs of the interframe noise reducer 104 and the intrafield noise reducer 105 are sent to the mixer 106.
is input. Mixer 106 adjusts the mixing ratio of both human power signals according to the control signal, and supplies its output to digital-to-analog converter 107 . Digital analog converter 1
The output of 07 is led to output terminal 108.

A synchronization separation circuit 201 separates and derives a horizontal synchronization signal and a vertical synchronization signal, and supplies them to a standard detector 202 . The horizontal synchronization signal is also input to the clock generator 204. The clock generator 204 generates a clock that is an integral multiple of the horizontal synchronizing signal and supplies it to the standard detector 202 .

The standard detector 8 202 detects whether or not the horizontal synchronization signal and the vertical synchronization signal have a predetermined relationship.

At the time of this detection, determination is made based on whether or not there is a continuous predetermined relationship in order to improve the stability of detection.

The standard mode/non-standard mode identification signal output from the standard detector 202 is input to the logic synthesis circuit 203. The logic synthesis circuit 203 uses the output (motion detection signal) of the motion detector 103 and the identification signal from the standard detector 202 to
Mixer 1061+l: A control signal for the mixer 1061+l is created.

That is, the simplest configuration example is composed of an OR circuit, and when the motion detection signal indicates a moving image or the identification signal indicates a non-standard mode, the mixer 1
06 so that the mixer 106 selectively derives the output of the intra-field noise reducer 105.

As a result, when the input video signal does not have a predetermined relationship between the horizontal frequency fH and the vertical frequency fV, such as when the magnetic recording and reproducing device is playing fast forward, rewinding, or when the skew increases during normal playback, the standard detector Since the output of 202 indicates a non-standard mode, intra-field noise reduction processing is performed. As a result, even if the coring characteristics of the motion detector have low sensitivity to motion detection (adjusted to improve S/N), the influence of interframe noise reduction processing does not appear strongly, and Double images, flickers, etc. that were previously occurring are eliminated.

FIG. 2 shows a specific example of the circuit of the standard detector 202.

A clock (frequency nfH) from the clock generator 204 is supplied to the input terminal 301, and the vertical counter 302
is input. The count output of this vertical counter 302 is input to a reset generator 303 and a timing pulse generator 304.

The reset generator 303 outputs a reset pulse to reset the vertical counter 302 when the output of the vertical counter 302 reaches a predetermined value. Only when the indicated identification signal is obtained. The vertical counter 302 is
After the reset, the count is advanced by a vertical period, and the reset generator 303 is set to output a reset pulse with the value at this time.

The timing generator 304 refers to the count value of the vertical counter 302 and calculates the standard vertical period ((525/2) f
A timing signal T1 having a pulse width of 24 .mu.s is output with the pulse width centered at 'H) and is supplied to one input terminal of the coincidence continuity detector 306. Furthermore, timing generator 3
04 refers to the count value of the vertical counter 302 and outputs a timing signal T2 having a pulse width of about 250 μs centered on the standard vertical period ((525/2) f'H), and sends this to one of the out-of-synchronization detectors 305. is supplied to the input terminal of

A vertical synchronization signal separated from the input signal is input from an input terminal 308 to the other input terminals of the coincidence continuity detector 306 and the out-of-synchronization detector 305 .

The out-of-synchronization detector 305 compares the phases of the timing signal T2 and the vertical synchronization signal to detect out-of-synchronization. When out-of-sync is detected, a phase pull-in signal is output,
It is applied to the control terminal of the reset generator 303. Then, at this time, the reset generator 303 outputs a reset pulse unconditionally.

When the pulse of the external vertical synchronization signal exists for several vertical periods in succession within the pulse width of the timing signal T1, the coincidence continuity detector 306 outputs an identification signal indicating the standard mode, and detects the pulse of the timing signal T1. When the external vertical synchronizing signal pulse does not exist within the width for several consecutive vertical periods, an identification signal indicating a non-standard mode is output. When this continuous coincidence detector 306 outputs an identification signal indicating the standard mode, the reset generator 303 generates a reset pulse at a predetermined value of the vertical counter 302. However, when the continuous coincidence detector 306 outputs an identification signal indicating the non-standard mode, the reset generator 303 outputs the external vertical synchronization signal as it is as a reset pulse.

Therefore, when the above circuit goes from a synchronous state to an asynchronous state, the identification signal indicates a non-standard mode and the vertical counter 3
02 is reset by an external vertical synchronization signal. As a result, the circuit of FIG.
Since the output of 5 is selected or the proportion of this output is significantly increased, double images and flicker do not occur as in the conventional case.

FIG. 3 shows another embodiment of the invention.

The same parts as in FIG. 1 are given the same reference numerals.

This embodiment has a configuration in which an in-field noise reducer and a mixer are integrated. Further, the in-field noise reducer is omitted, and the system is configured to actively emphasize high-frequency components during moving pictures and special playback, so that a good S/N ratio can be obtained when shooting still images.

That is, the signal output from the analog-to-digital converter 102 is input to a multiplier 401, multiplied by a coefficient (1-k), and input to an adder 403. The output of the adder 403 is input to a one-frame delayer 404 and also to a digital-to-analog converter 405. The output of the one-frame delay device 404 is input to a multiplier 402, multiplied by a coefficient k, and input to an adder 403.

Here, the coefficient (1-k) and k are output from the coefficient generator 407. When an identification signal indicating a non-standard mode is input from the standard detector 202 or when a moving image determination signal is input from the moving image detector 103, the coefficient generator 407 significantly reduces the value of k and generates a frame. This is to reduce the influence of addition between. As a result, in the case of still images where there is no correlation between frames, double images and flicker do not occur as in the conventional case.

[Effects of the Invention] As described above, according to the noise reduction device of the present invention, S
/N improvement effect can be obtained, and measures to prevent image quality deterioration can both be obtained.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, Fig. 2 is a circuit diagram showing a specific example of the configuration of the standard detector shown in Fig. 1, and Fig. 3 is a circuit diagram showing another embodiment of the invention. 4 is an explanatory diagram of the overall configuration of a magnetic recording/reproducing device, FIG. 5 is a circuit diagram showing the configuration of a conventional noise reduction circuit, and FIG. 6 is a circuit diagram of the motion detector shown in FIG. 5 and its output characteristics. Diagrams shown for explanation,
FIG. 7 is a diagram for explaining the configuration of the inter-frame noise reducer in FIG. 5, and FIG. 8 is a diagram for explaining the intra-field noise reducer in FIG. 5 and its output characteristics. 102...Analog-digital converter, 103...Motion detector, 104...Interframe noise reducer, 10
5... In-field noise reducer, 106... Mixer, 107... Digital-to-analog converter, 201...
・Synchronization separation circuit, 203...Standard detector, 204...
・Clock generator, 401.402... Multiplier, 40
3...Adder, 404...1 frame delayer, 40
5...Digital analog converter, 407...Coefficient generator.

Claims (3)

[Claims] (1) Temporal band limiting means that calculates the sum between at least frames of the input video signal and removes a noise component in the frame correlation, and generates a high frequency component of the input video signal in the temporal direction to detect image movement. a motion detection circuit; a frequency relationship detection means for detecting whether a horizontal frequency and a vertical frequency of the input video signal have a predetermined relationship; 1. A noise reduction device comprising means for controlling the limiting characteristic of a band control means. (2) In addition to the interframe noise reducer that obtains the sum signal between frames, the temporal band limiting means obtains an output by subtracting a signal obtained by amplitude-limiting the difference component between lines from the signal of the current line. It comprises an intra-field noise reducer and a mixing means for mixing the outputs of the inter-frame noise reducer and the intra-field noise reducer, the mixing ratio of which is controlled by the outputs of the motion detection circuit and the frequency relationship detection means. The noise reduction device according to claim 1, characterized in that: (3) The noise reduction device according to claim 1, wherein the input video signal is a reproduction signal from a magnetic recording and reproduction device.