JPH04103281A - Television receiver with built-in teletext broadcast reception circuit - Google Patents

Television receiver with built-in teletext broadcast reception circuit

Info

Publication number
JPH04103281A
JPH04103281A JP21896490A JP21896490A JPH04103281A JP H04103281 A JPH04103281 A JP H04103281A JP 21896490 A JP21896490 A JP 21896490A JP 21896490 A JP21896490 A JP 21896490A JP H04103281 A JPH04103281 A JP H04103281A
Authority
JP
Japan
Prior art keywords
signal
built
receiving circuit
television receiver
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21896490A
Other languages
Japanese (ja)
Inventor
Kenji Hara
健二 原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21896490A priority Critical patent/JPH04103281A/en
Publication of JPH04103281A publication Critical patent/JPH04103281A/en
Pending legal-status Critical Current

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  • Television Systems (AREA)

Abstract

PURPOSE:To inform a fact of the receiver not being out of order to the user by outputting an optional pattern from a character signal generating section in the inside of a teletext broadcast reception circuit and displaying the pattern onto a display device when a synchronizing signal is missing in a selected com posite video signal. CONSTITUTION:When a synchronizing signal is missing in a selected composite video signal, an optional pattern is displayed on a screen from a character signal generating section provided in the inside of a teletext broadcast reception circuit 4 via an IIC bus line from a channel selection microcomputer 3. When an idle channel of a high frequency signal input is selected or an external device is not connected to a video signal input terminal for the external device, a message or the like is displayed on the screen. Thus, the user recognizes it that the receiver is not out of order.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、文字放送受信回路内蔵テレビ受信機に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a television receiver with a built-in teletext receiving circuit.

(従来の技術) 従来、文字放送受信回路を内蔵したテレビ受信機におい
て、高周波入力テレビ信号の空きチャンネルを選択した
り、外部入力端子にビデオ装置等外部機器を接続してい
ない状態で、いいがえると開放状態でその外部入力モー
ドを選択した場合などでは、表示画面はノイズ画面や全
黒一色状態、あるいは青−色に表示されるものがある。
(Prior Art) Conventionally, in a television receiver equipped with a built-in teletext receiving circuit, it is possible to select an empty channel of a high-frequency input television signal, or to receive a message when an external device such as a video device is not connected to the external input terminal. For example, when the external input mode is selected in the open state, the display screen may be a noise screen, an all-black state, or a blue-colored display.

(発明が解決しようとする課題) 上記のような、ノイズ画面や全黒もしくは青−色の表示
になった場合ユーザが故障と誤判断する場合がある。
(Problems to be Solved by the Invention) When a noise screen or an all-black or blue-colored display as described above appears, the user may mistakenly judge that there is a malfunction.

本発明は上記問題点に鑑み高周波入力の空きチャンネル
や外部機器を接続していない場合の受信モードの選択に
おいて、文字放送受信回路が有する文字発生回路からの
種々の文字やパターンを利用し、メツセージ等を表示し
て故障ではないことをユーザに知らせることを可能とし
た11文字放送受信回路内蔵テレビ受信機の提供を目的
とする。
In view of the above-mentioned problems, the present invention utilizes various characters and patterns from a character generation circuit included in a teletext receiving circuit in selecting a receiving mode when there is an empty channel of high frequency input or when no external device is connected. To provide a television receiver with a built-in 11-character broadcast receiving circuit that can notify a user that there is no malfunction by displaying the following.

(課題を解決するための手段) 上記の目的を本発明は、高周波テレビ信号の複合映像信
号、及び外部機器による複数の複合映像信号の1つを選
択受信可能にした文字放送受信回路内蔵テレビ受信機に
おいて、上記選択された複合映像信号に同期信号が欠落
しているときは、選局用マイコンからIICパスライン
を介して文字放送受信回路内部に有する文字信号発生部
に、任意のパターンを画面表示させる文字放送受信回路
内蔵テレビ受信機によって達成する。
(Means for Solving the Problems) To achieve the above object, the present invention provides a television receiver with a built-in teletext receiving circuit that enables selective reception of a composite video signal of a high-frequency television signal and one of a plurality of composite video signals from an external device. When the synchronization signal is missing in the selected composite video signal, an arbitrary pattern is sent from the channel selection microcontroller to the text signal generator inside the teletext receiving circuit via the IIC path line. This is achieved by a television receiver with a built-in teletext receiving circuit.

(作 用) 本発明は上記の構成によって、高周波信号入力の空きチ
ャンネルを選択した場合、あるいは外部機器の映像信号
入力端子に外部機器が未接続の場合は、メツセージ等が
画面に表示されるから、ユーザは受信機の故障ではない
と認識し、したがって選局を正しく認識することができ
る。
(Function) With the above configuration, the present invention allows messages, etc. to be displayed on the screen when an empty channel for high frequency signal input is selected, or when no external device is connected to the video signal input terminal of the external device. , the user recognizes that the receiver is not at fault, and can therefore correctly recognize the channel selection.

(実施例) 以下、本発明の実施例を図面を参照しながら説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例における文字放送受信回路内
蔵のテレビ受信機のブロック図である。
FIG. 1 is a block diagram of a television receiver with a built-in teletext receiving circuit according to an embodiment of the present invention.

図において、1は高周波テレビ信号入力から得られる複
合映像信号と、外部入力端子から入力される映像信号の
入力切換回路、2は入力切換回路1で切り換わった信号
に有する同期信号の有無を検出する同期信号検出回路で
あり、同期信号無しの時にはH(High)レベルの信
号を出力する。また、3は選局用マイコンであり、同期
信号検出回路2の出力する同期信号有無の信号によりI
ICパスラインを制御する。4は文字放送受信回路であ
り、IOCパスラインにより選局用マイコン3と接続さ
れて制御され、複合同期信号を出力するとともに、その
切換えを制御する内部/外部切換制御信号を出力する。
In the figure, 1 is an input switching circuit for a composite video signal obtained from high-frequency TV signal input and a video signal input from an external input terminal, and 2 is an input switching circuit that detects the presence or absence of a synchronization signal in the signal switched by input switching circuit 1. This is a synchronization signal detection circuit that outputs an H (High) level signal when there is no synchronization signal. In addition, 3 is a microcomputer for channel selection, and the I/O signal is determined by the synchronization signal presence/absence signal output from the synchronization signal detection circuit 2.
Controls the IC pass line. A teletext receiving circuit 4 is connected to and controlled by the channel selection microcomputer 3 through an IOC path line, and outputs a composite synchronization signal as well as an internal/external switching control signal for controlling switching thereof.

さらに、内部で発生させたR、G。Furthermore, R and G generated internally.

Bの原色信号を出力するとともに、それらを制御するY
S信号を出力する1、5は文字放送受信回路4から出力
される上記複合同期信号と入力切換回路1により切換入
力された複合映像信号とを切換える切換回路、6はビデ
オクロマ偏向回路であり、入力された信号の色差信号(
R−Y、G−Y、B−Y)を出力する。7は高速切換回
路で文字放送受信回路4から入力されるRGB信号と、
ビデオクロマ偏向回路6から入力される色差信号を切換
えてCRTドライブ回路8に出力する。
Y outputs the B primary color signal and controls them.
Reference numerals 1 and 5 for outputting the S signal are switching circuits for switching between the composite synchronization signal outputted from the teletext receiving circuit 4 and the composite video signal switched input by the input switching circuit 1; 6 is a video chroma deflection circuit; The color difference signal of the input signal (
RY, G-Y, B-Y). 7 is a high-speed switching circuit that inputs RGB signals from the teletext receiving circuit 4;
The color difference signal inputted from the video chroma deflection circuit 6 is switched and outputted to the CRT drive circuit 8.

以上のように構成された本発明は次のように動作する。The present invention configured as described above operates as follows.

まず、入力切換回路lにより切換えられた信号に同期信
号が含まれている場合は、同期信号検出回路2はL (
Low)レベル信号を出力し、マイコン3はIICパス
ラインをとくに制御せず、そのため文字放送受信回路4
は内部/外部切換制御信号をLレベルとして、切換回路
5を入力切換回路1の出力の入力側すに接続するととも
に、YS信号をLレベルにし、高速切換回路7を色差信
号R,G、B側に接続して、色差信号をCRTドライブ
回路8に出力させ、通常に画像を表示する。
First, if a synchronization signal is included in the signal switched by the input switching circuit l, the synchronization signal detection circuit 2 is set to L (
The microcomputer 3 does not particularly control the IIC pass line, and therefore the teletext receiving circuit 4
sets the internal/external switching control signal to the L level, connects the switching circuit 5 to the input side of the output of the input switching circuit 1, sets the YS signal to the L level, and connects the high-speed switching circuit 7 to the color difference signals R, G, B. The color difference signal is output to the CRT drive circuit 8, and images are normally displayed.

次に、入力切換回路1から入力された映像信号に同期信
号が無い場合、これには空きチャンネルを選択した場合
、あるいは外部入力端子がオーブンの場合があるが、同
期信号検出回路2の出力はHレベルになり、選局用マイ
コン3は、IICパスラインを制御し、文字放送受信回
路4から複合同期信号を出力するとともに、内部/外部
切換制御信号をHレベルにして、切換回路5をa側にす
る。さらにRGBの信号を出力するとともにYS信号は
Hレベルにし、高速切換回路7を文字放送受信回路4か
らのR,G、B信号に切換えさせ、CRTドライブ回路
8によりCRT画面上に表示させる。つまり、同期信号
の無い信号の場合は文字放送受信回路4が発生する任意
のパターンをCRT画面上に表示することになる。
Next, if there is no synchronization signal in the video signal input from the input switching circuit 1, this may be because an empty channel is selected or the external input terminal is in the oven, but the output of the synchronization signal detection circuit 2 is The channel selection microcomputer 3 controls the IIC pass line, outputs a composite synchronization signal from the teletext receiving circuit 4, sets the internal/external switching control signal to H level, and switches the switching circuit 5 to a. to the side. Furthermore, while outputting RGB signals, the YS signal is set to H level, causing the high-speed switching circuit 7 to switch to the R, G, and B signals from the teletext receiving circuit 4, and causing the CRT drive circuit 8 to display the signals on the CRT screen. In other words, in the case of a signal without a synchronizing signal, an arbitrary pattern generated by the teletext receiving circuit 4 is displayed on the CRT screen.

以上、本発明を説明したが、同期信号の無い場合には、
映像信号入力端子がオープンの場合も含まれることは当
然である。
The present invention has been explained above, but if there is no synchronization signal,
Naturally, this also includes cases where the video signal input terminal is open.

(発明の効果) 以上のように本発明は、同期信号の有無を検呂し、それ
を選局用マイコンの工ICパスラインを介して文字放送
受信回路を制御して、その文字放送受信回路に有する多
種の文字やパターンを任意に表示させるものであり、ユ
ーザはその表示により映像信号切換えが正しくないこと
に気付くことになる。すなオ〕ち、受信機の不良ではな
いことが容易に判ることになるから、用いて益する効果
がある。
(Effects of the Invention) As described above, the present invention checks the presence or absence of a synchronization signal, controls the teletext receiving circuit via the engineering IC path line of the channel selection microcomputer, and controls the teletext receiving circuit. This allows the user to arbitrarily display various characters and patterns on the video signal, and the user will notice that the video signal switching is incorrect. In other words, it can be easily determined that the receiver is not defective, so there is a benefit to using it.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例における文字放送受信回路内
蔵テレビ受信機の構成ブロック図である。 1 ・・・入力切換回路、 2 ・・・同期信号検出回
路、 3 ・・・選局用マイコン、 4 ・・・文字放
送受信回路、 5 ・・・切換回路、6 ・・・ビデオ
クロマ偏向回路、 7 ・・・高速切換回路、 8 ・
・・CRTドライブ回路。 特許出願人 松下電器産業株式会社
FIG. 1 is a block diagram of a television receiver with a built-in teletext receiving circuit according to an embodiment of the present invention. 1...Input switching circuit, 2...Synchronizing signal detection circuit, 3...Microcomputer for channel selection, 4...Telecast receiving circuit, 5...Switching circuit, 6...Video chroma deflection circuit , 7...high-speed switching circuit, 8.
...CRT drive circuit. Patent applicant Matsushita Electric Industrial Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] (1)高周波テレビ信号の複合映像信号、及び外部機器
による複数の複合映像信号の1つを選択受信可能にした
文字放送受信回路内蔵テレビ受信機において、上記選択
された複合映像信号に同期信号が欠落しているときは、
選局用マイコンからIICバスラインを介して文字放送
受信回路内部に有する文字信号発生部に、任意のパター
ンを出力させてディスプレイに表示させることを特徴と
する文字放送受信回路内蔵テレビ受信機。
(1) In a television receiver with a built-in teletext receiving circuit that can selectively receive a composite video signal of a high-frequency television signal and one of multiple composite video signals from an external device, a synchronization signal is added to the selected composite video signal. When it is missing,
A television receiver with a built-in teletext receiving circuit, characterized in that an arbitrary pattern is outputted from a channel selection microcomputer via an IIC bus line to a character signal generating section included in the teletext receiving circuit and displayed on a display.
(2)同期信号の欠落は、複合映像信号の入力端子の開
放の場合を含むことを特徴とする請求項(1)記載の文
字放送受信回路内蔵テレビ受信機。
(2) The television receiver with a built-in teletext receiving circuit according to claim (1), wherein the loss of the synchronization signal includes a case where the input terminal of the composite video signal is open.
JP21896490A 1990-08-22 1990-08-22 Television receiver with built-in teletext broadcast reception circuit Pending JPH04103281A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21896490A JPH04103281A (en) 1990-08-22 1990-08-22 Television receiver with built-in teletext broadcast reception circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21896490A JPH04103281A (en) 1990-08-22 1990-08-22 Television receiver with built-in teletext broadcast reception circuit

Publications (1)

Publication Number Publication Date
JPH04103281A true JPH04103281A (en) 1992-04-06

Family

ID=16728113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21896490A Pending JPH04103281A (en) 1990-08-22 1990-08-22 Television receiver with built-in teletext broadcast reception circuit

Country Status (1)

Country Link
JP (1) JPH04103281A (en)

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