JPH0410098B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method and apparatus for collecting execution state data of a structured program.

(Description of Prior Art) In order to perform data processing using an electronic computer, a program for executing the processing is essential. In developing this program, it is required that the program itself be highly reliable.
As a measure of this reliability, the results of the program's tests may be the primary evaluation criterion.
When testing a program, it is important not only to have a large amount of test data, but also to be able to execute all executable paths of the program, and to accurately process data in all possible situations. That is important. When testing such a program, it is important to have a means for analyzing the execution path of the program. Furthermore, when debugging a program, the execution path of the program is traced as a method of investigating the cause of a program malfunction, and in this case as well, a means of tracing the execution state is important.

On the other hand, in recent years, structured programs have become known as a computer programming method, in which one unit of data processing is divided into blocks and a program is created by combining a plurality of such blocks. for example,
USP.4240137 discloses an arithmetic control method and apparatus for performing such structured programming.

(Object of the Invention) An object of the present invention is to provide a method for efficiently collecting all execution state data indicating the history of the execution path of a structured program.

Another object of the present invention is to provide structured program processing that collects execution status data of each program block constituting a structured format during execution of a structured program, and collects program execution history by program block number. The goal is to provide equipment.

(Summary of the Invention) The present invention focuses on the property of the block structure that when executing a structured program, the program block that makes up the structured format always passes through the entrance and exit of each program block. The feature is that the execution path of the entire program can be grasped by providing an interrupt instruction to collect program execution status data at the entrance or exit of the program.

Furthermore, a program block number is included in the operand of the interrupt instruction inserted into the object program, and execution state data is collected using this block number, making it possible to grasp the source level.

(Explanation of Examples) This invention will be explained in detail below.

First, A, B, and C in FIG. 1 each show an example of a flowchart of a blocked program. A source program based on a structured program is constructed by combining such blocks.

The structure of a program block (hereinafter simply referred to as a block) in this structured program has the following configuration or properties.

●The processing flow for one block is one inlet and one outlet.

●Nesting that includes blocks within blocks
You can compose structures.

●The smallest unit block is a set of executable statements that do not include branches or jumps.

● Branches and jump destinations included in higher-level blocks are within the range of the entrance and exit of the block.

Structured languages are used to create structured programs. A statement that represents the entrance to each block in a structured language (PL/1,
“BEGIN” in languages such as PASCAL,
Those equivalent to command words such as “PROCEDURE”,
An ordinary executable statement may correspond to this) is called an entry statement, and a statement indicating the exit of each corresponding block (such as “END” or even an ordinary executable statement, depending on the context) If we call a statement (which can therefore be a statement indicating the exit of a block) an exit statement, the structure of a structured program can be expressed in the form shown in Figure 2A. With respect to the structure of this source program (FIG. 2A), an executable object program is expressed as shown in FIG. 2B. To collect execution status data of such a program, use the break code for collection.
You need to set the point inside this. To set it, select a branch instruction (“JUMP” instruction) etc. as a break point (B ₁ to _{B o} ),
One possibility is to set up a probe. this is,
This is shown in FIGS. 3A and 3B. However, in this case, when a program is executed, a series of processing for collecting execution state data is performed for each JUMP instruction, resulting in an extremely large overhead compared to the original processing. Furthermore, it becomes difficult to analyze the execution state using the data. By the way, according to the properties of the block structure of the structured program described above, each time a block is executed, the program always passes through the entrance and exit of that block. Therefore, by monitoring the execution path at the entrance or exit of each block, it becomes possible to grasp the execution path of the entire program. Therefore, select the entrance or exit of the block as a break point and set a probe there.

However, it is extremely difficult to find the start (or end) of the block structure of a source program from within an object program.

In an embodiment of the present invention, in order to solve the difficulty of searching for the block structure of a source program in an object program, when a source program is compiled into an object program by a compiler,
When an ENTRY or EXIT statement appears, that point is automatically recognized as a break point and a probe is set at that point. That is, as schematically shown in Figure 4, when compiling a source program written as a structured program (Figure 4A), probes are set at breaks (break points) in each block,
Embed (Figure 4B). Here, the probe is
A machine code or machine instruction that generates an interrupt to recognize a breakpoint of each block when an object program (FIG. 4B) is executed.

FIG. 5 shows an example of machine language code, which is a machine instruction. A in FIG. 5 shows the format of a general machine instruction. An instruction code specifying an operation is set in the OPCODE section (0 to 7 bits), and first and second operands are set in the R and A sections. An address or binary data is set as this operand. B in Figure 5 is
This shows the LOAD instruction, where the R section specifies a register, and the A section specifies the address (displacement) to be executed for the LOAD instruction. FIG. 5C shows the format of the probe command described above. The operation code section has a dedicated instruction code called "PROBE" and a block identification number BN for identifying each block of the source program as an operand. this
The PROBE instruction is embedded into the object program by the compiler during compilation on the compiling device.

FIG. 6 is an overall block diagram showing one embodiment of the present invention. In this figure, 1 is an auxiliary memory in which a source program created as a structured program is stored. A compiling device 2 reads a source program and compiles it into an object program executable by the processing device 4. 3 is a main storage device in which object programs compiled by the compiling device 2 are stored.
During this object program, the source
A PROBE instruction is embedded at each break point in each block of the program. Reference numeral 4 indicates the entire processing device, which is composed of each of devices 5 to 7. 5
is a flag indicating the state of the program (program
A flag register stores a status word (PSW), and 6 is an instruction execution unit. 7 is an interrupt control information storage section. 8 is a data storage table that stores the program execution status. The object program compiled by the compiling device 2 is loaded into the main storage device 3. This program is then executed by the instruction execution unit 6. As a result of this execution, when the PROBE instruction appears, the data collection program (previously stored in the main storage device 3) stores the block identification information in the operand of the PROBE instruction in the interrupt control information storage section 7 and collects program execution status data. ) Jump to the beginning of the file.
This data collection program is executed by the instruction execution unit 6 and stores the block identification information already stored in the storage section 7 into the data storage table 8. Upon completion of this storage, processing based on the PROBE instruction is completed, and processing of the next step of the object program is started. Such collection of program execution state data is repeated every time a PROBE command appears. Therefore, when a series of executions of an object program is completed, the execution state data is stored in the data storage table 8, thereby making it possible to history and analyze the execution path.

For details of the embodiment shown in Fig. 6, further details are given in Figs.
This will be explained using FIG. 14.

First, FIG. 7 shows the processing flow of the compiling device 2 in FIG. 6. A source program created as a structured program is stored in auxiliary memory 1.
is loaded into the compiling device 2 from Compiling device 2 first performs lexical analysis of the source program (F1), and detects a break point at the EXIT statement (or ENTRY statement) position of each block determined by this lexical interpretation. The PROBE instruction (instruction shown by C in FIG. 5) is embedded (F2). After this, the process of syntax interpretation F3, which is the normal compiler process, and the object program 3 that can be executed based on it.
Processing of object generation F4 to be compiled into 4 is performed. 30 to 33 indicate programs and correspondence tables generated during compilation by the compiling device 2. The special feature of the compilation in this example is the detection of the position of the EXIT statement that serves as a breakpoint, and the detection of the PROBE statement at that position.
The difference is that a process F2 for embedding instructions is added. Details of this process F2 are shown in FIGS. 8a and 8b. FIG. 8A shows a detailed process flow of process F2 in FIG. 7. As shown in this flowchart, this example uses a push down stack (built into compiler 2) to write an EXIT statement in each block that starts with an ENTRY statement and ends with an EXIT statement. Detect and insert a PROBE instruction there. That is,
In processing steps F201 to F204, it is determined whether the statement is an ENTRY statement, an EXIT statement, or something else, and if it is an ENTRY statement,
After processing F205 and F206, return to step F202. At the time of an EXIT statement (i.e., a breakpoint in a program block), in steps F207 and F208, a correspondence table as shown in Figure 8B is created, and in step F208, based on the correspondence table,
Create a PROBE instruction that includes a block identification number (BN) in its operand. And step
F210 performs processing to embed this PROBE command after the EXIT statement.

In this way, the source program (written in a structured format) is compiled by the compiling device 2.
When compiling into an executable object program, probes are inserted at breakpoints. The object program subjected to such processing is stored in the main memory 3.

Next, details of the processing device 4 in FIG. 6 will be explained. A detailed block diagram of this is shown in FIGS. 9 and 10. 9 and 10, the processing device 4 includes 5, 7, 9 to 2
It consists of 5 devices. 5 is a flag register,
7 is an interrupt control information storage section. Reference numeral 9 denotes an instruction register (IR), from which an instruction word to be executed is read from the main memory 3. 10 is a memory address register (MADR),
The address where the instruction word to be read is stored is registered in the instruction register 9. 1
1 is a phase control circuit. 12 is a micro program address register in which the contents of the operation code (OPCODE) of the instruction word read into the instruction register 9 are registered. 13 is a micro program.
A memory (MPM) that stores microinstructions and outputs instructions at addresses according to the contents of the register 12. 14 is a micro-instruction register (MIR), which registers micro-instructions output from MPM 13; The microinstruction is divided into an address part and a control part, and the address part is given to the MPAR 12 to indicate the address of the next microinstruction. The control section is a logical operation unit (Arithmetic Logic unit).
Unit: ALU) 23. 15 is a first selector, and register 18 is selected by the output of the R part (register specification) of the instruction word read to IR9.
Output any one of ~20. 16 is
ADDER performs addition of the output of part A of the instruction word read into the IR 9 (designating the address of the instruction to be executed) and the contents of the register selected by the selector 15. 17 is the second selector,
The contents of either the first address part (Addr1) or the second address part (Addr2) of the address part of the MIR 14 are output to the MPAR 12. This select signal is given from the ALU 23.
18 to 20 are registers, and 21 is a program counter that generates an address signal for executing a program. 22 indicates a work register. 23 is an ALU that performs arithmetic processing according to the contents of the MIR 14. 24 is an accumulator, and 25 is a condition code register.

FIG. 9 shows the functional configuration of the processing device 4 that executes the LOAD instruction, and FIG. 10 shows the mechanical configuration of the processing device 4 that executes the PROBE instruction included in the object program. FIG. 9 is disclosed for the purpose of clarifying the contrast with the configuration of FIG. 10.

The operation shown in FIG. 9 will be explained. program·
The instruction execution address indicated by counter 21 is registered in memory address register 10. By this address, main memory 3
outputs the information (instruction word) of the corresponding address to the instruction register (IR) 9. In this case, consider the case where the instruction word is the LOAD instruction.
The OPCODE section of the IR9 is registered in the MPAR12, and this information becomes the address of the MPM13 storing the microprogram, and a microinstruction corresponding to that address is output to the MIR14. The address part of the microinstruction read out to the MIR 14 is given to the MPAR 12 via the selector 17, and is used for reading out the next microinstruction. The microinstruction control section is
Sent to ALU23. On the other hand, the data in the R portion of the instruction word registered in IR9 is given to selector 15, and the contents of any one of registers 18 to 20 are given to adder 16. The adder 16 adds the data that has passed through this selector and the data in part A of the instruction word registered in the IR 9 to find the address in the main memory 3 where the information to be retrieved is stored. This added value (address) is MADR
10, and the data at the corresponding address in the main memory 3 is registered in the work register (WR) 22. The ALU 23 stores the information registered in the WK 22 in the accumulator 24 based on the information of the control section of the microinstruction registered in the MIR 14. Also, according to the data state, condition code register 2
5 is given its status code. Accordingly, the condition code in PSW5 is set. These operations are performed by several microinstructions.

Figure 9 shows a typical example of normal processing.
Explained the execution of the LOAD command. Normal processing is executed approximately as shown in FIG.

Next, in the present invention, the newly provided
The execution of the PROBE instruction will be explained with reference to FIG. First, the point that the command word is registered in IR9 is the same as in the case of FIG. The instruction word read out to IR9 (in this case, the PROBE instruction)
Similarly to the case of FIG. 9, the OPCODE is read to the MPAR 12, and the microinstruction stored at the address of the MPM 13 corresponding to the data is read to the MIR 14. Based on the microinstruction read to the MIR 14, the ALU 23 first retrieves the PROBE instruction execution flag P from the PSW (program status word) in the flag register 5, and determines whether P is "1" or "0". do. Here, when the flag is not set, ie, P=0, the PROBE instruction is executed, and when the flag is set, ie, P=1, the PROBE instruction is not executed. If the retrieved flag P is P=1, the ALU 23 outputs a signal to select the second address section Addr.2 of the microinstruction read out to the MIR 14. When selecting the second address part,
Execution of the PROBE instruction ends. If P=0, the ALU 23 outputs a signal for selecting the first address portion of the microinstruction to the selector 17.

Here, the program status word (PSW) will be explained. As shown in Figure 11A, the PSW includes interrupt mask bits (MASK), program identification number (PN), and PROBE.
It consists of an instruction inhibition flag (P), five condition codes (C, O, N, Z, and E), and a control flag field.

Now, when P=0, the first address part is selected, thereby starting the execution state collection operation based on the PROBE command. That is, the block identification number BN in the PROBE command read out to IR9,
PSW (set in flag register 5)
The program identification number PN therein is merged by the ALU 23. This merged information is set in the interrupt control information area 7 as program execution path history information (execution state information) PBN. this
A specific example of PBN is shown in FIG. 11B. ALU23 further uses micro instructions to
In order to start a data collection program (stored in the main memory 3) that collects program execution status, the top address where the program is stored is set in the PC 21.

The processing procedure using the microinstructions up to this point is shown as a flowchart in FIG.

A collection program for collecting program execution states is sequentially read from the main memory 3, and the processing procedure shown as a flowchart in FIG. 13 is executed. That is, the PBN stored in the interrupt control information area 7 by the execution of the PROBE instruction is stored in the program execution status data storage table 8.
Details of this storage table 8 are shown in FIG. In FIG. 14, 26 is the management department;
7 is a table. Table 27 has 26
The PBN is arranged first-in first-out, that is, in the order of execution, using the HEAD pointer and TAEL pointer.
Store.

In this way, data regarding the program execution status can be collected.

By analyzing the execution status data (execution path history data) collected using the configuration described above, it is possible to determine which block of which program has been executed. In addition, by analyzing data collected chronologically, it is possible to determine the execution order of each block.
You can know the execution path. Furthermore, when running an object program online,
By setting flag P of PSW to 1, the PROBE instruction can be skipped and execution overhead can be eliminated. Needless to say, if P is set to 0, an online execution state can be obtained. These data are useful for investigating the cause of any abnormality in the execution of an object program, and facilitate modification of the program.

(Effects of the Invention) According to the present invention described above, there is an effect that execution path data of a structured program can be collected accurately and efficiently. Furthermore, since the collected data collects the block number of the source program, the execution history at the source program level can be clarified.
This has the effect of making it easier to evaluate programs and investigate the causes of accidents.

[Brief explanation of drawings]

FIGS. 1A to 1C are diagrams showing an example of a flowchart of a program that is divided into blocks based on the structuring theorem. 2A and 2B, 3A and 3B, and 4A and 4B are diagrams for explaining the present invention, where A shows a source program and B shows an example of an object program thereof. FIGS. 5A to 5C are diagrams showing instruction word formats. FIG. 6 is a diagram showing an optimal embodiment of the present invention, and is a diagram showing the overall configuration. FIG. 7 is an operation flowchart of the compiler. FIG. 8A is a processing flowchart for embedding a PROBE command, and FIG. 8B is a diagram showing a correspondence table created in the process. 9 and 10 are block diagrams showing the functional structure within the processing device. Figure 11A shows the format of the program status word (PSW),
Figure 11B is program execution status information (PBW)
FIG. Figure 12 is
FIG. 3 is an operation flow diagram of microinstructions based on the PROBE instruction. FIG. 13 is an operational flow diagram of the data collection program. FIG. 14 is a diagram showing a storage table. 1... Auxiliary memory, 2... Compilation device, 3
. . . Main memory, 4 . . . Processing device, 5 . . . Flag register, 6 . . . Instruction execution unit, 7 .

Claims (1)

[Scope of Claims] 1. In a method for collecting execution state data indicating the execution path of a structured program written in a structured format in which a plurality of program blocks are connected, when a source program is compiled, the Detects the position of a statement in the source program that indicates the entrance or exit of a program block, and inserts a command word to start an execution state data collection program that collects the execution state data at the corresponding position in the object program. , when the instruction word is read during the execution of the object program, an interrupt is generated for the execution of the object program, and the execution state data collection program is started to collect the execution state data. A method for collecting execution status data for structured programs. 2. The structured program according to claim 1, wherein the instruction word has a program block number in its operand part for identifying the program block on the source program. Execution state data collection method. 3. A structured program execution state data collection method as set forth in claim 2, wherein the execution state data includes the program block number and the program number of the object program. 4. In a processing device that executes a structured program written in a structured format that concatenates a plurality of program blocks, a structured program that corresponds to the position of a statement in the source program that indicates the entry or exit of the program block, identify an object program having an instruction word that starts an execution state data collection program that collects execution state data indicating the execution path of the program blocks constituting the program block, and the program block included in the operand part of the instruction word. a first storage means for storing the execution status data collection program for collecting program block numbers for executing the object program; is read out, a central processing unit generates an interrupt for the execution of the object program, starts the execution state data collection program to collect the execution state data, and times the collected program block number. A structured program processing device comprising: second storage means for collecting and storing data in series.