JPH039132Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to a data reproducing circuit for an optical disk device using a data writable disk, and particularly to a data reproducing circuit in a monitor mode during writing to the disk.

Background technology and its problems Regarding a data-writable disk (optical disk) used in an optical disk device, Fig. 1A shows
As shown in , one track is, for example, (0 to 1
9) is divided into 20 sectors, and data is written and read in sector units. As shown in FIG. 1B, each sector consists of an address field and a data field. Address data corresponding to the sector is recorded (written) in advance in the address field, and data to the data field is recorded (written) in advance. Writing is performed while referring to this address data.
The data to be written into the data section is an information signal of the user's preference, such as an audio signal, a video signal, or a document file.

A synchronization signal SYNC is recorded at the beginning of each of the address section and the data section. This synchronization signal SYNC
is a pulse signal with a repetition frequency equal to the highest frequency of the channel-modulated recording signal,
If the length of one sector is, for example, 1.5 kbytes, the synchronization signal SYNC is approximately 16 bytes long.

For example, address signals are recorded on this disk based on the presence or absence of pits on the disk, and data are recorded as changes in reflectance on the signal surface of the disk.

FIG. 2 shows an example of the data reproducing circuit 20,
Reference numeral 1 indicates an input terminal for a reproduced signal from the optical disk (output signal of the optical pickup means), and 2 and 3 indicate buffer circuits. The input terminal 1 is connected to a buffer circuit 2, and the output signal of the buffer circuit 2 is connected to the input terminal of the buffer circuit 3 via a coupling capacitor 4 forming a time constant circuit 15. The output signal of the buffer circuit 3 is supplied to a data extraction circuit 30, and output signals having a predetermined level or higher are extracted.
That is, a waveform-shaped pulse signal is outputted to the output terminal 9 as a digital reproduction signal.

The time constant circuit 15 is composed of a pair of resistors 5 and 6 to which a capacitor 4 is connected in parallel, and a switch 7 is connected in series to one of the resistors 6. Can be switched.
Therefore, the reproduction signal supplied to the input terminal 1 is supplied to the envelope detection circuit 11 via the bandpass filter 10, and the envelope detection output is supplied to the comparator 12 and compared with the reference voltage obtained from the power supply 13.

Therefore, when the reproduced signal is as shown in FIG. 3A, the envelope detection output as shown in FIG. 3B is obtained, so that the comparison pulse as shown in FIG. 3C is obtained from the comparator 12. This comparison pulse is supplied to the switch 7 as its control signal via the delay circuit 14 for timing adjustment.

Since the switch 7 is controlled so that it is turned on when the control signal is high level and turned off when it is low level, if the respective time constants are τ ₁ and τ ₂ , then τ ₁ <τ ₂
The time constant is switched depending on the presence or absence of a signal, such that the time constant is small in an area without a signal and becomes large in an area with a signal. The reason for switching the time constant depending on the presence or absence of a signal is as follows.

In other words, the playback output level is different between the address section and the data section, and the former is lower than the latter, so when the playback signal changes from the data section to the address section or from the address section to the data section, each DC level changes. Also, even when playing back the same data section, the DC level is different between the section where data is written and the section where data is not, so if the time constant is large in these cases, a transient will occur at this DC change point. This may cause errors in data extraction during this transient period. If the time constant is made small in order to extract data accurately, the digital reproduction signal. When the frequency band extends to low frequencies, the low frequency components are cut off, which causes intersymbol interference and the like, making it impossible to faithfully reproduce the reproduced signal.

Therefore, by switching the time constant depending on the presence or absence of the reproduced signal, it is possible to absorb transients where the DC level changes (see Figure 3 D), and faithfully reproduce the digital reproduced signal over the entire band. become able to.

As shown in FIG. 3C, in this example, the time constant is τ ₁ even in the first period T of the section where the signal exists, but the digitally reproduced signal in this period T is synchronized with the synchronization signal SYNC, which has a high frequency. Therefore, even if the time constant τ ₁ is small, the waveform does not deteriorate.

By the way, when writing data to a predetermined sector, it is more convenient to be able to monitor whether or not data writing is being performed normally. This write monitor uses the return beam of the laser beam used during data writing, and sends it to the data reproducing circuit 2.
Just play it with 0. Data writing is performed by detecting the address of each sector, so in data write mode, data is read from the address area and then data is written to the data area. and writing are repeated alternately.

On the other hand, since data writing is performed by irradiating the disk surface with a laser power that is much higher than that during data reading, for example, about 10 times higher, the level of the returned light is considerably higher than the level during data reading. For this reason, the DC level of the data section with respect to the address section is several times higher during write monitoring than when reproducing digital signals from a recorded disk, and the level of the returned light is also large, so the buffer amplifiers 2 and 3 are The reproduced signal may become saturated or may not be output properly.

Based on these causes, even when a data reproducing circuit 20 with time constant switching as shown in FIG. 2 is used as a reproducing circuit for a write monitor, it becomes impossible to completely suppress the difference in DC level. In particular, it becomes impossible to faithfully reproduce all of the data in the address section.

Purpose of the invention Therefore, the present invention proposes a data reproducing circuit that can accurately reproduce address data during write monitoring.

Summary of the invention Therefore, in this invention, the integrator provided in the data extraction circuit is also configured so that its integration constant can be switched, and at least for a certain period immediately after the address section is switched, the integration time constant is higher than other periods. Constants are changed so that the value becomes smaller.

By doing this, immediately after switching to the address section,
The time it takes for the DC level to reach a predetermined DC level becomes faster, and address data can be extracted correctly.

Embodiment Next, an example of the data reproducing circuit according to the present invention applied to the configuration shown in FIG. 2 will be described in detail with reference to FIG. 4 and subsequent figures.

FIG. 4 shows an example of the data reproducing circuit 20 according to this invention, and the data extracting circuit 30 extracts only digital data from the reproduced signal output from the buffer circuit 3, and reduces the duty of the extracted digital data to 50%. Provided for waveform shaping. This data extraction circuit 30 is a level comparator 31
The level comparator 31 receives the reproduced signal output from the buffer circuit 3 and the slice signal obtained from the amplifier 33.
Ls (FIG. 5C) is supplied, and the reproduced signal is sliced by this slice signal Ls to obtain digital data.

The integrator 32 is for obtaining the DC component of the digital data obtained from the level comparator 31, and this DC component is used as the slice signal Ls. As shown in the figure, the integrator 32 has a resistor 35 and a pair of capacitors 36 and 37 connected in parallel, and a switch 38 for switching an integration time constant is connected in series with one capacitor 37. be done. The control pulse Pb (FIG. 5D) supplied to the switch 38 via the terminal 39 is formed on the basis of the read/write mode switching pulse Pa. In this example, the switching pulse Pa delayed by _Tx is used as the control pulse Pb, and the switch 38 is turned on when the control pulse Pb is at a high level.

Now, in this configuration, the reproduced signal _SPB obtained from the buffer circuit 3 during write monitoring includes the reproduced signal obtained when reproducing the address section and the write signal based on the return light obtained when writing data to the data section. The respective envelope outputs S _E are as shown in FIG. 5A. _PE indicates the eye pattern of the reproduced signal _SPB .

When extracting data, the integration time constant of the data extraction circuit 30 should not be too small as mentioned above. The time constant is fixed. Therefore, during write monitoring, the slice signal Ls has a slow fall and rise in level at the time of mode switching as shown in Figure 5C, and in particular, the synchronization signal SYNC recorded at the beginning of the address section is missing, and the data is not processed. It is often not played.

In this invention, the switch 38 is controlled by a control pulse Pb formed based on the switching pulse Pa.
In the data write mode, the control pulse Pb is at a low level, so the switch 38 is off, and the capacitor 37 is open, so the time constant τ _W is small. Even if the time constant τ _W is small, there is no particular problem since it is a data write mode.

Since the control pulse Pb is at a low level from the end of data writing until the period Tx elapses, the time constant τ _W at the time of switching from the data section to the address section is small, and therefore the slice signal Ls
Even if the level changes significantly at this switching point, the level change from the DC level (slice level) L _D of the data section to the DC level (slice level) _LA of the address section is performed sharply. For this reason, the predetermined DC level _LA is reached after switching to the address section until the address data is reproduced, and this can be correctly extracted from the beginning of the address data.

_In the data read mode _{after the period T}
When data is reproduced, a relatively large time constant τ _W is inserted into the data extraction circuit 30. Even if the control pulse Pb switches from the address section to the data section, it remains at a high level until the period T _Y (T _Y = _T τ _R increases the DC level.

However, after the period T _Y , the time constant switches from τ _R to τ _W , so the rise of the DC level becomes faster. Eventually, by switching the time constant of the integrator 32, the slice signal Ls becomes as shown in FIG. Both the rise and fall at the time of mode switching become steep as shown _{in FIG} . From this, even if the DC levels in each mode differ significantly, there is no fear that data extraction will become impossible.

In addition, in the normal reproduction mode in which data is read from a recorded disk, the control pulse Pb remains at a low level, so the integration time constant of the data extraction circuit 30 remains at τ _R , and the low frequency range of the digital reproduction signal There is no fear that the ingredients will be cut. Furthermore, since the laser power in the normal reproduction mode is a fraction of the laser power during writing, the DC level difference between the data section and the address section is not as large as shown in Figure 5A, and this DC level difference is as described above. Sufficient correction can be made by switching the time constant of the time constant circuit 15. Therefore, even if the integration time constant of the data extraction circuit 30 is τ _R , data extraction will not be hindered.

Effects of the invention As explained above, according to this invention, the time constant of the integrator 32 provided in the data extraction circuit 30 is switched, so that together with the time constant switching of the time constant circuit 15, the data Data can be accurately reproduced during write monitoring.

Therefore, address data can be searched accurately, and predetermined data can be written into each sector immediately after the predetermined address data has been searched. This can be said for each sector, so for example, if there are 20 sectors in one rotation as described above, it is possible to write the specified data to all 20 sectors by rotating the disk once. This has the effect of significantly shortening the writing time.

[Brief explanation of drawings]

Fig. 1 is a schematic diagram of a data structure used to explain this invention, Fig. 2 is a system diagram showing an example of a data reproducing circuit used to explain this invention, Fig. 3 is a waveform diagram used to explain its operation, and Fig. 3 is a waveform diagram used to explain its operation. FIG. 4 is a system diagram showing an example of the data reproducing circuit according to this invention, and FIG. 5 is a waveform diagram for explaining its operation. 15 is a time constant circuit, 30 is a data extraction circuit, 3
1 is a level comparator, 32 is an integrator, _SPB is a reproduction signal, Ls is a slice signal, and Pb is a control pulse.

Claims (1)

[Claims for Utility Model Registration] A time constant circuit to which an information signal consisting of an address part and a data part is supplied from an optical pickup means, and an envelope detector to which the information signal is supplied and detects the envelope of the information signal. circuit, and a data extraction circuit that is supplied with an output signal of the time constant circuit and extracts a digital signal from the output signal, and switches the time constant of the time constant circuit based on the output signal of the envelope detection circuit, In a data reproducing circuit for an optical disk device in which the DC levels of the address section and the data section are made close to each other, there is provided a comparator to which the output signal of the time constant circuit is supplied to one input side; The data extraction circuit is provided with an integrator that integrates the output signal and feeds it back to the other input side of the comparator, and sets the time constant of the integrator to a period approximately corresponding to the address portion of the information signal. and a period corresponding to the data portion of the information signal, and obtains a waveform-shaped digital signal from the output signal of the comparator.