JPH0383437U

JPH0383437U -

Info

Publication number: JPH0383437U
Application number: JP14291289U
Authority: JP
Priority date: 1989-12-11
Filing date: 1989-12-11
Publication date: 1991-08-26

Description

[Brief explanation of the drawing]

第１図は、この考案の一実施例を示す構成図、
第２図は、本実施例の動作を示すタイミングチヤ
ート、第３図は、この考案の第二の実施例を示す
構成図、第４図は、第二の実施例の動作を示すタ
イミングチヤート、第５図は、従来の装置を示す
構成図である。図において、１は一次電源入力、２は一次電源
入力リターン、３はスイツチ素子、４，５，６は
電源回路、７は警報機、８は抵抗、９はコンデン
サ、１０は警報機への一次電源入力、１１は電源
入切検出回路、１２は電源入切検出信号、１３は
制御回路、１４はデータロード信号、１５はイネ
ーブル信号、１６はクロツク信号、１７はカウン
トデータ、１８はリセツト信号、１９はカウンタ
、２０はカウント終了信号、２１はリレードライ
バ、２２はリレードライブ信号、２３はリレー、
ａは常閉接点、ｂは常開接点である。なお、各図
中同一符号は同一または相当部分を示す。 FIG. 1 is a configuration diagram showing an embodiment of this invention.
FIG. 2 is a timing chart showing the operation of this embodiment, FIG. 3 is a configuration diagram showing a second embodiment of the invention, and FIG. 4 is a timing chart showing the operation of the second embodiment. FIG. 5 is a configuration diagram showing a conventional device. In the figure, 1 is the primary power input, 2 is the primary power input return, 3 is the switch element, 4, 5, 6 are the power supply circuit, 7 is the alarm, 8 is the resistor, 9 is the capacitor, and 10 is the primary to the alarm Power input, 11 is a power on/off detection circuit, 12 is a power on/off detection signal, 13 is a control circuit, 14 is a data load signal, 15 is an enable signal, 16 is a clock signal, 17 is count data, 18 is a reset signal, 19 is a counter, 20 is a count end signal, 21 is a relay driver, 22 is a relay drive signal, 23 is a relay,
A is a normally closed contact, and b is a normally open contact. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims

[Claims for Utility Model Registration] (1) A power supply circuit that receives primary power supply from the outside and generates secondary power supply internally, and when an abnormality occurs in this power supply circuit, an abnormality signal is sent from the power supply circuit. In a power supply abnormality detection device consisting of an alarm that uses a primary power supply to notify that a power supply abnormality has occurred, the alarm does not become operational until the power supply circuit starts operating after the primary power is supplied. A power supply abnormality detection device is characterized in that it is equipped with an integrating circuit made up of a resistor and a capacitor, which delays the supply of primary power to an alarm. (2) It has a power supply circuit that receives primary power supply from the outside and generates secondary power supply internally, and when an abnormality occurs in this power supply circuit, an abnormality signal from the power supply circuit is sent to the power supply abnormality using the primary power supply. In a power supply abnormality detection device that consists of an alarm that notifies the alarm that a A primary power on/off detection circuit that delays power supply; a control circuit that receives the primary power on/off detection signal output from the primary power on/off detection circuit and controls a counter; A counter that performs an arbitrary count when the power is turned on, outputs a count end signal after the end of the arbitrary count, and resets the count end signal when the primary power is turned off, and a relay driver that drives a relay by inputting this count end signal. , has one normally open contact, connect the primary power input to one end of the normally open contact, connect the primary current input end of the above alarm to the other end, and close the normally open contact by a control signal from the relay driver. A power supply abnormality detection device characterized by being equipped with a relay.