JPH0382247A - Picture input device - Google Patents

Abstract

PURPOSE:To attain high speed transmission in a wireless way by applying digital FM modulation to an output of a clock insertion modulation circuit at an FSK modulation circuit, sending the modulated signal to an optical transmission circuit and converting an output of the FSK modulation circuit into an optical signal and sending the optical signal at the optical transmission circuit. CONSTITUTION:Picture information is converted into a picture signal by photoelectric conversion action of a picture sensor 1 and the picture signal is converted into a picture data by an A/D conversion circuit 2. A clock insertion modulation circuit 23 modulates a picture data outputted from the A/D conversion circuit 2 digitally and inserts the synchronizing clock pulse at the modulation. An FSK(Frequency Shift Keying) modulation circuit 24 applies digital FM modulation to an output of the clock insertion modulation circuit 23 and an optical transmission circuit 25 converts an output of the modulation circuit 24 into an optical signal and sends the signal in a radio wave to a data processing unit 40. Thus, the picture data is sent to the data processing unit at a high speed in a wireless way.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to an image input device that transmits image data to a data processing device such as a personal computer (hereinafter simply referred to as a personal computer) or a word processor.

“Prior Art” A conventional image input device, for example, an image scanner IS,
As shown in FIG. 4, the optical information of a still image is converted into an electrical signal by a CCD linear image sensor 1, and then converted into a digital signal by an A/D conversion circuit 2.
The output data of the D conversion circuit 2 is subjected to predetermined image processing by an image processing circuit 3, and the image data is transmitted to the personal computer PC side via a transmission cable 4 and a connector 5. 6 is an LED array as a light source that projects light onto a still image, 7 is a CCD
A COD controller that controls the linear image sensor 1, 8 a rotary encoder that detects the moving distance of the image scanner IS, 9 outputs a predetermined timing signal to each part based on the detection signal of the rotary encoder 8 and the reading start signal. This is a timing generator. The personal computer PC has CPU II, ROM12. RAM
13 and CRT14.

"Problem to be solved by the invention" However, in the conventional example shown in FIG. image scanner IS with transmission cable 4.
There was a problem that the scanning location was restricted.

Furthermore, when attempting to transmit image data using a general-purpose wireless remote control device, the following problems arise. That is, a general-purpose wireless remote
In the control device, the data corresponding to each function is first subjected to PPM (pulse phase modulation), and then 30 to 60kHz.
Since it is configured to transmit light as a PAM (Pulse Amplitude Modulated) waveform applied to an infrared light emitting diode as a PAM (Pulse Amplitude Modulated) waveform, the data transmission speed is low at several hundred to 1000 bps, and it is transmitted like a TV remote control device. There is no problem with images with a small amount of information, but there is a problem that it cannot be used with image input devices that transmit a large amount of information1.For example, image data with a resolution of 512 dots x 400 dots per screen is converted to data with a resolution of 1000 bps. This is because, if the data were to be transmitted at the transmission speed, it would take approximately 200 seconds to transmit one screen, which would be impractical.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide an image input device that can wirelessly transmit image data to a data processing device at high speed.

"Means for Solving the Problems" The present invention obtains an image signal by photoelectrically converting image information with an image sensor, converts this image signal into image data with an A/D conversion circuit, and transmits it to a data processing device. In the image input device, the clock folding modulation circuit performs digital modulation by folding a synchronizing clock pulse into the output data of the A/D conversion circuit, and the FSK modulation circuit digitally modulates the output of the clock folding modulation circuit. ,
The apparatus is characterized by comprising an optical transmission circuit that converts the output of the FSK modulation circuit into an optical signal and wirelessly transmits the signal to the data processing apparatus. In order to further improve transmission efficiency, the clock folding modulation circuit is
Consists of a modulation circuit.

"Operation" Image information is converted into an image signal by the photoelectric conversion function of the image sensor, and this image signal is converted into image data by an A/D conversion circuit. The clock folding modulation circuit digitally modulates the image data output from the A/D conversion circuit, and folds in a clock pulse for synchronization at the time of this modulation.

The FSK modulation circuit performs digital FM modulation on the output of the clock folding modulation circuit. The optical transmission circuit converts the output of the modulation circuit into an optical signal and wirelessly transmits it to the data processing device. In this way, image data is wirelessly transmitted to the data processing device by transmitting an optical signal, so a transmission cable is not required. Furthermore, the clock folding modulation circuit modulates the output data of the A/D conversion circuit by folding in synchronizing clock pulses, so it is possible to add clock pulses to data without widening the band, improving transmission efficiency. be able to. Moreover, since the FSK modulation circuit digitally FM modulates the output of the clock folding modulation circuit and transmits it to the optical transmission circuit, high-speed transmission is possible. Also,
When the clock folding modulation circuit is configured with an MFM modulation circuit, the minimum pulse width can be increased to further improve transmission efficiency.

Embodiment FIG. 1 shows an embodiment of the present invention, and in this figure, the same parts as in FIG. 4 are given the same reference numerals.

In FIG. 1, IO is an image input device, and this image input device 10 is configured as follows. That is, l
CC, D (Charge Coupled) is an image sensor that photoelectrically converts image information into an image signal.
Device) linear image sensor, this C
A high-speed (sampling clock frequency is high) A/D (analog-to-digital) conversion circuit 2 is coupled to the output side of the OD linear image sensor 1. This A
An image processing circuit 3 is coupled to the output side of the /D conversion circuit 2. The image processing circuit 3 decodes the output data of the A/D conversion circuit 2 into predetermined binary data or dither data based on a setting signal (including the setting of whether or not to perform image compression) and outputs the decoded data. It is configured as follows.

A memory controller 2 is provided on the output side of the image processing circuit 3.
0 is coupled to the memory controller 20, and the memory controller 20 has an image memory (for example, 256 Kbit static RAM) 2.
1 are combined. A modulation circuit 22 is coupled to the output side of the memory controller 20.

This modulation circuit 22 is a clock folding modulation circuit that folds in a clock pulse for synchronization during modulation and performs digital modulation.
modulation circuit 23, and an F which digitally modulates the output of the MFM modulation circuit 23.
S K (Frequency 5hift Keyi)
ng) modulation circuit 24.

The output side of the FSK modulation circuit 24 is coupled to an optical transmission circuit 25 which mainly includes an LED (light emitting diode) and converts an electrical signal into an optical signal 28 and outputs the signal.

6 is an LED array as a light source that projects light onto a still image;
7 is a CO that controls the CCD linear image sensor 1
D controller, 8 is a rotary encoder that detects the moving distance of the image scanner IS, 9 is a timing generator, and this timing generator 9 controls the LED array 6, the CCD based on the detection signal of the rotary encoder 8 and the reading start signal. controller 7,
It is configured to output a predetermined timing signal to each of the A/D conversion circuit 2, memory controller 20, MFM modulation circuit 23, and FSK modulation circuit 24.

40 is a personal computer as a data processing device, and this personal computer 40 includes an optical receiving circuit 30 which mainly includes a PD (photodiode) and receives the optical signal 28 from the optical transmitting circuit 25 and converts it into an electrical signal; A demodulation circuit 33 consisting of an FSK demodulation circuit 31 and an MFM demodulation circuit 32 sequentially coupled to the output side of the optical receiving circuit 30; an error detector/error collector 34 coupled to the output side of the MFM demodulation circuit 32; a detector 35 that detects errors and controls the MFM demodulation circuit 32 and the error detector/error collector 34; and a CPU (central processing unit) 11 coupled to the output side of the error detector/error collector 34.

The ROM (read-only) connected to this CPU 11
memory) 12 and RAM (random access memory) 13, and a CR coupled to the output side of the CPU II
A cathode ray tube (T) 14 is provided.

Next, the operation of the above embodiment will be explained with reference to FIGS. 2 and 3. For convenience of explanation, CCD linear image
The number of pixels of the sensor 1 is 512, the resolution of one still image screen read by this CCD linear image sensor is 512 dots x 400 dots, and the image memory 21
is assumed to have a capacity (for example, 256 Kbit) that can store one screen worth of image data (512 dots x 400 dots).

(a) Upon receiving the reading start signal, a power switch (not shown) is turned on to supply power to each part of the image input bag M10. Then, the LED array 6 projects light onto the still image. A movement signal from a rotary encoder 8 that detects the movement distance of the image input bag MlO is input to a timing generator 9, and the timing generator 9 sends predetermined timing signals to each part. A CCD linear image sensor 1 controlled by a CCD controller 7 detects reflected light from a still image and outputs an image signal obtained by photoelectrically converting image information to an A/D conversion circuit 2.

(b) The A/D conversion circuit 2 includes a timing generator 9
The image signal is converted into digital image data based on the sampling clock pulse from the 1 image processing circuit 3 and outputted to the image processing circuit 3. The frequency Fs of the sampling clock pulse is
For example, l/3 of the fundamental frequency Fr (=9.216 M cells)
The cell is set at 307.2 of the 0th division. The image processing circuit 3 decodes the output data of the A/D conversion circuit 2 into predetermined binary data or dither data based on the setting signal (including the setting of whether or not to perform image compression), and decodes the output data of the A/D conversion circuit 2 into predetermined binary data or dither data. (a)
Image data as shown in (b) is output.

(c) The memory controller 20 writes the image data from the image processing circuit 3 into the image memory 21 based on the timing signal from the timing generator 9. In other words, the memory controller 20 writes the image data for one screen (512×400 The operation of writing zero or more image information into the image memory 21 can also be performed at a location away from the personal computer 40.

(d) Then, upon receiving the transmission signal, the memory controller 20 reads out the image data from the image memory 21 at a predetermined timing based on the timing signal from the timing generator 9, and transfers it to the modulation circuit 22. That is, as shown in FIGS. 3(a) and 3(b), one screen worth of image data written in the image memory 21 is read from the 1st line to the 400th line (each line) at a predetermined interval (for example, 511 bits). (512 bits) are read out sequentially, and a l-bit start bit (for example, data "1") is added to the beginning of each line, and the data is transferred to the modulation circuit 22.

The read timing at this time is 1, for example, the timing of the frequency Fc of the clock pulse for synchronization. This Fc is, for example, the fundamental frequency Fr (=9°216MHz
) is 307.2 divided by 1730.

(e) In the modulation circuit 22, the MFM modulation circuit 23 digitally modulates the image data read out from the image memory 21 and inserts a clock pulse for synchronization during this modulation, and the FSK modulation circuit 24 outputs the output of the MFM modulation circuit 23. is digitally FM modulated and output to the optical transmission circuit 25. For example, the image data “
1.1.0,1,Olo,1,0,l,...'', the MFM modulation circuit 23 performs modulation as shown in FIG. ), that is, the MFM modulation circuit 23 performs the modulation as shown in
Based on the clock pulse for synchronizing the frequency Fc from the timing generator 9 and the image data read from the one-image memory 21 as shown in FIG. 2(c), the clock pulse can be folded in without widening the band. It modulates and outputs a pulse signal as shown in FIG. 4(d). Further, the FSK modulation circuit 24 is connected to the MFM modulation circuit 2.
At the output of 3, the fundamental frequency Fr (=9
．． 216MHz) divided by 176, (=153
6kHz), and for the output data “0” of the MFM modulation circuit 23, the fundamental frequency Fr (=9.216MHz
) is frequency-divided by 1710 to F, (=921.6kHz), and a pulse signal as shown in (8) in the figure is output to the optical transmission circuit 25.

(v) The optical transmission circuit 25 converts the pulse signal as shown in FIG.
Output to.

(G) On the personal computer 40 side, the optical signal 28 received by the optical receiving circuit 30 is converted into an electrical signal, and then the image data is demodulated by the FSK demodulating circuit 31 and the MFM demodulating circuit 32 of the demodulating circuit 33, and the image data is sent to the detector 35.
Errors are corrected by the error detector/error collector 34, and the RAM as the main memory is controlled by the CPU II, which is controlled by a program stored in the ROM 12.
13 and/or displayed on the CRT 14. At this time, image input bag! ! 10 to PC 40
from the 1st line to the 400th line (each line is 511 bits) at a predetermined interval (for example, 511 bits).
Since up to 3 bits are transmitted sequentially, line data can be clearly distinguished, and correction can be easily performed when line data is temporarily interrupted due to a failure in equipment or during transmission.

As described above, image information is transmitted from the single image input device 10 to the personal computer 40 at high speed. For example, if the clock pulse frequency Fc is set to 307.2 and the modulation and transmission formats shown in Figures 2 and 3 are used, the data transmission rate is approximately 307.2/2 (kbps). Therefore, one screen of 512 dots x 400 dots is approximately 1.3
It can be transmitted in seconds.

In the embodiment described above, the frequency Fs of the sampling clock pulse of the A/D conversion circuit and the frequency Fc of the clock pulse for transmission are set to be the same, but the present invention is not limited to this, and the two may be set separately. You can do it like this.

In the above embodiment, the clock insertion modulation circuit is an MFM modulation circuit in order to increase the minimum pulse width and improve transmission efficiency, but the present invention is not limited to this, and the clock insertion modulation circuit is an A/D modulation circuit. It is sufficient that the output data of the conversion circuit is digitally modulated and a clock pulse for synchronization is folded in during modulation.For example, a clock folding modulation circuit is a DMI (Differentia
l Mode Inversion) Modulation circuit or C
M I (Coded Mark Invsrsion)
) may be a modulation circuit.

In the embodiment described above, one image memory and a memory controller that controls the memory are provided so that images can be inputted from the data processing device independently in terms of time and/or location, but the present invention is not limited to this. For example, the output data of an A/D conversion circuit is directly modulated by a clock insertion modulation circuit and an FSK modulation circuit, and then Wireless transmission may also be performed from an optical transmission circuit.

"Effects of the Invention" As described above, the image input device according to the present invention includes a clock insertion modulation circuit that performs digital modulation by inserting a synchronizing clock pulse into output data of an A/D conversion circuit;
It is equipped with an FSK modulation circuit that performs digital FM modulation on the output of this clock folding/modulation rR circuit, and an optical transmission circuit that converts the output of this FSK modulation circuit into an optical signal and transmits it. Since the data is transmitted to the data processing device, no transmission cable is required. For this reason, the transmission cable may get in the way of image input, or the transmission cable may interfere with the image input area (scanning location).
In addition, the clock folding modulation circuit modulates the output data of the A/D converter circuit by folding synchronizing clock pulses into the output data of the A/D conversion circuit, thereby widening the bandwidth. It is possible to add clock pulses to data without any interference, thereby improving transmission efficiency. Moreover, since the FSK modulation circuit digitally FM modulates the output of the clock folding modulation circuit and transmits it to the optical transmission circuit, high-speed transmission is possible. Also,
When the clock folding modulation circuit is configured with an MFM modulation circuit, the minimum pulse width can be increased to further improve transmission efficiency.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of an image input device according to the present invention, FIG. 2 is an explanatory diagram explaining the operation of the modulation circuit in FIG. 1, and FIG. 3 is an explanation of the data transmission format in FIG. 1. FIG. 4 is a block diagram showing a conventional example. DESCRIPTION OF SYMBOLS 1... CCD linear image sensor (image sensor), 2... A/D conversion circuit, 10... Image input device, 20... Memory controller, 21... Image memory, 22...・Modulation circuit, 23...MFM modulation circuit (
clock insertion modulation circuit), 24...FSK modulation circuit, 25...optical transmission circuit, 28...optical signal, 40...
・PC (data processing device), Fc... Frequency of clock pulse for synchronization.

Claims (2)

[Claims] (1) In an image input device that obtains an image signal by photoelectrically converting image information with an image sensor, converts this image signal into image data with an A/D conversion circuit, and transmits it to a data processing device, the A/D A clock insertion modulation circuit performs digital modulation by folding synchronization clock pulses into the output data of the conversion circuit, an FSK modulation circuit performs digital FM modulation on the output of the clock insertion modulation circuit, and an FSK modulation circuit converts the output of the FSK modulation circuit into an optical signal. An image input device comprising: an optical transmission circuit that converts the image into an image and wirelessly transmits the converted image to the data processing device. (2) The image input device according to claim (1), wherein the clock insertion modulation circuit is an MFM modulation circuit.