JPH0379457U

JPH0379457U -

Info

Publication number: JPH0379457U
Application number: JP13950789U
Authority: JP
Priority date: 1989-12-01
Filing date: 1989-12-01
Publication date: 1991-08-13

Description

[Brief explanation of drawings]

第１図は本考案の実施例を示す反射型ホトイン
タラプタの構成ブロツク図、第２図は従来の光結
合装置の構成ブロツク図、第３図は第２図中の受
発光部の概略の外観図、第４図は第１図中の受発
光部の概略の外観図、第５図は第１図の回路図、
第６図は第１図の動作タイミング図、第７図は第
４図の変形例を示す受発光部の概略の外観図であ
る。３１……受発光部、３２，３３……発光素子ア
レイ、３２−１〜３２−ｎ，３３−１〜３３−ｎ
……発光素子、３４……受光素子アレイ、３４−
１〜３４−ｎ……受光素子、３５，３７……ドラ
イブ回路、３６……クロツク回路、３８……マル
チプレクサ回路、３９……増幅器、４０……選択
回路、φ１〜φ５……クロツク信号。 Fig. 1 is a block diagram of a reflective photointerrupter showing an embodiment of the present invention, Fig. 2 is a block diagram of a conventional optical coupling device, and Fig. 3 is a schematic external appearance of the light receiving and emitting part in Fig. 2. Figure 4 is a schematic external view of the light receiving and emitting part in Figure 1, Figure 5 is a circuit diagram of Figure 1,
FIG. 6 is an operation timing diagram of FIG. 1, and FIG. 7 is a schematic external view of a light receiving and emitting section showing a modification of FIG. 4. 31... Light receiving and emitting section, 32, 33... Light emitting element array, 32-1 to 32-n, 33-1 to 33-n
...Light emitting element, 34... Light receiving element array, 34-
1 to 34-n... Light receiving element, 35, 37... Drive circuit, 36... Clock circuit, 38... Multiplexer circuit, 39... Amplifier, 40... Selection circuit, φ1 to φ5... Clock signal.

Claims

[Claims for Utility Model Registration] A first light emitting element array consisting of a plurality of first light emitting elements having a specific emission wavelength, and a plurality of second light emitting elements having an emission wavelength different from the first light emitting elements. a second light emitting element array, and the first,
A light-receiving element array consisting of a plurality of light-receiving elements that receives light from a second light-emitting element array is connected to a light receiving/emitting section housed in the same package and receiving first and second clock signals which are activated alternately. Among them, the first clock signal is
a first drive circuit that sequentially controls on/off the first light emitting elements in the light emitting element array; and a first drive circuit that sequentially turns on and off the second light emitting elements in the second light emitting element array based on the second clock signal. - a second drive circuit that performs off control; a multiplexer circuit that sequentially controls on/off the light receiving elements in the light receiving element array in synchronization with the first and second clock signals; and the first light emitting element array. The output of the light receiving element array that has received light from the light emitting element array is synchronized with the first clock signal, or the output of the light receiving element array that has received light from the second light emitting element array is synchronized with the second clock signal. An optical coupling device characterized by comprising a selection circuit that selectively outputs signals in synchronization with the signals.