JPH0377440A - Mobile telephone terminal control system - Google Patents

Abstract

PURPOSE:To reduce power consumption of a mobile telephone terminal by generating a periodic interrupt when there is a change in a display content or there exists a key entry so as to relieve the load of a main CPU. CONSTITUTION:A main CPU sets a 5ms enable (i) outputted from an interrupt control register 7 to a disable state when a cause to a change in a display content takes place, sets a start pulse to a 5ms interrupt start flag (h) and a periodic interrupt control section 13 allows an output of a 5ms pulse to a 1/5 frequency divider section 3. Moreover, when the main CPU sets a 5ms interrupt enable (i) to the enable state and a data from a keyboard is inputted through a line (e), a signal is inputted from a serial data input section 10 to a periodic interrupt control section 13 and the output of 5ms pulse is allowed to the 1/5 frequency divider section 3. Thus, the load to the main CPU is required only at the key entry and a change in the display content and the power consumption of the mobile telephone terminal is relieved.

Description

[Detailed Description of the Invention] [Summary] The present invention aims to provide an operation control method that reduces battery power consumption with respect to a mobile phone terminal that has a keyboard and a display section that are powered by a battery. It consists of a CPU, an LSI that monitors the operation of the main CPU, and a sub CPU that controls the display section and keyboard, and an interrupt signal control section provided in the LSI periodically generates interrupts to the upper CPU. and the main CPUIJ<When the interrupt is detected, the presence or absence of input from the keyboard is checked, and when the display contents of the display section have changed, the main CPUIJ is sent to the CPU via the LSI within the interrupt processing. In a control method that sends display data and updates the display, a periodic interrupt control section is provided to control the interrupt signal control section that sends out the interrupt, and the periodic interrupt control section controls the transmission of data from the upper CPU. It is possible to control the start and stop of interrupt generation, and furthermore, when a key input is generated from the CPU and the periodic interrupt is stopped, the interrupt is started, so that the key input and display contents can be controlled. The configuration is such that the load on the upper CPU is reduced by generating the periodic interrupt when there is a change.

[Industrial application field]

The present invention relates to a method for controlling the operation of a mobile telephone terminal having a keyboard and a display section powered by a battery.

[Conventional technology]

FIG. 2 is a circuit diagram of a mobile telephone terminal, and the mobile telephone terminal of the present invention can be used as a cellular one-way mobile telephone terminal in various mobile telephone terminals including car telephones, portable telephones, and mobile telephones. ing.

In the figure, 21 is the main processing unit (
The memory system of the main CPU 21 is realized by the first ROM 22 containing the operating program of the main CPU 21 and the RAM 23 for data storage.
or 8MHz) mask clock divided by 1/4
It operates with a MHz (or 2MHz) clock. 25
is a large-scale integrated 4B (hereinafter referred to as LSI), and LSI
A second ROM 2 for storing system information connected to 25
6 and a third ROM 27 for storing the serial number. In addition to the above, the configuration of the mobile phone terminal includes a transmitting/receiving system consisting of a transmitting/receiving section 33 and an antenna 34, a sub-CPU 30 of a baseband section 29.4-bit microcomputer,
It also has a man-machine interface system consisting of a display section 31 and a keyboard 32, and a battery 35. Note that 24 is a bus, and the main CPU 21. First ROM22
．． RAM23. Baseband section 29. Each data path between the sub CPU 30 and the transmitter/receiver 33 is configured. Furthermore, the baseband section 29 has a function of performing analog processing and a function of performing digital processing, and also has a function of performing analog processing and digital processing.
5 supplies power to the circuits shown.

Mobile telephone terminals are required to perform various complex processes, and microcomputers are used for reasons such as ease of system construction, economy, and compactness. The 8-bit main CPU 21 is used as a microcomputer to control the terminal and receive data.

While performing data transmission, timer management, etc., the 4-bit sub-CPU 30 is used to process man-machine communications such as the display section 31 and keyboard 32 in the mobile telephone terminal. In addition to this, mobile phone terminals include:
Performs call processing baseband processing, transmission/reception processing, etc.

In the mobile telephone terminal shown in FIG.
The U21 regularly monitors the status of the sub CPU 30. Although input from the keyboard 32 is actually performed only during a limited period of time when a person operates the mobile telephone terminal, the main CPU 21 normally operates even when no operation is performed from the keyboard 32. There is. For this reason, battery power is wasted, and control to reduce power consumption is required.

For this reason, in the above-mentioned processing circuit, (1) First, low power consumption is achieved by using a CMOS device, which is a semiconductor with low power consumption.

(2) Complex and infrequently processed processes are processed by the main CPU 21, while those that need to be regularly processed and frequently processed are processed by the LSI 25.

We are working to reduce power consumption by taking measures such as these. The low power consumption control operation in the LSI 25 will be described below with reference to FIG.

FIG. 3 is a diagram showing an example of the circuit configuration of a conventional LSI. The master clock generator 1 is controlled by a crystal 28 (see FIG. 2) and supplies a clock pulse to a part of the interval timer to generate a clock with a cycle of, for example, 1 sa, and further generates a pulse with a cycle of, for example, 5 ms in a 5 frequency divider 3. is generated and supplied to the interrupt signal control section 4. Interrupt signal control section 4
Now, in order to set the interrupt flag register 6 to indicate that it is a 5sa interrupt every time the regular pulse of 5 ms is sent, the 5 rns interrupt flag in (a) is sent and set.

At the same time, the interrupt signal control section 4 generates an interrupt signal to the main CPU 21 (see FIG. 2) and sends it through the interrupt line. At this time, the main CPU 21 selects the interrupt line as
It detects that the level has changed from ' to Low' and starts interrupt processing. First, when an interrupt process is started, the main CPU 21 sends an address to the address decoder 5 via the address bus, selects the interrupt flag register 6 based on the address decoded by the address decoder 5, and reads out the contents.

Next, in order to know what kind of interrupt it is, the main CPU 21 checks the interrupt flag register 6 and learns that it is a 5sa interrupt. With this procedure, the main CPU 21
When it learns that it is an ru interrupt, it sends the 5-Ayu interrupt flag to the periodic interrupt control register 7. When the periodic interrupt control register 7 is set and the 5sa interrupt reset (mounted) is output, the interrupt signal control unit 4 sets the 5Ayu interrupt flag of the interrupt flag register 6 through the 5Ayu interrupt flag (a). At the same time as resetting the interrupt line of the interrupt signal control section 4.

Return "old gh" to level from Lo-. and main CP
U21 starts the 5aa interrupt processing as follows.

(Interrupt Processing of 5sa) The interrupt processing of 5sa is a process of inputting data from the keyboard 32 of the man-machine and displaying data from the display unit 31.

(A) Flow of input information on keyboard 32 Keyboard 32
(Figure 2) The data input from the sub CPU 30 (4
data (1 bit) is converted to serial data by
It is input to the LSI 25 as 1!1. Also 9.6KH
The high speed clock z is input to the serial data input section 10 and the serial data output section 12, and the input data is processed at high speed.

When data (e) is input to the serial data input section 10 and key information is set to the serial data input section 10,
To set that there is an input, a Full flag (C) is sent to the serial input/output flag register 8. At this time, the main CPU 21 reads the data of the serial attendance flag register 8 in the 5-day interrupt process, checks the state of the Full flag (C), confirms whether there is an input from the keyboard 32, and confirms whether there is an input from the keyboard 32. If there is an input, the contents of keyboard data register 9 are transferred to the main CP.
U21 performs read-related processing.

(B) Flow of display information When display information corresponding to a change in system status or input information from the keyboard 32 occurs, the main CPU 21
In the process of 5sa, the serial input/output flag register 8 is read and the contents of the Empty flag (d) are checked. Empty flag (d) is empty
If the display data is in the state of The sub CPU 30 sets the display on the display unit 31.The Empty flag (dl
is reset while display data is being sent from the serial data output unit 12, and is marked when the sending is completed.

If the main CPU 21 is Empty during the 5m interrupt processing, the main CPU 21 performs the display data sending processing described above.

As mentioned above, conventionally, 5sa, which is a constant periodic interrupt,
Although an interrupt is generated to check the keyboard 32 and display data, most inputs on the keyboard 32 and changes in the display on the display 31 occur when a person operates the terminal, so regular 5-post interrupts are useless. Therefore, it can be said that power is wasted.

[Problem to be solved by the invention]

Therefore, the 5-point interrupt when a person operates the terminal is effective, but the other 5-point interrupts are wasteful operations, and there is a problem in that they waste power.

The present invention aims to provide an operation control method that reduces battery power consumption.

[Means to solve the problem]

In the present invention, a main CPU 21 that controls the entire system;
An LSI 25 that monitors the operation of the main CPU 21 and a display section 3
1 and a sub CPU 30 that controls the keyboard 32, the interrupt signal control unit 4 provided in the LSI 25 periodically generates an interrupt to the upper CPU 21, and when the main CPU 21 detects the interrupt, A control system that checks the presence or absence of input from the keyboard 32, and when a change occurs in the display content of the display section 31, sends display data to the side CPU 30 via the LSI 25 within the interrupt processing to update the display. , a periodic interrupt control section 13 is provided to control the interrupt signal control section 4 that sends out the interrupts, and the periodic interrupt control section 13 controls the start and stop of generation of interrupts from the upper CPU 21. Furthermore, when a key input occurs from the side CPU 30 and the periodic interrupt is stopped, an interrupt is started, and when there is a key input or a change in display content, the periodic interrupt is started. The configuration is such that the load on the upper CPU 21 is reduced by generating an interrupt.

[For production]

In the present invention, in a configuration not shown in FIGS. 1 and 2, a periodic interrupt control section 13 is provided which can control the start and stop of interrupt generation from the upper CPU 21 to control the interrupt signal control section 4. An interrupt is started when a key input is generated from the side CPU 30 and the periodic interrupt is stopped, and the periodic interrupt is generated when there is a key input or a change in display content. ing.

Therefore, the load on the upper CPU 21 is reduced only when there is a key input or a change in display content, making it possible to reduce the power load on the mobile phone terminal.

〔Example〕

FIG. 1 is a diagram showing the circuit configuration of an LSI according to the present invention. Comparing Figure 1 and Figure 3, in Figure 3, the 5m interrupt always occurs, whereas in Figure 1, the circuit is configured to generate a 5+ms interrupt only when necessary. ing.

From the master block generator 1 to the interval timer 2
For example, a clock of 1 ms is generated and inputted to the celestial divider 3. The celestial divider 3 outputs a 51-US pulse depending on whether the periodic interrupt controller 13 allows the periodic 51 US pulse to be output from the interrupt signal controller 4 or not. When a regular 5m pulse is supplied from the celestial divider 3, the interrupt line from the interrupt signal controller 4 to the main CPU 21 is changed from the old gh level to the "Low" level, similar to the conventional signal flow. to notify the main CPU 21 of the occurrence of an interrupt.

Next, the conditions for outputting the 5-bit pulse from the celestial divider 3 to the periodic interrupt controller 13 will be explained. Periodic interrupt control unit 13
, the 5-bit interrupt stop flag of ig+ from the periodic interrupt control register 7, the 5-μs interrupt start flag of (h), the 5-round interrupt enable of (1), and the Full flag from the serial data output unit IO. fc+ is input. Depending on the status of these signals, the periodic interrupt control unit 13
indicates whether or not the 5ff13 pulse from the celestial divider 3 can be output.

The control from the main CPU 21 to the LSI 25 as to whether or not to generate a 5-patch interrupt is as follows.

If the main CPU 21 wants to generate a 5-Ayu interrupt, it inputs it to the periodic interrupt control register 7 (i) 5111!
1 Disable the interrupt enable (0° level), and at the same time send a start pulse (write 1° and then write 0) to the interrupt start flag 5. From this, periodic interrupt control The unit 13 is permitted to output a five-fertilization pulse to the celestial division unit 3.

If the 5L1 interrupt is stopped and there is an input from the keyboard 32 and you want to generate a 5L1 interrupt, the main CPU 21 enables the 5LL interrupt enable (i) of the periodic interrupt control register 7 (1 level). At the same time, set the stop pulse (write 1' and then write 0) of the 5 paste interrupt stop flag (h). From this, the periodic interrupt control unit 13
The output of the 5-stick pulse is prohibited. Also, 5ms interrupt enable (i) from periodic interrupt control register 7.
is set, so that when data from the keyboard 32 is input to the serial data input section 10 through line (e), the Full flag from the serial data input section (signal to the periodic interrupt control section 13 through line C1) is set. is input, and the output of the 5m pulse to the celestial divider 3 is permitted.

By adding the above processing part, the main CPU 21 performs 5 ma I RQ generation processing when a factor that changes the display content occurs, and 5 ma I RQ when the processing is completed.
can be stopped. Also, checking the keyboard data can be processed by automatically generating a 5+ns interrupt by inputting the keyboard data.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, by performing periodic interrupt generation processing only when a factor that causes a change in display content occurs, the clock off time of the main CPU and peripheral circuits can be This makes it possible to increase the power consumption of the mobile telephone terminal, thereby making it possible to reduce the power consumption of the mobile telephone terminal.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the circuit configuration of an LSI according to the present invention, FIG. 2 is a circuit diagram of a mobile telephone terminal, and FIG. 3 is a diagram showing an example of the circuit configuration of a conventional LSI. In the figure, 4 is an interrupt signal control section, 6 is an interrupt flag register 13 is a regular interrupt control section, 21 is a main CPU, and 25 is an LSI. 30 is a sub-CPU, 31 is a display section, and 32 is a keyboard.

Claims (1)

[Claims] Main CPU (21) that controls the entire system;
An LSI (25) that monitors the operation of (21) and a display section (
31) and a sub CPU (3) that controls the keyboard (32).
0), the interrupt signal control unit (4) provided in the LSI (25) periodically generates an interrupt to the main CPU (21), and the main CPU (21) detects the interrupt. When this happens, the presence or absence of input from the keyboard (32) is checked, and when the display content of the display section (31) changes, the LSI (
In the control method of sending display data to the sub CPU (30) via the sub CPU (30) to update the display, a periodic interrupt control section ( 13), and the periodic interrupt control unit (13)
It is possible to control the start and stop of interrupt generation from the main CPU (21), and furthermore, when a key input is generated from the sub CPU (30) and the periodic interrupt is stopped, the interrupt is controlled. A mobile telephone terminal control system characterized in that the load on the main CPU (21) is reduced by causing the periodic interrupt to occur when there is a key input or a change in display content.