JPH037053B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a color image reading device that can accurately extract a plurality of color data by optically reading a document and determining colors from the optical image thereof. Recently, many image forming apparatuses have been proposed that read information on a document bit by bit using a photoelectric conversion element such as a CCD, convert it into an electrical signal, and digitally record the information in accordance with the converted signal. By the way, the three color information of black, red, and blue are considered to be the most important and appear frequently in general manuscripts such as documents. As a method for determining these three color information, the methods shown in FIGS. 1 and 2 have been proposed. To explain FIG. 1, an original 1 is irradiated with a light source 2, and the reflected light L is passed through a reflecting mirror 3 and an infrared absorption filter 4 to an imaging lens 5 and a beam splitter 6 such as a dichroic mirror. illuminate. In this beam splitter 6, the long wavelength red light LR is reflected,
In addition, the short wavelength blue light LB is transmitted and separated, and reaches photoelectric converters 7 and 8, each of which has a plurality of photoelectric conversion elements, such as CCDs, arranged in a line. Therefore, the brightness of the red light image is detected by the photoelectric converter 7, and the brightness and dark of the blue light image is detected by the photoelectric converter 8 and converted into electrical signals. Image data detected by photoelectric converters 7 and 8
SR and SB are clock pulses from a clock generation circuit (not shown) and are output sequentially in time series.
The signal is supplied to the color discrimination circuit 9. FIG. 2 shows an example of the configuration of the color discrimination circuit 9. The above-mentioned image data SR and SB are amplified in amplitude by amplifiers 11 and 12, respectively, and then sent to a clamp circuit 13.
and 14, voltage followers 15 and 16
The image data is converted into image data SR1 and SB1, and further converted into binary data DSR and DSB by binarizers 17 and 18 such as comparators. The binary data DSR and DSB are supplied to a decoder 19 for color discrimination, and color data of red data R, black data BK, blue data B, and white data W is output. The decoder 19 is comprised of inverters 20-23 for inverting pulse signals and AND gates 24-27 for performing logical AND operations as shown. Here, the actual values of the image data SR1 and SB1 supplied to the binarizers 17 and 18 are as shown in the table below and FIGS. 3a and 3b.

[Table] Using the values in the table above, set the SR1 threshold to 550mV,
Color discrimination is possible by setting the threshold of SB1 to 640 mV and binarizing. In other words, SR1-2
Assuming that the digitized output is DSR and the binary output of SB1 is DSB, the illustrated decoder 19 can discriminate as shown in the table below.

[Table] However, the red and blue signal output ratio of SR1 is
Since 670:380≒2:1, it is susceptible to output fluctuation factors such as noise, and red may be read as black or blue as white. In this way, the conventional color discrimination method has the disadvantage that accurate color discrimination cannot be made if noise is introduced into the output signal of the photoelectric converter due to the difference in the reading level due to the difference in the spectral sensitivity of the photoelectric converter. There is. For example, in the case of a document with black halftones, black edges, or shading, red may be recorded at the edges of black information, or adjusting the binarization level alone may cause the red to become faded or the black and blue to overlap. It became a playback image. Therefore, in view of the above points, the applicant has proposed a color discrimination method as shown in FIG. To explain this, 31 to 34 are amplifiers, and 35 and 36 are subtracters. The other parts are the same as those shown in FIGS. 1 and 2 above, so their explanation will be omitted.
Here, assuming that the gains of the amplifiers 31 to 34 are G1 to G4 in order, data S1 and S2 output from the subtracters 35 and 36 are given by the following equations. S1=G1・SR1−G3・SB1 (1) S2=G2・SR1−G4・SB1 (2) Here, G1 to G4 in equations (1) and (2) are selected as follows. G1=2.74, G2=-1, G3=1, G4=-
1.91 As a result, the actual analog output values for each color of S1 and S2 are as shown in the table below and FIGS. 5a and 5b.

[Table] Comparing Table 1 and Table 3 or Figure 3 and Figure 5, it is clear that S1, S
2 is clearly much easier. Furthermore, even at the lowest level ratio,
Since a large level ratio of 233:1492=1:6.4 can be achieved, it is relatively less susceptible to noise. However, even in the improved color discrimination method described above, since the decoder 19 is shared,
It is not possible to adjust the color density of red, black, and blue independently; for example, if you change the signal strength of red because it is lighter, it will have a negative effect on the discrimination of other colors, resulting in incorrect discrimination. A problem arose. Furthermore, in reality, there are errors in the positional adjustment of the two photoelectric converters (CCDs) and the focus adjustment of the lenses, so the edge part of a certain color (for example, black) may be distorted by other colors due to the positional deviation. There is a problem in that an erroneous signal corresponding to several pixels is output in a color signal (for example, red) in the king scanning direction. The same applies to the sub-scanning direction. As a result, the phenomenon of thinning of black lines or omission of thin black lines occurs. In reality, it is very difficult to perform mechanical adjustment to prevent such problems from occurring because the required range of optical path adjustment is extremely small (for example, on the order of μm). SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a color image reading device that can accurately extract a plurality of color data. A color image reading device that reads a document image includes a spectrometer that spectrally separates light from an original image into light of a first and second wavelength, and a spectroscope that separates light of the first and second wavelengths, respectively, by the spectroscope. The first and second
The first and second photoelectric conversion elements that output analog signals of a first forming means for forming color data representing a color image; and analog calculation of the first and second analog signals outputted from the first and second photoelectric conversion elements to obtain the specific color. analog calculation means for outputting a third analog signal that has a minimum value when representing an image; and comparing the third analog signal output from the analog calculation means with a predetermined slice level to determine the specific color. a second forming means for forming color data representing an image; and a color data representing the specific color image formed by the second forming means.
and gating means for outputting color data representing the black image by gating the color data representing the black image or the specific color image formed by the forming means. . Hereinafter, the present invention will be explained in detail with reference to the drawings. FIG. 6 shows a first embodiment of a color discrimination circuit for a color recording apparatus to which the present invention is applied. Here, 41 is an amplifier, 42 is a binarizer such as a comparator,
43 is a compressor that performs noise reduction to remove fine noise from binary data S11, 44 and 45 are thickening circuits that widen the pulse width of binary data S12 or BK, and 46 and 47 are inverters of binary data. The inverters 48 and 49 are AND gates. This inverter 46 or 4
7 and an AND gate 48 or 49 constitute a subtracter. The other parts are almost the same as those of the conventional example shown in FIGS. 1 and 4 described above, and therefore the description thereof will be omitted. Next, the operation of this color discrimination circuit will be explained. First, the gains G1 to G4 of the amplifiers 31 to 34 are selected as follows, for example. G1=G2=3.0, G3=G4=2.3 The values of SR1 and SB1 are the same as those in Table 1 above, so substitute the values of G1 to G4 into equations (1) and (2) above. Then, the actual analog output values for each color of S1 and S2 will be as shown in the table below and FIG.

[Table] Threshold value of S1, that is, slice level of blue reading
For example, set SL1 to -600mV and turn on the binarizer 17.
The binarized blue data S11 is extracted. Also,
S2 threshold or red reading slice level SL
2 to, for example, 600 mV and another binarizer 18.
The binarized red data S21 is extracted. Since the slice levels SL1 and SL2 are set separately in this way and the binary data S11 and S12 are extracted, it is possible to include only blue data in S11 and only red data in S21, as shown in FIG. can. On the other hand, in order to determine black data, data SR1 output from the voltage follower 15 is amplified by an amplifier 41 and binarized by an independent binarizer 42. At this time, if the gain G5 of the amplifier 41 is set to 2.0, for example, the image data S3 supplied to the binarizer 42
The actual value of is as shown in the table below based on the relationship S3=G5・SR1.

[Table] For example, if the threshold value of S3 is set to 1050mV,
A binarizer 42 binarizes the data. Therefore, the output binary data S31 includes black and blue information. Next, the data obtained by inverting the above-mentioned binary blue data S11 via the inverter 46 and the binary data S31 are supplied to the AND gate 48 and a logical AND operation is performed, thereby generating data S3 containing black and blue information.
Deactivate the blue information from 1 and obtain black data BK from AND gate 48. In this way, (black + blue) data is read based on image data SR1 without using a common decoder, and (blue) data is read based on data S1 and S2 obtained by analog calculation of image data SR1 and SB1.
Since it is configured to read (red) data, it is possible to independently adjust the color density of red, black, and blue, that is, set the slice level for each color (see FIG. 7). Therefore, according to this embodiment, it is extremely easy to adjust the color density for each color.
It is suitable for output devices such as color inkjet recording devices. Further, as shown in FIG. 6, after the binary blue data S11 outputted from the binarizer 17 is subjected to noise reduction in the compressor 43, it is transferred to the thick line converting circuit 44.
By widening the pulse width and supplying it to the inverter 46, the blue data from the binary data S31 is reliably inhibited, and the photoelectric converter 7
and 8 (see FIG. 1), etc., so that the black data BK can be extracted accurately even if the positional deviation occurs. Here, the compressor 43 includes a main scanning compressor 43A and a sub-scanning compressor 43B which are connected in series as described later. This compressor 43 uses the blue data, for example, as a frame for image editing, so it is used to cut out high frequencies, considering them to be noise. FIG. 8 shows a specific example of the main scanning compressor 43A of the compressor 43 in FIG. Here, four flip-flops (FF) 51 to 54 are connected in cascade,
Q output signals Q1, Q of FF51, 52 and 53
2 and Q3 are supplied to AND gate 55. In addition, Q output signals Q1, FF51, 52 and 54,
Q2 and Q4 to AND gate 56, FF51,
53 and 54 Q output signals Q1, Q3 and Q
4 is supplied to an AND gate 57, and Q output signals Q2, Q3, and Q4 of FFs 52, 53, and 54 are supplied to an AND gate 58, respectively. Logic signal DMR1 obtained by logical operation of OR gate 59 based on the output signals of these AND gates 55 to 58.
is supplied to one input terminal of both AND gates 60 and 61. When synchronization signal SYNC1 is supplied to the clear terminal CLR of hexadecimal counter CT1, this counter CT
The count data of 1 becomes 0, and this counter CT1 counts the clock pulses CP3 introduced at its clock terminal CK. The 1/2 frequency divided signal 61 output from the output terminal Q _A of the counter CT1 and the 1/4 frequency divided signal 62 output from the output terminal Q _B are supplied to the AND gate 63, and the output signal T1 is applied to the AND gate 63. 64, and the signal 1 inverted by an inverter 65 is supplied to the other input terminal of the AND gate 60. The OR signal 67 obtained by the OR gate 66 based on both the output signals of the AND gates 60 and 64 is
Supplied to the D input terminal of FF68. A logic signal DMR2 obtained from the Q output terminal of the FF 68 is supplied to the other input terminal of both AND gates 61 and 64, respectively. The operation of obtaining the main compressed data DCM from the blue data S11 in the main scanning compressor 43A is performed by using a clock pulse CP3 common to the FFs 51 to 54, 68 and the counter CT1 in the above-described configuration.
This is done by supplying FIGS. 9A to 9G show signal waveforms at various parts in FIG. 8. Now, assuming that the blue data S11 acquired from the original MAT is a signal as shown in FIG. 9D, the signals T1, DMR1, DMR shown in FIG. 8 are generated in response to the clock pulse CP3 shown in FIG.
2 and DCM become the signals shown in FIGS. 9C to 9G, respectively. Here, the four AND gates 55~
58 and the OR gate 59 form a 3/4 majority logic circuit, and if the number of data that takes a high logic level is large (3 or more out of 4), the group of compared data will have a high logic level as a whole. It is viewed as one large piece of data with logical levels. In this way, with the present main scanning compressor CDM43A,
For example, data is compressed from 1728 bits per line to 216 bits (1/8), and compressed data DCM is obtained using 6/8 majority logic. FIG. 10 shows a specific example of the sub-scanning compressor 43B of the compressor 43 in FIG. 6. Here, the main compressed data 43A is transferred to the 215-bit shift register SR1.
The output signal 71 is supplied to the 216-bit shift register SR2, and the output signal 72 is supplied to the 216-bit shift register SR2.
These three cascaded shift registers SR1,
A sequential output signal 73 is obtained from SR2 and SR3. Main compressed data DCM and gate 74,7
5 and 76, output signal 71 of shift register SR1 is applied to AND gates 74, 75 and 77,
The output signal 72 of the shift register SR2 is input to the AND gates 74, 76 and 77, and the shift register
The output signal 73 of SR3 is connected to AND gates 75 and 76.
and 77, respectively. Based on the output signals of these four AND gates 74 to 77, an OR gate 78 performs a logical sum operation, and supplies the output logic signal DSR1 to an AND gate 79 and a 216-bit shift register SR4. The output signal 80 is supplied to the AND gate 79 and also to the 216-bit shift register SR5, and the output signal 81 is supplied to the AND gate 79. The output logic signal DSR2 of the AND gate 79 is transferred to the 216-bit shift register SR.
6 (part of the first line memory ML1),
The sampled sub-compressed data S12 is obtained as the output. A clock pulse for controlling the operation of the main sub-scanning compressor 43B is sent to the clock terminal CK of the hexadecimal counter CT2.
Supply CP3. The counter CT2 counts the clock pulse CP3 and outputs the 1/2 frequency divided signal Q _A , 1/4 frequency divided signal Q _B and 1/8 frequency divided signal Q _C to the AND gate 82 .
to obtain the time signal TS1 of the AND output. In addition, the synchronization signal SYNC2 is input to the counter CT2.
The clear terminal CLR of the hexadecimal counter CT3 is supplied to the clock terminal CK of a separate hexadecimal counter CT3. Counter CT3 counts the synchronizing signal SYNC2, and divides it into 1/2 frequency divided signals Q _A and 1/2.
The 4 frequency divided signal Q _B , the 1/8 frequency divided signal Q _C and the 1/16 frequency divided signal Q _D are supplied to the decoder DEC to obtain the second time signal TS2 which is the decoded output thereof. Furthermore, the carry output signal of hexadecimal counter CT3 is transferred to inverter 8.
3 to its clear terminal CLR, and this signal is obtained as the third time signal TS3. The first time signal TS1 is transferred to a shift register SR1,
Commonly supplied to clock terminal CK of SR2 and SR3. Further, the first time signal TS1 and the second time signal TS2 are supplied to the AND gate 84, and the output signal LGS1 is sent to both shift registers SR4 and SR.
5 clock terminals in common. Further, the first time signal TS1 and the third time signal TS3 are supplied to an AND gate 85, and its output signal LGS2 is supplied to the clock terminal CK of the shift register SR6. Here, the clock pulse CP3 is a signal for main scanning m, and is a pulse signal generated for each bit. Further, the synchronizing signal SYNC2 is a signal for sub-scanning s, and is a signal that causes the counter CT3 to count up every line. In response to the clock pulse CP3 and synchronization signal SYNC2 that control the main scanning and sub-scanning,
3B compresses the main compressed data DCM into data S12 having 1/12 the number of bits. The logic circuit LOG composed of four AND gates 74 to 77 and an OR gate 78 is compressed to 1/4 and is a 3/4 majority logic circuit. That is, the main compressed data DCM,
If any three of the four data output signals 71, 72, and 73 of the three shift registers SR1, SR2, and SR3 are at a high logic level, the output logic signal DSR1 is at a high logic level. Further, the AND gate 79 is a logic circuit that compresses data by 1/3. Therefore, logic circuit
The LOG and AND gate 79 perform a 9/12 majority logic operation. In this way, the sub-scanning compressor 43B obtains sub-compressed data S12 through pulse processing every 12 lines. FIG. 11 shows signal waveforms at various parts in FIG. 10. Here, if the period of the clock pulse CP is T _CP , the period T _SY1 of the synchronization signal SYNC1 is 1728T _CP.
It is. Furthermore, if the period of the synchronization signal SYNC2 is T _SY2 , the period T _TS1 of the first time signal TS1 is 8T _CP ,
The period T TS2 of the second time signal _TS2 is 4T _SY2 , and the period T TS3 of the third time signal _TS3 is 12T _SY2 . FIG. 12 shows a specific example of the bold line circuit 44 in FIG. 6. Here, 101 is a delay circuit that delays the binarized image data S12 by one line;
2 is data S12A output from the delay circuit 101
A delay circuit 103 further delays the image data S12, S12A and S12 by one line.
This is an OR gate that outputs data S12C in which the number of pulses is increased (hereinafter referred to as thick line) in the sub-scanning direction by performing a logical OR operation on B. The delay circuits 101 and 102 and the OR gate 103 perform thick line formation in the sub-scanning direction. . Further, 104 is a delay circuit such as a D-type flip-flop that delays the output data S12C of the OR gate 103 by a predetermined bit (for example, 1 bit) per clock pulse CP, and 105 delays the output data S12D of the delay circuit 104 by a predetermined bit (for example, 1 bit) per clock pulse CP.
A delay circuit such as a D-type flip-flop further delays a predetermined bit (for example, 1 bit) per CP;
This is an OR gate that performs an OR operation on D and S12E and outputs data S13 whose pulse width has been expanded (hereinafter referred to as thick line) in the main scanning direction.The delay circuits 104 and 105 and the OR gate 106 make the line thick in the main scan direction. I do. FIGS. 13A to 13E show signal waveforms at various parts related to thick lines in the sub-scanning direction in FIG. 12. now,
The blue data S12 supplied from the compressor 43 is the first
If the signal is as shown in Figure 3B, then
According to the clock pulse CP shown in FIG. 12, the data S12A, S12B and BS12 shown in FIG.
C becomes the signals shown in FIG. 13 C to E, respectively.
In this way, the number of pulses is increased by, for example, three lines to obtain thicker lines in the sub-scanning direction. Note that the number of delay circuits 101 and 102 can be increased or decreased depending on the width of the thick line. 14A to 14E show signal waveforms at various parts in FIG. 12 regarding thick lines in the main scanning direction. Now, suppose that one of the pulses of the data S12C, which is thickened in the sub-scanning direction and supplied from the OR gate 103, is a signal as shown in FIG. 14B.
In response to the clock pulse CP shown in FIG.
Data S12D, S12E and S shown in Figure 2
Each of the 13 pulses becomes a signal shown in FIGS. 14C to 14E. In this way, the thick line circuit 44 shown in FIG. 6 outputs data S in which the sub-scanning direction and the main scanning circuit are thickened, that is, the number of pulses and the pulse width are expanded by a predetermined amount.
13 is output. This data S13 is inverted by an inverter 46 and supplied to an AND gate 48, and the data S31 containing (blue+black) is
The logical AND operation is performed to negate the blue data, and the black data is
Output BK. As a result, the width of the blue data to be deenergized is sufficiently expanded, and as a result, the blue data can be reliably deenergized, and even if the position of the photoelectric converter etc. occurs, the black data BK can be accurately reproduced. It can be identified and taken out. Therefore, the conventional problems of thin black lines or omissions of thin black lines can be completely solved. Further, as shown in FIG. 6, by supplying the black data BK output from the AND gate 48 to a thick line making circuit 45 having the same configuration as the thick line making circuit 44, thick lines can be drawn in the main scanning direction and the sub scanning direction. That is, the number of pulses and the pulse width are expanded, and the expanded data S15 is inverted by the inverter 47 and then supplied to the AND gate 49. The AND gate 49 performs a logical AND operation on the inverted data S16 and the red data S21 supplied from the binarizer 18, deactivates the black data, and outputs the red data R. Therefore, even if some black information remains in the red data S21 output from the binarizer 18, the black data can be reliably deactivated, and even if the position of the photoelectric converter etc. occurs, , red data R can be accurately determined and extracted. Therefore, the conventional problem of thinning of the red line or omission of the thin red line can be completely solved. FIG. 15 shows a second embodiment of a color discrimination circuit to which the present invention is applied. Here, 110 is an amplifier that amplifies the amplitude of the image data SB1 supplied from the voltage follower 16, and 111 is a binarizer that binarizes the data S4 supplied from the amplifier 110. Further, 112 is an AND gate that performs an AND operation on the data S41 supplied from the binarizer 111 and the data S16 supplied from the inverter 47, turns off black data, and outputs red data R. The other parts are the same as those of the first embodiment shown in FIG. 6, so the explanation thereof will be omitted. To explain the operation different from the first embodiment, image data SB1 is amplified in amplitude by amplifier 110 and becomes analog data S4. If the gain of the amplifier is, for example, G6 = 2.0, S4 is G6·SB1. , S4 are as shown in the table below (see Table 1).

[Table] For example, if the threshold value of S4 is set to 1270mV,
Since the binarization is performed by the binarizer 111, the binarizer 11
1, the binary data S41 supplied to the AND gate 112 includes red and black information. On the other hand, the black data BK is expanded in pulse width and number by the thickening circuit 45, and further inverted by the inverter 47, and the data S16 is supplied to the AND gate 112. Therefore, the binary data S4 including the above-mentioned red and black information
1 to black information can be reliably turned off, and accurate red data R can be output from the AND gate 112. Note that when the blue data B output from the color discrimination circuit is used to designate an area for image editing of a document, resolution is not required. Therefore, it can be used without special deactivation of other colors, so 2
The data S11 output from the value conversion circuit 17 is supplied as blue data B as is. Also, when the blue information is turned off, it is passed through the compressor 43 to the thick line making circuit 44.
It is for the same reason that it is supplied to However, since the red data R requires high resolution, the black information is deleted without passing it through a compressor.
Of course, if blue data B is used as data to be reproduced and recorded, such as characters or diagrams, rather than for specifying an area, other colors (for example, black) are deactivated, as was done for color discrimination of red data R. is suitable. FIG. 16 shows another specific example of the thickening circuit 44 or 45. Here, 120 is binary data S1
This is a delay circuit that delays 2 or BK by one line, and the other parts have the same configuration as shown in FIG. As shown in the figure, the data S12 or BK is first passed through the above-mentioned delay circuit 120, and then passed through the other delay circuits 101 and 102 and the OR gate 10.
Supply to 3. Therefore, since the thick line data S13 or S15 output from the OR gate 106 can be delayed by one line as a whole with respect to the input data S12 or BK, the output data S1
3 or S15 can be synchronized with the writing timing of an image recording device or the like. Note that since the thick line making circuits 44 and 45 are used to ensure the deactivation of a predetermined color and to enhance the effect, it is clear that a certain deactivation effect can be obtained even without the thick line making circuits 44 and 45. It is. As described above, according to the present invention, in a color image reading device that reads a black image and a document image having a specific color other than black, light from the document image is converted into light of first and second wavelengths. a spectroscopy means for spectroscopy, and first and second photoelectric conversions for outputting first and second analog signals by photoelectrically converting the lights of the first and second wavelengths separated by the spectroscopy means, respectively. and forming color data representing the black image or the specific color image by comparing the first analog signal output from the first photoelectric conversion element with a predetermined slice level. and a third analog signal that has a minimum value when representing the specific color image by performing analog calculations on the first and second analog signals output from the first and second photoelectric conversion elements. and second forming means for forming color data representing the specific color image by comparing the third analog signal output from the analog calculation means with a predetermined slice level. , by color data representing the specific color image formed by the second forming means,
and gate means for outputting color data representing the black image by gating the color data representing the black image or the specific color image formed by the first forming means, so that the black color in the original image is It becomes possible to accurately extract color data representing an image and color data representing a specific color image other than black. Therefore, by using this invention, high quality image recording becomes possible.

[Brief explanation of the drawing]

Figure 1 is an internal configuration diagram of an image reading device that uses the conventional color discrimination method, Figure 2 is a block diagram of the color discrimination circuit shown in Figure 1, and Figures 3a and b perform the analog subtraction shown in Figure 2. A diagram showing the previous image signal, FIG. 4 is a block diagram of another conventional color discrimination circuit, and FIG. 5a,
b is a diagram showing the image signal after the analog subtraction in FIG. 4, FIG. 6 is a block diagram of the color discrimination circuit which is the first embodiment to which the present invention is applied, and FIG. 7 is a diagram showing the image signal after the analog subtraction in FIG. 8 is a diagram showing the image signal of
A block diagram showing an example of the main scanning compressor part of the compressor shown in the figure, FIGS. 9A to 9G are diagrams showing signal waveforms of each part in FIG. 8, and FIG. A block diagram showing an example of a portion of a scan compressor,
11 A to I are diagrams showing the signal waveforms of each part in FIG. 10, FIG. 12 is a block diagram showing an example of the bold line circuit in FIG.
14A to 14E are diagrams showing signal waveforms of each part in FIG. 12, and FIG. 15 is a color discrimination circuit according to a second embodiment of the present invention. FIG. 16 is a block diagram showing another example of the bold line circuit of FIG. 6 or FIG. 15. 1...Original, 2...Light source, 3...Reflector, 4...
...Infrared absorption filter, 5...Imaging lens, 6...
Beam splitter, 7, 8...Photoelectric converter, 9...
...Color discrimination circuit, 11, 12...Amplifier, 13, 1
4... Clamp circuit, 15, 16... Voltage follower, 17, 18... Binarizer, 19... Decoder, 20-23... Inverter, 24-27
...And gate, 31-34...Amplifier, 3
5, 36...Subtractor, 41...Amplifier, 42...
Binarizer, 43...Compressor, 43A...Main scanning compressor, 43B...Sub-scanning compressor, 44, 45...
Thick line circuit, 46, 47... Inverter, 48,
49...And gate, 51-54, 68...Flip-flop, 55-58, 60, 63, 6
4,74-77,79,82,84,85...and gate, 59,66,78...or gate,
65, 83... Inverter, 101, 102...
Delay circuit, 103...OR gate, 104, 10
5...Flip-flop (delay circuit), 106...
...OR gate, 110...amplifier, 111...2
Value converter, 112...AND gate, 120...Delay circuit, SR, SR1, DSR, S1, S11, SB,
SB1, DSB, S2, S21...color signal, S3,
S31, S12, S13, S14, S15, S1
6, S4, S41...color signal, R...red data,
BK...black data, B...blue data, W...white data.

Claims (1)

[Scope of Claims] 1. In a color image reading device that reads an original image having a black image or a specific color image other than black, a spectroscopic means for separating light from the original image into light of a first wavelength and a second wavelength. and the first and second spectrally separated by the spectroscopic means.
first and second photoelectric conversion elements that output first and second analog signals by photoelectrically converting light of wavelengths, respectively; and the first analog output from the first photoelectric conversion element. a first forming means for forming color data representing the black image or the specific color image by comparing a signal with a predetermined slice level; 1. Analog calculation means for outputting a third analog signal having a minimum value when representing the specific color image by performing analog calculation on the second analog signal; and the third analog signal outputted from the analog calculation means.
a second forming means for forming color data representing the specific color image by comparing an analog signal of the color image with a predetermined slice level; and a color representing the specific color image formed by the second forming means. gating means for outputting color data representing the black image by gating the color data representing the black image or the specific color image formed by the first forming means, depending on the data; Characteristic color image reading device.