JPH0370084U - - Google Patents

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Publication number
JPH0370084U
JPH0370084U JP13215889U JP13215889U JPH0370084U JP H0370084 U JPH0370084 U JP H0370084U JP 13215889 U JP13215889 U JP 13215889U JP 13215889 U JP13215889 U JP 13215889U JP H0370084 U JPH0370084 U JP H0370084U
Authority
JP
Japan
Prior art keywords
terminal
fet
whose
capacitor
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13215889U
Other languages
Japanese (ja)
Other versions
JPH0729744Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13215889U priority Critical patent/JPH0729744Y2/en
Publication of JPH0370084U publication Critical patent/JPH0370084U/ja
Application granted granted Critical
Publication of JPH0729744Y2 publication Critical patent/JPH0729744Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Dc-Dc Converters (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案に係る二石フオワード・コン
バータの構成を示す回路図、第2図は従来の二石
フオワード・コンバータの構成を示す回路図であ
る。 1,2……FET、3……トランス、4,7,
8,14……コンデンサ、5,6,9,10,1
1,12……ダイオード、13……リアクタ。
FIG. 1 is a circuit diagram showing the structure of a two-stone forward converter according to this invention, and FIG. 2 is a circuit diagram showing the structure of a conventional two-stone forward converter. 1, 2...FET, 3...Transformer, 4,7,
8, 14... Capacitor, 5, 6, 9, 10, 1
1, 12...diode, 13...reactor.

Claims (1)

【実用新案登録請求の範囲】 直流電源に並列接続されたコンデンサ4と、 上記コンデンサ4のプラス端子にドレイン端子
を接続し、ソース端子をトランス3の一次コイル
の一端に接続したFET1と、 上記コンデンサ4のマイナス端子にソース端子
を接続し、ドレイン端子を上記トランス3の一次
コイルの他端に接続したFET2と、 上記FET1のソース端子にカソード端子を、
コンデンサ4のマイナス端子にアノード端子を接
続したリセツト用ダイオード6と、 上記FET2のドレイン端子にアノード端子を
、コンデンサ4のプラス端子にカソード端子を接
続したリセツト用ダイオード5と、 さらに、上記トランス3の二次コイルに接続し
た2つのダイオード11と12、およびリアクタ
13とコンデンサ14より成る直流平滑回路と によつて構成した二石フオワード・コンバータに
おいて、 上記リセツト用ダイオード6のカソード端子と
FET1のドレイン端子の間の接続したコンデン
サ8と、同じく上記リセツト用ダイオード6のカ
ソード端子にアノード端子を接続し、FET1の
ソース端子にカソード端子を接続したダイオード
10より成るスナバ回路と、 さらに、上記リセツト用ダイオード5のアノー
ド端子とFET2のソース端子の間に接続したコ
ンデンサ7と、同じく上記リセツト用ダイオード
5のアノード端子にカソード端子を接続し、FE
T2のドレイン端子にアノード端子を接続したダ
イオード9より成るスナバ回路と、 によつて構成し、リセツト回路を兼ねたことを特
徴とする二石フオワード・コンバータにおけるス
ナバ回路。
[Claims for Utility Model Registration] A capacitor 4 connected in parallel to a DC power supply, an FET 1 whose drain terminal is connected to the positive terminal of the capacitor 4, and whose source terminal is connected to one end of the primary coil of the transformer 3; FET 2, whose source terminal is connected to the negative terminal of FET 4, and whose drain terminal is connected to the other end of the primary coil of the transformer 3, and whose cathode terminal is connected to the source terminal of FET 1,
A reset diode 6 whose anode terminal is connected to the negative terminal of the capacitor 4, a reset diode 5 whose anode terminal is connected to the drain terminal of the FET 2, and a cathode terminal to the positive terminal of the capacitor 4; In a two-stone forward converter constituted by two diodes 11 and 12 connected to a secondary coil, and a DC smoothing circuit consisting of a reactor 13 and a capacitor 14, the cathode terminal of the reset diode 6 and the drain terminal of the FET 1 are connected. and a snubber circuit consisting of a diode 10 whose anode terminal is also connected to the cathode terminal of the reset diode 6 and whose cathode terminal is connected to the source terminal of the FET 1; A capacitor 7 is connected between the anode terminal of the FET 2 and the source terminal of the FET 2, and a cathode terminal is also connected to the anode terminal of the reset diode 5.
A snubber circuit in a two-stone forward converter, comprising: a snubber circuit consisting of a diode 9 whose anode terminal is connected to the drain terminal of T2; and the snubber circuit also serves as a reset circuit.
JP13215889U 1989-11-14 1989-11-14 Snubber circuit in Futashi forward converter Expired - Lifetime JPH0729744Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13215889U JPH0729744Y2 (en) 1989-11-14 1989-11-14 Snubber circuit in Futashi forward converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13215889U JPH0729744Y2 (en) 1989-11-14 1989-11-14 Snubber circuit in Futashi forward converter

Publications (2)

Publication Number Publication Date
JPH0370084U true JPH0370084U (en) 1991-07-12
JPH0729744Y2 JPH0729744Y2 (en) 1995-07-05

Family

ID=31679629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13215889U Expired - Lifetime JPH0729744Y2 (en) 1989-11-14 1989-11-14 Snubber circuit in Futashi forward converter

Country Status (1)

Country Link
JP (1) JPH0729744Y2 (en)

Also Published As

Publication number Publication date
JPH0729744Y2 (en) 1995-07-05

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