JPH0369243U - - Google Patents
Info
- Publication number
- JPH0369243U JPH0369243U JP13230989U JP13230989U JPH0369243U JP H0369243 U JPH0369243 U JP H0369243U JP 13230989 U JP13230989 U JP 13230989U JP 13230989 U JP13230989 U JP 13230989U JP H0369243 U JPH0369243 U JP H0369243U
- Authority
- JP
- Japan
- Prior art keywords
- lsi
- circuit board
- hole
- metal
- metal substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13230989U JPH0369243U (enrdf_load_stackoverflow) | 1989-11-13 | 1989-11-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13230989U JPH0369243U (enrdf_load_stackoverflow) | 1989-11-13 | 1989-11-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0369243U true JPH0369243U (enrdf_load_stackoverflow) | 1991-07-09 |
Family
ID=31679775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13230989U Pending JPH0369243U (enrdf_load_stackoverflow) | 1989-11-13 | 1989-11-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0369243U (enrdf_load_stackoverflow) |
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1989
- 1989-11-13 JP JP13230989U patent/JPH0369243U/ja active Pending